function.h (emit_status): Delete member regno_pointer_flag and rename regno_pointer_flag_length to...
* function.h (emit_status): Delete member regno_pointer_flag and rename regno_pointer_flag_length to regno_pointer_align_length. Delete define for REGNO_POINTER_FLAG. * integrate.h (inline_remap): Delete member regno_pointer_flag. Add member x_regno_reg_rtx. * rtl.h (rtx_def): Use frame_related bit to indicate register is a pointer in REG expressions. Define REG_POINTER macro. * alias.c (find_base_value, find_base_term): Use REG_POINTER instead of REGNO_POINTER_FLAG. * combine.c (nonzero_bits, num_sign_bit_copies): Likewise. * emit-rtl.c (gen_reg_rtx): Use regno_pointer_align_length instead of regno_pointer_flag_length. Remove code which refers to regno_pointer_flag. (mark_reg_pointer): Use REG_POINTER. (free_emit_status): Remove code which refers to regno_pointer_flag. (init_emit, mark_emit_status): Likewise. * flow.c (dump_flow_info): Likewise. * function.c (preserve_temp_slots): Likewise. * integrate.c (expand_inline_function, copy_rtx_and_substitute): Use x_regno_reg_rtx instead of regno_pointer_flag for function pointer determination in map. * loop.c (strength_reduce, maybe_eliminate_biv_1): Use REG_POINTER. * predict.c (estimate_probability): Likewise. * regclass.c (record_address_regs, reg_scan_mark_refs): Likewise. * unroll.c (unroll_loop): Use x_regno_reg_rtx instead of regno_pointer_flag for function pointer determination in map. * convex.h (RTX_COSTS): Don't test regno_pointer_flag and use REG_POINTER. * pa.c (hppa_legitimize_address, emit_move_sequence, basereg_operand): Use REG_POINTER. (restore_unscaled_index_insn_codes): Revise comment. From-SVN: r37863
This commit is contained in:
parent
31a7659bfd
commit
3502dc9cd3
@ -1,5 +1,37 @@
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2000-11-29 John David Anglin <dave@hiauly1.hia.nrc.ca>
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* function.h (emit_status): Delete member regno_pointer_flag and
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rename regno_pointer_flag_length to regno_pointer_align_length.
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Delete define for REGNO_POINTER_FLAG.
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* integrate.h (inline_remap): Delete member regno_pointer_flag.
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Add member x_regno_reg_rtx.
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* rtl.h (rtx_def): Use frame_related bit to indicate register is
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a pointer in REG expressions. Define REG_POINTER macro.
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* alias.c (find_base_value, find_base_term): Use REG_POINTER
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instead of REGNO_POINTER_FLAG.
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* combine.c (nonzero_bits, num_sign_bit_copies): Likewise.
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* emit-rtl.c (gen_reg_rtx): Use regno_pointer_align_length instead
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of regno_pointer_flag_length. Remove code which refers to
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regno_pointer_flag.
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(mark_reg_pointer): Use REG_POINTER.
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(free_emit_status): Remove code which refers to regno_pointer_flag.
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(init_emit, mark_emit_status): Likewise.
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* flow.c (dump_flow_info): Likewise.
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* function.c (preserve_temp_slots): Likewise.
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* integrate.c (expand_inline_function, copy_rtx_and_substitute):
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Use x_regno_reg_rtx instead of regno_pointer_flag for function
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pointer determination in map.
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* loop.c (strength_reduce, maybe_eliminate_biv_1): Use REG_POINTER.
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* predict.c (estimate_probability): Likewise.
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* regclass.c (record_address_regs, reg_scan_mark_refs): Likewise.
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* unroll.c (unroll_loop): Use x_regno_reg_rtx instead of
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regno_pointer_flag for function pointer determination in map.
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* convex.h (RTX_COSTS): Don't test regno_pointer_flag and use
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REG_POINTER.
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* pa.c (hppa_legitimize_address, emit_move_sequence, basereg_operand):
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Use REG_POINTER.
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(restore_unscaled_index_insn_codes): Revise comment.
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* expr.c (do_compare_and_jump): Add missing TYPE_MODE in statement.
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2000-11-30 Joseph S. Myers <jsm28@cam.ac.uk>
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@ -671,9 +671,9 @@ find_base_value (src)
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/* This might not be necessary anymore:
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If either operand is a REG that is a known pointer, then it
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is the base. */
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else if (GET_CODE (src_0) == REG && REGNO_POINTER_FLAG (REGNO (src_0)))
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else if (GET_CODE (src_0) == REG && REG_POINTER (src_0))
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return find_base_value (src_0);
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else if (GET_CODE (src_1) == REG && REGNO_POINTER_FLAG (REGNO (src_1)))
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else if (GET_CODE (src_1) == REG && REG_POINTER (src_1))
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return find_base_value (src_1);
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return 0;
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@ -1082,10 +1082,10 @@ find_base_term (x)
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/* If either operand is known to be a pointer, then use it
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to determine the base term. */
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if (REG_P (tmp1) && REGNO_POINTER_FLAG (REGNO (tmp1)))
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if (REG_P (tmp1) && REG_POINTER (tmp1))
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return find_base_term (tmp1);
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if (REG_P (tmp2) && REGNO_POINTER_FLAG (REGNO (tmp2)))
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if (REG_P (tmp2) && REG_POINTER (tmp2))
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return find_base_term (tmp2);
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/* Neither operand was known to be a pointer. Go ahead and find the
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@ -8033,7 +8033,7 @@ nonzero_bits (x, mode)
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/* If pointers extend unsigned and this is a pointer in Pmode, say that
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all the bits above ptr_mode are known to be zero. */
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if (POINTERS_EXTEND_UNSIGNED && GET_MODE (x) == Pmode
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&& REGNO_POINTER_FLAG (REGNO (x)))
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&& REG_POINTER (x))
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nonzero &= GET_MODE_MASK (ptr_mode);
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#endif
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@ -8471,7 +8471,7 @@ num_sign_bit_copies (x, mode)
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/* If pointers extend signed and this is a pointer in Pmode, say that
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all the bits above ptr_mode are known to be sign bit copies. */
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if (! POINTERS_EXTEND_UNSIGNED && GET_MODE (x) == Pmode && mode == Pmode
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&& REGNO_POINTER_FLAG (REGNO (x)))
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&& REG_POINTER (x))
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return GET_MODE_BITSIZE (Pmode) - GET_MODE_BITSIZE (ptr_mode) + 1;
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#endif
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@ -1112,9 +1112,8 @@ enum reg_class {
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#define RTX_COSTS(RTX,CODE,OUTER_CODE) \
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case PLUS: \
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if (cfun->emit->regno_pointer_flag != 0 \
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&& GET_CODE (XEXP (RTX, 0)) == REG \
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&& REGNO_POINTER_FLAG (REGNO (XEXP (RTX, 0))) \
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if (GET_CODE (XEXP (RTX, 0)) == REG \
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&& REG_POINTER (XEXP (RTX, 0)) \
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&& GET_CODE (XEXP (RTX, 1)) == CONST_INT) \
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return 0; \
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else break; \
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@ -912,8 +912,8 @@ hppa_legitimize_address (x, oldx, mode)
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idx = NULL_RTX;
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/* Make sure they're both regs. If one was a SYMBOL_REF [+ const],
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then emit_move_sequence will turn on REGNO_POINTER_FLAG so we'll
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know it's a base register below. */
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then emit_move_sequence will turn on REG_POINTER so we'll know
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it's a base register below. */
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if (GET_CODE (reg1) != REG)
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reg1 = force_reg (Pmode, force_operand (reg1, 0));
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@ -923,7 +923,7 @@ hppa_legitimize_address (x, oldx, mode)
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/* Figure out what the base and index are. */
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if (GET_CODE (reg1) == REG
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&& REGNO_POINTER_FLAG (REGNO (reg1)))
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&& REG_POINTER (reg1))
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{
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base = reg1;
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orig_base = XEXP (XEXP (x, 0), 1);
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@ -934,7 +934,7 @@ hppa_legitimize_address (x, oldx, mode)
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XEXP (x, 1));
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}
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else if (GET_CODE (reg2) == REG
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&& REGNO_POINTER_FLAG (REGNO (reg2)))
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&& REG_POINTER (reg2))
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{
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base = reg2;
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orig_base = XEXP (x, 1);
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@ -1544,9 +1544,9 @@ emit_move_sequence (operands, mode, scratch_reg)
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Don't mark hard registers though. That loses. */
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if (GET_CODE (operand0) == REG
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&& REGNO (operand0) >= FIRST_PSEUDO_REGISTER)
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REGNO_POINTER_FLAG (REGNO (operand0)) = 1;
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REG_POINTER (operand0) = 1;
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if (REGNO (temp) >= FIRST_PSEUDO_REGISTER)
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REGNO_POINTER_FLAG (REGNO (temp)) = 1;
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REG_POINTER (temp) = 1;
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if (ishighonly)
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set = gen_rtx_SET (mode, operand0, temp);
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else
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@ -6146,17 +6146,19 @@ basereg_operand (op, mode)
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if (!cse_not_expected)
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return 0;
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/* Once reload has started everything is considered valid. Reload should
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only create indexed addresses using the stack/frame pointer, and any
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others were checked for validity when created by the combine pass.
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Also allow any register when TARGET_NO_SPACE_REGS is in effect since
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we don't have to worry about the braindamaged implicit space register
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selection using the basereg only (rather than effective address)
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screwing us over. */
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if (TARGET_NO_SPACE_REGS || reload_in_progress || reload_completed)
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/* Allow any register when TARGET_NO_SPACE_REGS is in effect since
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we don't have to worry about the braindamaged implicit space
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register selection from the basereg. */
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if (TARGET_NO_SPACE_REGS)
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return (GET_CODE (op) == REG);
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/* Once reload has started any register with REG_POINTER set
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is considered valid. Reload should only create indexed addresses
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using the stack/frame pointer. All others are checked for
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validity when they are created by the combine pass. */
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if (reload_in_progress || reload_completed)
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return (GET_CODE (op) == REG && REG_POINTER (op));
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/* Stack is always OK for indexing. */
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if (op == stack_pointer_rtx)
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return 1;
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@ -6168,13 +6170,11 @@ basereg_operand (op, mode)
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return 1;
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/* The only other valid OPs are pseudo registers with
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REGNO_POINTER_FLAG set. */
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if (GET_CODE (op) != REG
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|| REGNO (op) < FIRST_PSEUDO_REGISTER
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|| ! register_operand (op, mode))
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return 0;
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return REGNO_POINTER_FLAG (REGNO (op));
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REG_POINTER set. */
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return (GET_CODE (op) == REG
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&& REGNO (op) >= FIRST_PSEUDO_REGISTER
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&& register_operand (op, mode)
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&& REG_POINTER (op));
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}
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/* Return 1 if this operand is anything other than a hard register. */
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@ -6372,7 +6372,7 @@ restore_unscaled_index_insn_codes (insns)
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Because of this mis-feature we have to know which register in a reg+reg
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address is the base and which is the index.
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Before reload, the base can be identified by REGNO_POINTER_FLAG. We use
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Before reload, the base can be identified by REG_POINTER. We use
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this to force base + index addresses to match a different insn than
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index + base addresses.
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@ -6392,8 +6392,12 @@ restore_unscaled_index_insn_codes (insns)
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using unscaled indexed addresses have the same INSN_CODE as they did
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immediately before delay slot scheduling.
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This is extremely gross. Long term, I'd like to be able to look at
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REG_POINTER_FLAG to handle these kinds of problems. */
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This is extremely gross. Long term, I'd like to use REG_POINTER to
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handle these kinds of problems.
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FIXME: Is this still necessary now that the pointer flag is stored
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in REG rtx's and basereg_operand properly checks for the flag after
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reload? */
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static void
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record_unscaled_index_insn_codes (insns)
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@ -549,18 +549,14 @@ gen_reg_rtx (mode)
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return gen_rtx_CONCAT (mode, realpart, imagpart);
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}
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/* Make sure regno_pointer_flag and regno_reg_rtx are large
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enough to have an element for this pseudo reg number. */
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/* Make sure regno_pointer_align and regno_reg_rtx are large enough
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to have an element for this pseudo reg number. */
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if (reg_rtx_no == f->emit->regno_pointer_flag_length)
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if (reg_rtx_no == f->emit->regno_pointer_align_length)
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{
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int old_size = f->emit->regno_pointer_flag_length;
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int old_size = f->emit->regno_pointer_align_length;
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rtx *new1;
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char *new;
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new = xrealloc (f->emit->regno_pointer_flag, old_size * 2);
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memset (new + old_size, 0, old_size);
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f->emit->regno_pointer_flag = new;
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new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
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memset (new + old_size, 0, old_size);
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f->emit->regno_pointer_align = (unsigned char *) new;
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@ -570,7 +566,7 @@ gen_reg_rtx (mode)
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memset (new1 + old_size, 0, old_size * sizeof (rtx));
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regno_reg_rtx = new1;
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f->emit->regno_pointer_flag_length = old_size * 2;
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f->emit->regno_pointer_align_length = old_size * 2;
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}
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val = gen_rtx_raw_REG (mode, reg_rtx_no);
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@ -603,9 +599,9 @@ mark_reg_pointer (reg, align)
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rtx reg;
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int align;
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{
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if (! REGNO_POINTER_FLAG (REGNO (reg)))
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if (! REG_POINTER (reg))
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{
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REGNO_POINTER_FLAG (REGNO (reg)) = 1;
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REG_POINTER (reg) = 1;
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if (align)
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REGNO_POINTER_ALIGN (REGNO (reg)) = align;
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@ -1713,7 +1709,6 @@ free_emit_status (f)
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struct function *f;
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{
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free (f->emit->x_regno_reg_rtx);
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free (f->emit->regno_pointer_flag);
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free (f->emit->regno_pointer_align);
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free (f->emit);
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f->emit = NULL;
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@ -3926,17 +3921,14 @@ init_emit ()
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/* Init the tables that describe all the pseudo regs. */
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f->emit->regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
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f->emit->regno_pointer_flag
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= (char *) xcalloc (f->emit->regno_pointer_flag_length, sizeof (char));
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f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
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f->emit->regno_pointer_align
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= (unsigned char *) xcalloc (f->emit->regno_pointer_flag_length,
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= (unsigned char *) xcalloc (f->emit->regno_pointer_align_length,
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sizeof (unsigned char));
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regno_reg_rtx
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= (rtx *) xcalloc (f->emit->regno_pointer_flag_length * sizeof (rtx),
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= (rtx *) xcalloc (f->emit->regno_pointer_align_length * sizeof (rtx),
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sizeof (rtx));
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/* Put copies of all the virtual register rtx into regno_reg_rtx. */
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@ -3944,16 +3936,16 @@ init_emit ()
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/* Indicate that the virtual registers and stack locations are
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all pointers. */
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REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
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REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
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REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1;
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REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
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REG_POINTER (stack_pointer_rtx) = 1;
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REG_POINTER (frame_pointer_rtx) = 1;
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REG_POINTER (hard_frame_pointer_rtx) = 1;
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REG_POINTER (arg_pointer_rtx) = 1;
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REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
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REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
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REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
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REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
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REGNO_POINTER_FLAG (VIRTUAL_CFA_REGNUM) = 1;
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REG_POINTER (virtual_incoming_args_rtx) = 1;
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REG_POINTER (virtual_stack_vars_rtx) = 1;
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REG_POINTER (virtual_stack_dynamic_rtx) = 1;
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REG_POINTER (virtual_outgoing_args_rtx) = 1;
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REG_POINTER (virtual_cfa_rtx) = 1;
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#ifdef STACK_BOUNDARY
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REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
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@ -3999,7 +3991,7 @@ mark_emit_status (es)
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if (es == 0)
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return;
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for (i = es->regno_pointer_flag_length, r = es->x_regno_reg_rtx;
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for (i = es->regno_pointer_align_length, r = es->x_regno_reg_rtx;
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i > 0; --i, ++r)
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ggc_mark_rtx (*r);
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@ -6078,7 +6078,7 @@ dump_flow_info (file)
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reg_class_names[(int) class],
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reg_class_names[(int) altclass]);
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}
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if (REGNO_POINTER_FLAG (i))
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if (REG_POINTER (regno_reg_rtx[i]))
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fprintf (file, "; pointer");
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fprintf (file, ".\n");
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}
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@ -1111,7 +1111,7 @@ preserve_temp_slots (x)
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a temporary slot we know it points to. To be consistent with
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the code below, we really should preserve all non-kept slots
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if we can't find a match, but that seems to be much too costly. */
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if (GET_CODE (x) == REG && REGNO_POINTER_FLAG (REGNO (x)))
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if (GET_CODE (x) == REG && REG_POINTER (x))
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p = find_temp_slot_from_address (x);
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/* If X is not in memory or is at a constant address, it cannot be in
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@ -97,21 +97,19 @@ struct emit_status
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int x_last_linenum;
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const char *x_last_filename;
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/* A vector indexed by pseudo reg number. The allocated length
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of this vector is regno_pointer_flag_length. Since this
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vector is needed during the expansion phase when the total
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number of registers in the function is not yet known,
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it is copied and made bigger when necessary. */
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char *regno_pointer_flag;
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int regno_pointer_flag_length;
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/* The length of the regno_pointer_align and x_regno_reg_rtx vectors.
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Since these vectors are needed during the expansion phase when
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the total number of registers in the function is not yet known,
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the vectors are copied and made bigger when necessary. */
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int regno_pointer_align_length;
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/* Indexed by pseudo register number, if nonzero gives the known alignment
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for that pseudo (if regno_pointer_flag is set).
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Allocated in parallel with regno_pointer_flag. */
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for that pseudo (if REG_POINTER is set in x_regno_reg_rtx).
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Allocated in parallel with x_regno_reg_rtx. */
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unsigned char *regno_pointer_align;
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/* Indexed by pseudo register number, gives the rtx for that pseudo.
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Allocated in parallel with regno_pointer_flag. */
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Allocated in parallel with regno_pointer_align. */
|
||||
rtx *x_regno_reg_rtx;
|
||||
};
|
||||
|
||||
@ -122,7 +120,6 @@ struct emit_status
|
||||
#define seq_stack (cfun->emit->sequence_stack)
|
||||
|
||||
#define REGNO_POINTER_ALIGN(REGNO) (cfun->emit->regno_pointer_align[REGNO])
|
||||
#define REGNO_POINTER_FLAG(REGNO) (cfun->emit->regno_pointer_flag[REGNO])
|
||||
|
||||
struct expr_status
|
||||
{
|
||||
|
@ -822,8 +822,8 @@ expand_inline_function (fndecl, parms, target, ignore, type,
|
||||
if (map->insns_at_start == 0)
|
||||
map->insns_at_start = emit_note (NULL_PTR, NOTE_INSN_DELETED);
|
||||
|
||||
map->regno_pointer_flag = inl_f->emit->regno_pointer_flag;
|
||||
map->regno_pointer_align = inl_f->emit->regno_pointer_align;
|
||||
map->x_regno_reg_rtx = inl_f->emit->x_regno_reg_rtx;
|
||||
|
||||
/* Update the outgoing argument size to allow for those in the inlined
|
||||
function. */
|
||||
@ -1878,7 +1878,7 @@ copy_rtx_and_substitute (orig, map, for_lhs)
|
||||
RTX_UNCHANGING_P (map->reg_map[regno]) = RTX_UNCHANGING_P (orig);
|
||||
/* A reg with REG_FUNCTION_VALUE_P true will never reach here. */
|
||||
|
||||
if (map->regno_pointer_flag[regno])
|
||||
if (REG_POINTER (map->x_regno_reg_rtx[regno]))
|
||||
mark_reg_pointer (map->reg_map[regno],
|
||||
map->regno_pointer_align[regno]);
|
||||
}
|
||||
@ -1923,7 +1923,7 @@ copy_rtx_and_substitute (orig, map, for_lhs)
|
||||
RTX_UNCHANGING_P (map->reg_map[regno]) = RTX_UNCHANGING_P (temp);
|
||||
/* A reg with REG_FUNCTION_VALUE_P true will never reach here. */
|
||||
|
||||
if (map->regno_pointer_flag[regno])
|
||||
if (REG_POINTER (map->x_regno_reg_rtx[regno]))
|
||||
mark_reg_pointer (map->reg_map[regno],
|
||||
map->regno_pointer_align[regno]);
|
||||
regno = REGNO (map->reg_map[regno]);
|
||||
|
@ -94,8 +94,8 @@ struct inline_remap
|
||||
rtvec copy_asm_constraints_vector;
|
||||
|
||||
/* Indications for regs being pointers and their alignment. */
|
||||
char *regno_pointer_flag;
|
||||
unsigned char *regno_pointer_align;
|
||||
rtx *x_regno_reg_rtx;
|
||||
|
||||
/* The next few fields are used for subst_constants to record the SETs
|
||||
that it saw. */
|
||||
|
10
gcc/loop.c
10
gcc/loop.c
@ -4182,11 +4182,11 @@ strength_reduce (loop, insn_count, flags)
|
||||
the alignment. */
|
||||
if (GET_CODE (v->new_reg) == REG
|
||||
&& v->giv_type == DEST_REG
|
||||
&& REGNO_POINTER_FLAG (REGNO (v->dest_reg)))
|
||||
&& REG_POINTER (v->dest_reg))
|
||||
mark_reg_pointer (v->new_reg,
|
||||
REGNO_POINTER_ALIGN (REGNO (v->dest_reg)));
|
||||
else if (GET_CODE (v->new_reg) == REG
|
||||
&& REGNO_POINTER_FLAG (REGNO (v->src_reg)))
|
||||
&& REG_POINTER (v->src_reg))
|
||||
{
|
||||
unsigned int align = REGNO_POINTER_ALIGN (REGNO (v->src_reg));
|
||||
|
||||
@ -4199,7 +4199,7 @@ strength_reduce (loop, insn_count, flags)
|
||||
}
|
||||
else if (GET_CODE (v->new_reg) == REG
|
||||
&& GET_CODE (v->add_val) == REG
|
||||
&& REGNO_POINTER_FLAG (REGNO (v->add_val)))
|
||||
&& REG_POINTER (v->add_val))
|
||||
{
|
||||
unsigned int align = REGNO_POINTER_ALIGN (REGNO (v->add_val));
|
||||
|
||||
@ -7884,7 +7884,7 @@ maybe_eliminate_biv_1 (loop, x, insn, bl, eliminate_p, where)
|
||||
|| GET_CODE (v->add_val) == LABEL_REF
|
||||
|| GET_CODE (v->add_val) == CONST
|
||||
|| (GET_CODE (v->add_val) == REG
|
||||
&& REGNO_POINTER_FLAG (REGNO (v->add_val)))))
|
||||
&& REG_POINTER (v->add_val))))
|
||||
{
|
||||
if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
|
||||
continue;
|
||||
@ -7948,7 +7948,7 @@ maybe_eliminate_biv_1 (loop, x, insn, bl, eliminate_p, where)
|
||||
|| GET_CODE (v->add_val) == LABEL_REF
|
||||
|| GET_CODE (v->add_val) == CONST
|
||||
|| (GET_CODE (v->add_val) == REG
|
||||
&& REGNO_POINTER_FLAG (REGNO (v->add_val))))
|
||||
&& REG_POINTER (v->add_val)))
|
||||
&& ! v->ignore && ! v->maybe_dead && v->always_computable
|
||||
&& v->mode == mode)
|
||||
{
|
||||
|
@ -146,10 +146,10 @@ estimate_probability (loops_info)
|
||||
{
|
||||
case EQ:
|
||||
if (GET_CODE (XEXP (cond, 0)) == REG
|
||||
&& REGNO_POINTER_FLAG (REGNO (XEXP (cond, 0)))
|
||||
&& REG_POINTER (XEXP (cond, 0))
|
||||
&& (XEXP (cond, 1) == const0_rtx
|
||||
|| (GET_CODE (XEXP (cond, 1)) == REG
|
||||
&& REGNO_POINTER_FLAG (REGNO (XEXP (cond, 1))))))
|
||||
&& REG_POINTER (XEXP (cond, 1)))))
|
||||
{
|
||||
prob = PROB_UNLIKELY;
|
||||
goto emitnote;
|
||||
@ -157,10 +157,10 @@ estimate_probability (loops_info)
|
||||
break;
|
||||
case NE:
|
||||
if (GET_CODE (XEXP (cond, 0)) == REG
|
||||
&& REGNO_POINTER_FLAG (REGNO (XEXP (cond, 0)))
|
||||
&& REG_POINTER (XEXP (cond, 0))
|
||||
&& (XEXP (cond, 1) == const0_rtx
|
||||
|| (GET_CODE (XEXP (cond, 1)) == REG
|
||||
&& REGNO_POINTER_FLAG (REGNO (XEXP (cond, 1))))))
|
||||
&& REG_POINTER (XEXP (cond, 1)))))
|
||||
{
|
||||
prob = PROB_LIKELY;
|
||||
goto emitnote;
|
||||
|
@ -1847,10 +1847,10 @@ record_address_regs (x, class, scale)
|
||||
/* When we have an address that is a sum,
|
||||
we must determine whether registers are "base" or "index" regs.
|
||||
If there is a sum of two registers, we must choose one to be
|
||||
the "base". Luckily, we can use the REGNO_POINTER_FLAG
|
||||
to make a good choice most of the time. We only need to do this
|
||||
on machines that can have two registers in an address and where
|
||||
the base and index register classes are different.
|
||||
the "base". Luckily, we can use the REG_POINTER to make a good
|
||||
choice most of the time. We only need to do this on machines
|
||||
that can have two registers in an address and where the base
|
||||
and index register classes are different.
|
||||
|
||||
??? This code used to set REGNO_POINTER_FLAG in some cases, but
|
||||
that seems bogus since it should only be set when we are sure
|
||||
@ -1923,13 +1923,13 @@ record_address_regs (x, class, scale)
|
||||
with the other operand the index. Likewise if the other operand
|
||||
is a MULT. */
|
||||
|
||||
else if ((code0 == REG && REGNO_POINTER_FLAG (REGNO (arg0)))
|
||||
else if ((code0 == REG && REG_POINTER (arg0))
|
||||
|| code1 == MULT)
|
||||
{
|
||||
record_address_regs (arg0, BASE_REG_CLASS, scale);
|
||||
record_address_regs (arg1, INDEX_REG_CLASS, scale);
|
||||
}
|
||||
else if ((code1 == REG && REGNO_POINTER_FLAG (REGNO (arg1)))
|
||||
else if ((code1 == REG && REG_POINTER (arg1))
|
||||
|| code0 == MULT)
|
||||
{
|
||||
record_address_regs (arg0, INDEX_REG_CLASS, scale);
|
||||
@ -2331,18 +2331,18 @@ reg_scan_mark_refs (x, insn, note_flag, min_regno)
|
||||
/* If the destination pseudo is set more than once, then other
|
||||
sets might not be to a pointer value (consider access to a
|
||||
union in two threads of control in the presense of global
|
||||
optimizations). So only set REGNO_POINTER_FLAG on the destination
|
||||
optimizations). So only set REG_POINTER on the destination
|
||||
pseudo if this is the only set of that pseudo. */
|
||||
&& REG_N_SETS (REGNO (SET_DEST (x))) == 1
|
||||
&& ! REG_USERVAR_P (SET_DEST (x))
|
||||
&& ! REGNO_POINTER_FLAG (REGNO (SET_DEST (x)))
|
||||
&& ! REG_POINTER (SET_DEST (x))
|
||||
&& ((GET_CODE (SET_SRC (x)) == REG
|
||||
&& REGNO_POINTER_FLAG (REGNO (SET_SRC (x))))
|
||||
&& REG_POINTER (SET_SRC (x)))
|
||||
|| ((GET_CODE (SET_SRC (x)) == PLUS
|
||||
|| GET_CODE (SET_SRC (x)) == LO_SUM)
|
||||
&& GET_CODE (XEXP (SET_SRC (x), 1)) == CONST_INT
|
||||
&& GET_CODE (XEXP (SET_SRC (x), 0)) == REG
|
||||
&& REGNO_POINTER_FLAG (REGNO (XEXP (SET_SRC (x), 0))))
|
||||
&& REG_POINTER (XEXP (SET_SRC (x), 0)))
|
||||
|| GET_CODE (SET_SRC (x)) == CONST
|
||||
|| GET_CODE (SET_SRC (x)) == SYMBOL_REF
|
||||
|| GET_CODE (SET_SRC (x)) == LABEL_REF
|
||||
@ -2359,7 +2359,7 @@ reg_scan_mark_refs (x, insn, note_flag, min_regno)
|
||||
&& (GET_CODE (XEXP (note, 0)) == CONST
|
||||
|| GET_CODE (XEXP (note, 0)) == SYMBOL_REF
|
||||
|| GET_CODE (XEXP (note, 0)) == LABEL_REF))))
|
||||
REGNO_POINTER_FLAG (REGNO (SET_DEST (x))) = 1;
|
||||
REG_POINTER (SET_DEST (x)) = 1;
|
||||
|
||||
/* ... fall through ... */
|
||||
|
||||
|
@ -169,6 +169,7 @@ typedef struct rtx_def
|
||||
restoring registers in the prologue and epilogue.
|
||||
1 in a MEM if the MEM refers to a scalar, rather than a member of
|
||||
an aggregate.
|
||||
1 in a REG if the register is a pointer.
|
||||
1 in a SYMBOL_REF if it addresses something in the per-function
|
||||
constant string pool. */
|
||||
unsigned frame_related : 1;
|
||||
@ -749,6 +750,9 @@ extern const char * const note_insn_name[NOTE_INSN_MAX - NOTE_INSN_BIAS];
|
||||
/* 1 in a REG rtx if it corresponds to a variable declared by the user. */
|
||||
#define REG_USERVAR_P(RTX) ((RTX)->volatil)
|
||||
|
||||
/* 1 in a REG rtx if the register is a pointer. */
|
||||
#define REG_POINTER(RTX) ((RTX)->frame_related)
|
||||
|
||||
/* 1 if the given register REG corresponds to a hard register. */
|
||||
#define HARD_REGISTER_P(REG) (HARD_REGISTER_NUM_P (REGNO (REG)))
|
||||
|
||||
|
@ -1197,8 +1197,8 @@ unroll_loop (loop, insn_count, end_insert_before, strength_reduce_p)
|
||||
}
|
||||
|
||||
/* Use our current register alignment and pointer flags. */
|
||||
map->regno_pointer_flag = cfun->emit->regno_pointer_flag;
|
||||
map->regno_pointer_align = cfun->emit->regno_pointer_align;
|
||||
map->x_regno_reg_rtx = cfun->emit->x_regno_reg_rtx;
|
||||
|
||||
/* If the loop is being partially unrolled, and the iteration variables
|
||||
are being split, and are being renamed for the split, then must fix up
|
||||
|
Loading…
Reference in New Issue
Block a user