rs6000.c (rs6000_gimple_builtin): Add gimple folding support for merge[hl].

[gcc]

2018-01-17  Will Schmidt  <will_schmidt@vnet.ibm.com>

	* config/rs6000/rs6000.c (rs6000_gimple_builtin): Add gimple folding
	support for merge[hl].
	(fold_mergehl_helper): New helper function.
	(tree-vector-builder.h): New #include for tree_vector_builder usage.
	* config/rs6000/altivec.md (altivec_vmrghw_direct): Add xxmrghw insn.
	(altivec_vmrglw_direct): Add xxmrglw insn.

[testsuite]

2018-01-17  Will Schmidt  <will_schmidt@vnet.ibm.com>

	* gcc.target/powerpc/fold-vec-mergehl-char.c: New.
	* gcc.target/powerpc/fold-vec-mergehl-double.c: New.
	* gcc.target/powerpc/fold-vec-mergehl-float.c: New.
	* gcc.target/powerpc/fold-vec-mergehl-int.c: New.
	* gcc.target/powerpc/fold-vec-mergehl-longlong.c: New.
	* gcc.target/powerpc/fold-vec-mergehl-pixel.c: New.
	* gcc.target/powerpc/fold-vec-mergehl-short.c: New.
	* gcc.target/powerpc/builtins-1-be.c: Disable gimple-folding.
	* gcc.target/powerpc/builtins-1-le.c: Disable gimple-folding.
	* gcc.target/powerpc/builtins-1-be-folded.c: New.
	* gcc.target/powerpc/builtins-1-le-folded.c: New.
	* gcc.target/powerpc/builtins-1.fold.h: New.

From-SVN: r256814
This commit is contained in:
Will Schmidt 2018-01-17 19:41:02 +00:00 committed by Will Schmidt
parent 2d509539db
commit 355bae9212
6 changed files with 103 additions and 18 deletions

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@ -1,3 +1,12 @@
2018-01-17 Will Schmidt <will_schmidt@vnet.ibm.com>
* config/rs6000/rs6000.c (rs6000_gimple_builtin): Add gimple folding
support for merge[hl].
(fold_mergehl_helper): New helper function.
(tree-vector-builder.h): New #include for tree_vector_builder usage.
* config/rs6000/altivec.md (altivec_vmrghw_direct): Add xxmrghw insn.
(altivec_vmrglw_direct): Add xxmrglw insn.
2018-01-17 Andrew Waterman <andrew@sifive.com>
* config/riscv/riscv.c (riscv_conditional_register_usage): If

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@ -997,8 +997,8 @@
(define_insn "altivec_vmrghb_direct"
[(set (match_operand:V16QI 0 "register_operand" "=v")
(unspec:V16QI [(match_operand:V16QI 1 "register_operand" "v")
(match_operand:V16QI 2 "register_operand" "v")]
(unspec:V16QI [(match_operand:V16QI 1 "register_operand" "v")
(match_operand:V16QI 2 "register_operand" "v")]
UNSPEC_VMRGH_DIRECT))]
"TARGET_ALTIVEC"
"vmrghb %0,%1,%2"
@ -1104,12 +1104,14 @@
[(set_attr "type" "vecperm")])
(define_insn "altivec_vmrghw_direct"
[(set (match_operand:V4SI 0 "register_operand" "=v")
(unspec:V4SI [(match_operand:V4SI 1 "register_operand" "v")
(match_operand:V4SI 2 "register_operand" "v")]
UNSPEC_VMRGH_DIRECT))]
[(set (match_operand:V4SI 0 "register_operand" "=v,wa")
(unspec:V4SI [(match_operand:V4SI 1 "register_operand" "v,wa")
(match_operand:V4SI 2 "register_operand" "v,wa")]
UNSPEC_VMRGH_DIRECT))]
"TARGET_ALTIVEC"
"vmrghw %0,%1,%2"
"@
vmrghw %0,%1,%2
xxmrghw %x0,%x1,%x2"
[(set_attr "type" "vecperm")])
(define_insn "*altivec_vmrghsf"
@ -1186,9 +1188,9 @@
(define_insn "altivec_vmrglb_direct"
[(set (match_operand:V16QI 0 "register_operand" "=v")
(unspec:V16QI [(match_operand:V16QI 1 "register_operand" "v")
(match_operand:V16QI 2 "register_operand" "v")]
UNSPEC_VMRGL_DIRECT))]
(unspec:V16QI [(match_operand:V16QI 1 "register_operand" "v")
(match_operand:V16QI 2 "register_operand" "v")]
UNSPEC_VMRGL_DIRECT))]
"TARGET_ALTIVEC"
"vmrglb %0,%1,%2"
[(set_attr "type" "vecperm")])
@ -1244,7 +1246,7 @@
[(set (match_operand:V8HI 0 "register_operand" "=v")
(unspec:V8HI [(match_operand:V8HI 1 "register_operand" "v")
(match_operand:V8HI 2 "register_operand" "v")]
UNSPEC_VMRGL_DIRECT))]
UNSPEC_VMRGL_DIRECT))]
"TARGET_ALTIVEC"
"vmrglh %0,%1,%2"
[(set_attr "type" "vecperm")])
@ -1293,12 +1295,14 @@
[(set_attr "type" "vecperm")])
(define_insn "altivec_vmrglw_direct"
[(set (match_operand:V4SI 0 "register_operand" "=v")
(unspec:V4SI [(match_operand:V4SI 1 "register_operand" "v")
(match_operand:V4SI 2 "register_operand" "v")]
UNSPEC_VMRGL_DIRECT))]
[(set (match_operand:V4SI 0 "register_operand" "=v,wa")
(unspec:V4SI [(match_operand:V4SI 1 "register_operand" "v,wa")
(match_operand:V4SI 2 "register_operand" "v,wa")]
UNSPEC_VMRGL_DIRECT))]
"TARGET_ALTIVEC"
"vmrglw %0,%1,%2"
"@
vmrglw %0,%1,%2
xxmrglw %x0,%x1,%x2"
[(set_attr "type" "vecperm")])
(define_insn "*altivec_vmrglsf"

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@ -68,6 +68,7 @@
#include "tree-vectorizer.h"
#include "target-globals.h"
#include "builtins.h"
#include "tree-vector-builder.h"
#include "context.h"
#include "tree-pass.h"
#include "except.h"
@ -16111,6 +16112,40 @@ fold_compare_helper (gimple_stmt_iterator *gsi, tree_code code, gimple *stmt)
gsi_replace (gsi, g, true);
}
/* Helper function to handle the vector merge[hl] built-ins. The
implementation difference between h and l versions for this code are in
the values used when building of the permute vector for high word versus
low word merge. The variance is keyed off the use_high parameter. */
static void
fold_mergehl_helper (gimple_stmt_iterator *gsi, gimple *stmt, int use_high)
{
tree arg0 = gimple_call_arg (stmt, 0);
tree arg1 = gimple_call_arg (stmt, 1);
tree lhs = gimple_call_lhs (stmt);
tree lhs_type = TREE_TYPE (lhs);
tree lhs_type_type = TREE_TYPE (lhs_type);
int n_elts = TYPE_VECTOR_SUBPARTS (lhs_type);
int midpoint = n_elts / 2;
int offset = 0;
if (use_high == 1)
offset = midpoint;
tree_vector_builder elts (lhs_type, VECTOR_CST_NELTS (arg0), 1);
for (int i = 0; i < midpoint; i++)
{
elts.safe_push (build_int_cst (lhs_type_type, offset + i));
elts.safe_push (build_int_cst (lhs_type_type, offset + n_elts + i));
}
tree permute = elts.build ();
gimple *g = gimple_build_assign (lhs, VEC_PERM_EXPR, arg0, arg1, permute);
gimple_set_location (g, gimple_location (stmt));
gsi_replace (gsi, g, true);
}
/* Fold a machine-dependent built-in in GIMPLE. (For folding into
a constant, use rs6000_fold_builtin.) */
@ -16639,6 +16674,28 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)
return true;
}
/* vec_mergel (integrals). */
case ALTIVEC_BUILTIN_VMRGLH:
case ALTIVEC_BUILTIN_VMRGLW:
case VSX_BUILTIN_XXMRGLW_4SI:
case ALTIVEC_BUILTIN_VMRGLB:
case VSX_BUILTIN_VEC_MERGEL_V2DI:
/* Do not fold for -maltivec=be on LE targets. */
if (VECTOR_ELT_ORDER_BIG && !BYTES_BIG_ENDIAN)
return false;
fold_mergehl_helper (gsi, stmt, 1);
return true;
/* vec_mergeh (integrals). */
case ALTIVEC_BUILTIN_VMRGHH:
case ALTIVEC_BUILTIN_VMRGHW:
case VSX_BUILTIN_XXMRGHW_4SI:
case ALTIVEC_BUILTIN_VMRGHB:
case VSX_BUILTIN_VEC_MERGEH_V2DI:
/* Do not fold for -maltivec=be on LE targets. */
if (VECTOR_ELT_ORDER_BIG && !BYTES_BIG_ENDIAN)
return false;
fold_mergehl_helper (gsi, stmt, 0);
return true;
default:
if (TARGET_DEBUG_BUILTIN)
fprintf (stderr, "gimple builtin intrinsic not matched:%d %s %s\n",

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@ -1,3 +1,18 @@
2018-01-17 Will Schmidt <will_schmidt@vnet.ibm.com>
* gcc.target/powerpc/fold-vec-mergehl-char.c: New.
* gcc.target/powerpc/fold-vec-mergehl-double.c: New.
* gcc.target/powerpc/fold-vec-mergehl-float.c: New.
* gcc.target/powerpc/fold-vec-mergehl-int.c: New.
* gcc.target/powerpc/fold-vec-mergehl-longlong.c: New.
* gcc.target/powerpc/fold-vec-mergehl-pixel.c: New.
* gcc.target/powerpc/fold-vec-mergehl-short.c: New.
* gcc.target/powerpc/builtins-1-be.c: Disable gimple-folding.
* gcc.target/powerpc/builtins-1-le.c: Disable gimple-folding.
* gcc.target/powerpc/builtins-1-be-folded.c: New.
* gcc.target/powerpc/builtins-1-le-folded.c: New.
* gcc.target/powerpc/builtins-1.fold.h: New.
2018-01-17 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* gcc.target/arm/g2.c: Add -marm to dg-options.

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@ -1,6 +1,6 @@
/* { dg-do compile { target { powerpc64-*-* } } } */
/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
/* { dg-options "-mcpu=power8 -O0" } */
/* { dg-options "-mcpu=power8 -O0 -mno-fold-gimple" } */
/* Test that a number of newly added builtin overloads are accepted
by the compiler. */

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@ -1,6 +1,6 @@
/* { dg-do compile { target { powerpc64le-*-* } } } */
/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
/* { dg-options "-mcpu=power8 -O0" } */
/* { dg-options "-mcpu=power8 -O0 -mno-fold-gimple" } */
/* Test that a number of newly added builtin overloads are accepted
by the compiler. */