loop.h (loop_info): New field 'vtop'.
* loop.h (loop_info): New field 'vtop'. * loop.c (check_dbra_loop): Use loop_info->vtop rather than scanning loop for vtop. * unroll.c (subtract_reg_term, find_common_reg_term): New functions. (loop_iterations): Use them to determine if loop has a constant number of iterations. Set loop_info->vtop. Don't subtract common reg term from initial_value and final_value if have a do-while loop. From-SVN: r24333
This commit is contained in:
Michael Hayes
Michael Hayes
parent
c7dda1e388
commit
35704c4661
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@ -1,3 +1,14 @@
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Wed Dec 16 17:24:07 1998 Michael Hayes <m.hayes@elec.canterbury.ac.nz>
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* loop.h (loop_info): New field 'vtop'.
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* loop.c (check_dbra_loop): Use loop_info->vtop rather than
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scanning loop for vtop.
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* unroll.c (subtract_reg_term, find_common_reg_term): New functions.
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(loop_iterations): Use them to determine if loop has a constant
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number of iterations. Set loop_info->vtop. Don't subtract
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common reg term from initial_value and final_value if have a
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do-while loop.
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Tue Dec 15 13:49:55 1998 Jeffrey A Law (law@cygnus.com)
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* mn10300.md (bset, bclr): Operand 0 is a read/write operand.
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24
gcc/loop.c
24
gcc/loop.c
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@ -6867,7 +6867,6 @@ check_dbra_loop (loop_end, insn_count, loop_start, loop_info)
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enum rtx_code cmp_code;
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int comparison_const_width;
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unsigned HOST_WIDE_INT comparison_sign_mask;
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rtx vtop;
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add_val = INTVAL (bl->biv->add_val);
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comparison_value = XEXP (comparison, 1);
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@ -6914,25 +6913,6 @@ check_dbra_loop (loop_end, insn_count, loop_start, loop_info)
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initial_value = const0_rtx;
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}
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/* Check if there is a NOTE_INSN_LOOP_VTOP note. If there is,
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that means that this is a for or while style loop, with
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a loop exit test at the start. Thus, we can assume that
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the loop condition was true when the loop was entered.
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This allows us to change the loop exit condition to an
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equality test.
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We start at the end and search backwards for the previous
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NOTE. If there is no NOTE_INSN_LOOP_VTOP for this loop,
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the search will stop at the NOTE_INSN_LOOP_CONT. */
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vtop = loop_end;
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do
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vtop = PREV_INSN (vtop);
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while (GET_CODE (vtop) != NOTE
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|| NOTE_LINE_NUMBER (vtop) > 0
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|| NOTE_LINE_NUMBER (vtop) == NOTE_REPEATED_LINE_NUMBER
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|| NOTE_LINE_NUMBER (vtop) == NOTE_INSN_DELETED);
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if (NOTE_LINE_NUMBER (vtop) != NOTE_INSN_LOOP_VTOP)
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vtop = NULL_RTX;
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/* First check if we can do a vanilla loop reversal. */
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if (initial_value == const0_rtx
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/* If we have a decrement_and_branch_on_count, prefer
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@ -6941,7 +6921,7 @@ check_dbra_loop (loop_end, insn_count, loop_start, loop_info)
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reversal if the biv is used to calculate a giv or has
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a non-counting use. */
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#if ! defined (HAVE_decrement_and_branch_until_zero) && defined (HAVE_decrement_and_branch_on_count)
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&& (! (add_val == 1 && vtop
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&& (! (add_val == 1 && loop_info->vtop
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&& (bl->biv_count == 0
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|| no_use_except_counting)))
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#endif
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@ -6956,7 +6936,7 @@ check_dbra_loop (loop_end, insn_count, loop_start, loop_info)
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nonneg = 1;
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cmp_code = GE;
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}
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else if (add_val == 1 && vtop
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else if (add_val == 1 && loop_info->vtop
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&& (bl->biv_count == 0
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|| no_use_except_counting))
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{
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@ -176,7 +176,9 @@ struct loop_info
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1: not unrolled.
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-1: completely unrolled
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>0: holds the unroll exact factor. */
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int unroll_number;
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unsigned int unroll_number;
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/* Non-zero if the loop has a NOTE_INSN_LOOP_VTOP. */
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rtx vtop;
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};
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/* Definitions used by the basic induction variable discovery code. */
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206
gcc/unroll.c
206
gcc/unroll.c
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@ -3394,6 +3394,72 @@ loop_find_equiv_value (loop_start, reg)
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}
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/* Return a simplified rtx for the expression OP - REG.
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REG must appear in OP, and OP must be a register or the sum of a register
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and a second term.
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Thus, the return value must be const0_rtx or the second term.
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The caller is responsible for verifying that REG appears in OP and OP has
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the proper form. */
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static rtx
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subtract_reg_term (op, reg)
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rtx op, reg;
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{
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if (op == reg)
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return const0_rtx;
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if (GET_CODE (op) == PLUS)
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{
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if (XEXP (op, 0) == reg)
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return XEXP (op, 1);
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else if (XEXP (op, 1) == reg)
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return XEXP (op, 0);
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}
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/* OP does not contain REG as a term. */
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abort ();
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}
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/* Find and return register term common to both expressions OP0 and
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OP1 or NULL_RTX if no such term exists. Each expression must be a
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REG or a PLUS of a REG. */
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static rtx
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find_common_reg_term (op0, op1)
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rtx op0, op1;
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{
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if ((GET_CODE (op0) == REG || GET_CODE (op0) == PLUS)
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&& (GET_CODE (op1) == REG || GET_CODE (op1) == PLUS))
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{
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rtx op00;
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rtx op01;
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rtx op10;
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rtx op11;
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if (GET_CODE (op0) == PLUS)
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op01 = XEXP (op0, 1), op00 = XEXP (op0, 0);
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else
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op01 = const0_rtx, op00 = op0;
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if (GET_CODE (op1) == PLUS)
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op11 = XEXP (op1, 1), op10 = XEXP (op1, 0);
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else
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op11 = const0_rtx, op10 = op1;
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/* Find and return common register term if present. */
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if (REG_P (op00) && (op00 == op10 || op00 == op11))
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return op00;
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else if (REG_P (op01) && (op01 == op10 || op01 == op11))
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return op01;
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}
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/* No common register term found. */
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return NULL_RTX;
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}
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/* Calculate the number of loop iterations. Returns the exact number of loop
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iterations if it can be calculated, otherwise returns zero. */
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@ -3411,6 +3477,8 @@ loop_iterations (loop_start, loop_end, loop_info)
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int increment_dir;
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int unsigned_p, compare_dir, final_larger;
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rtx last_loop_insn;
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rtx vtop;
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rtx reg_term;
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loop_info->n_iterations = 0;
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loop_info->initial_value = 0;
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@ -3421,6 +3489,7 @@ loop_iterations (loop_start, loop_end, loop_info)
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loop_info->increment = 0;
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loop_info->iteration_var = 0;
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loop_info->unroll_number = 1;
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loop_info->vtop = 0;
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/* First find the iteration variable. If the last insn is a conditional
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branch, and the insn before tests a register value, make that the
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@ -3447,6 +3516,25 @@ loop_iterations (loop_start, loop_end, loop_info)
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comparison_code = GET_CODE (comparison);
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iteration_var = XEXP (comparison, 0);
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comparison_value = XEXP (comparison, 1);
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/* Check if there is a NOTE_INSN_LOOP_VTOP note. If there is,
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that means that this is a for or while style loop, with
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a loop exit test at the start. Thus, we can assume that
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the loop condition was true when the loop was entered.
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We start at the end and search backwards for the previous
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NOTE. If there is no NOTE_INSN_LOOP_VTOP for this loop,
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the search will stop at the NOTE_INSN_LOOP_CONT. */
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vtop = loop_end;
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do
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vtop = PREV_INSN (vtop);
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while (GET_CODE (vtop) != NOTE
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|| NOTE_LINE_NUMBER (vtop) > 0
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|| NOTE_LINE_NUMBER (vtop) == NOTE_REPEATED_LINE_NUMBER
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|| NOTE_LINE_NUMBER (vtop) == NOTE_INSN_DELETED);
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if (NOTE_LINE_NUMBER (vtop) != NOTE_INSN_LOOP_VTOP)
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vtop = NULL_RTX;
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loop_info->vtop = vtop;
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if (GET_CODE (iteration_var) != REG)
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{
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@ -3545,63 +3633,85 @@ loop_iterations (loop_start, loop_end, loop_info)
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loop_info->iteration_var = iteration_var;
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loop_info->comparison_code = comparison_code;
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/* Try to determine the iteration count for loops such
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as (for i = init; i < init + const; i++). When running the
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loop optimization twice, the first pass often converts simple
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loops into this form. */
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if (REG_P (initial_value))
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{
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rtx temp = final_value;
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rtx reg1;
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rtx reg2;
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rtx const2;
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/* initial_value = reg1, final_value = reg2 + const, where reg1
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!= reg2. Try to find what reg1 is equivalent to. Hopefully
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it will either be reg2 or reg2 plus a constant. */
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if (GET_CODE (temp) == PLUS)
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temp = XEXP (temp, 0);
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if (REG_P (temp) && REGNO (temp) != REGNO (initial_value))
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initial_value = loop_find_equiv_value (loop_start, initial_value);
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reg1 = initial_value;
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if (GET_CODE (final_value) == PLUS)
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reg2 = XEXP (final_value, 0), const2 = XEXP (final_value, 1);
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else
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reg2 = final_value, const2 = const0_rtx;
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/* Check for initial_value = reg1, final_value = reg2 + const2,
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where reg1 != reg2. */
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if (REG_P (reg2) && reg2 != reg1)
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{
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rtx temp;
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/* Find what reg1 is equivalent to. Hopefully it will
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either be reg2 or reg2 plus a constant. */
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temp = loop_find_equiv_value (loop_start, reg1);
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if (find_common_reg_term (temp, reg2))
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initial_value = temp;
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else
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{
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/* Find what reg2 is equivalent to. Hopefully it will
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either be reg1 or reg1 plus a constant. Let's ignore
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the latter case for now since it is not so common. */
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temp = loop_find_equiv_value (loop_start, reg2);
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if (temp == loop_info->iteration_var)
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temp = initial_value;
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if (temp == reg1)
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final_value = (const2 == const0_rtx)
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? reg1 : gen_rtx_PLUS (GET_MODE (reg1), reg1, const2);
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}
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}
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else if (loop_info->vtop && GET_CODE (reg2) == CONST_INT)
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{
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rtx temp;
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/* When running the loop optimizer twice, check_dbra_loop
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further obfuscates reversible loops of the form:
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for (i = init; i < init + const; i++). We often end up with
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final_value = 0, initial_value = temp, temp = temp2 - init,
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where temp2 = init + const. If the loop has a vtop we
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can replace initial_value with const. */
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temp = loop_find_equiv_value (loop_start, reg1);
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if (GET_CODE (temp) == MINUS && REG_P (XEXP (temp, 0)))
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{
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rtx temp2 = loop_find_equiv_value (loop_start, XEXP (temp, 0));
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if (GET_CODE (temp2) == PLUS
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&& XEXP (temp2, 0) == XEXP (temp, 1))
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initial_value = XEXP (temp2, 1);
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}
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}
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}
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/* If have initial_value = reg + const1 and final_value = reg +
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const2, then replace initial_value with const1 and final_value
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with const2. This should be safe since we are protected by the
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initial comparison before entering the loop. */
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if ((GET_CODE (initial_value) == REG || GET_CODE (initial_value) == PLUS)
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&& (GET_CODE (final_value) == REG || GET_CODE (final_value) == PLUS))
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initial comparison before entering the loop if we have a vtop.
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For example, a + b < a + c is not equivalent to b < c for all a
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when using modulo arithmetic.
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??? Without a vtop we could still perform the optimization if we check
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the initial and final values carefully. */
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if (loop_info->vtop
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&& (reg_term = find_common_reg_term (initial_value, final_value)))
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{
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rtx init_op0;
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rtx fini_op0;
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rtx init_op1;
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rtx fini_op1;
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if (GET_CODE (initial_value) == PLUS)
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init_op1 = XEXP (initial_value, 1), init_op0 = XEXP (initial_value, 0);
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else
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init_op1 = const0_rtx, init_op0 = initial_value;
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if (GET_CODE (final_value) == PLUS)
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fini_op1 = XEXP (final_value, 1), fini_op0 = XEXP (final_value, 0);
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else
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fini_op1 = const0_rtx, fini_op0 = final_value;
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/* Remove register common factor if present. */
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if (REG_P (init_op0) && init_op0 == fini_op0)
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{
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initial_value = init_op1;
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final_value = fini_op1;
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}
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else if (REG_P (init_op0) && init_op0 == fini_op1)
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{
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initial_value = init_op1;
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final_value = fini_op0;
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}
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else if (REG_P (init_op1) && init_op1 == fini_op0)
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{
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initial_value = init_op0;
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final_value = fini_op1;
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}
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else if (REG_P (init_op1) && init_op1 == fini_op1)
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{
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initial_value = init_op0;
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final_value = fini_op0;
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}
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initial_value = subtract_reg_term (initial_value, reg_term);
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final_value = subtract_reg_term (final_value, reg_term);
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}
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loop_info->initial_equiv_value = initial_value;
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loop_info->final_equiv_value = final_value;
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