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re PR target/86014 ([AArch64] missed LDP optimization)

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gcc/
2018-08-02  Jackson Woodruff  <jackson.woodruff@arm.com>

	PR target/86014
	* config/aarch64/aarch64.c (aarch64_operands_adjust_ok_for_ldpstp):
	No longer check last store for clobber of address register.


gcc/testsuite
2018-08-02  Jackson Woodruff  <jackson.woodruff@arm.com>

	PR target/86014
	* gcc.target/aarch64/ldp_stp_13.c: New test.

From-SVN: r263249
This commit is contained in:
Jackson Woodruff 2018-08-02 10:39:23 +00:00 committed by Jackson Woodruff
parent ca498a1188
commit 363b395bad
4 changed files with 49 additions and 19 deletions
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6
gcc/ChangeLog
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@ -1,3 +1,9 @@
2018-08-02 Jackson Woodruff <jackson.woodruff@arm.com>
PR target/86014
* config/aarch64/aarch64.c (aarch64_operands_adjust_ok_for_ldpstp):
No longer check last store for clobber of address register.
2018-08-02 Martin Liska <mliska@suse.cz>
PR gcov-profile/86817

39
gcc/config/aarch64/aarch64.c
View File

@ -17270,9 +17270,26 @@ aarch64_operands_adjust_ok_for_ldpstp (rtx *operands, bool load,
return false;
}
/* Check if addresses are clobbered by load. */
if (load)
for (int i = 0; i < num_insns; i++)
/* Check if the registers are of same class. */
rclass = REG_P (reg[0]) && FP_REGNUM_P (REGNO (reg[0]))
? FP_REGS : GENERAL_REGS;
for (int i = 1; i < num_insns; i++)
if (REG_P (reg[i]) && FP_REGNUM_P (REGNO (reg[i])))
{
if (rclass != FP_REGS)
return false;
}
else
{
if (rclass != GENERAL_REGS)
return false;
}
/* Only the last register in the order in which they occur
may be clobbered by the load. */
if (rclass == GENERAL_REGS && load)
for (int i = 0; i < num_insns - 1; i++)
if (reg_mentioned_p (reg[i], mem[i]))
return false;
@ -17312,22 +17329,6 @@ aarch64_operands_adjust_ok_for_ldpstp (rtx *operands, bool load,
&& MEM_ALIGN (mem[0]) < 8 * BITS_PER_UNIT)
return false;
/* Check if the registers are of same class. */
rclass = REG_P (reg[0]) && FP_REGNUM_P (REGNO (reg[0]))
? FP_REGS : GENERAL_REGS;
for (int i = 1; i < num_insns; i++)
if (REG_P (reg[i]) && FP_REGNUM_P (REGNO (reg[i])))
{
if (rclass != FP_REGS)
return false;
}
else
{
if (rclass != GENERAL_REGS)
return false;
}
return true;
}

5
gcc/testsuite/ChangeLog
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@ -1,3 +1,8 @@
2018-08-02 Jackson Woodruff <jackson.woodruff@arm.com>
PR target/86014
* gcc.target/aarch64/ldp_stp_13.c: New test.
2018-08-02 Thomas Preud'homme <thomas.preudhomme@linaro.org>
PR target/85434

18
gcc/testsuite/gcc.target/aarch64/ldp_stp_13.c Normal file
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@ -0,0 +1,18 @@
/* { dg-do compile } */
/* { dg-options "-O2 -mabi=ilp32" } */
long long
load_long (long long int *arr)
{
return arr[400] << 1 + arr[401] << 1 + arr[403] << 1 + arr[404] << 1;
}
/* { dg-final { scan-assembler-times "ldp\tx\[0-9\]+, x\[0-9\]+, " 2 } } */
int
load (int *arr)
{
return arr[527] << 1 + arr[400] << 1 + arr[401] << 1 + arr[528] << 1;
}
/* { dg-final { scan-assembler-times "ldp\tw\[0-9\]+, w\[0-9\]+, " 2 } } */