re PR target/33132 (m32r: ICE: RTL check: expected elt 0 type 'i' or 'n', have 'w' (rtx const_int) in insn_current_length, at insn-attrtab.c:29)
PR target/33132 * config/m32r/constraints.md: Add W constraint for integer zero. * config/m32r/m32r.md (get_pc): Use W and i constraints. Fix length calculation by using alternatives. From-SVN: r127992
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@ -1,3 +1,10 @@
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2007-08-31 Nick Clifton <nickc@redhat.com>
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PR target/33132
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* config/m32r/constraints.md: Add W constraint for integer zero.
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* config/m32r/m32r.md (get_pc): Use W and i constraints.
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Fix length calculation by using alternatives.
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2007-08-31 Richard Sandiford <richard@codesourcery.com>
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* optabs.c (shift_optab_p, commutative_optab_p): New functions,
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@ -39,6 +39,7 @@
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;; S is for stores with pre {inc,dec}rement
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;; T is for indirect of a pointer.
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;; U is for loads with post increment.
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;; W is used for an immediate value of 0.
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;;
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;; Register constraints
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@ -128,3 +129,9 @@
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"A load with post increment."
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(and (match_code "mem")
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(match_test "LOAD_POSTINC_P (GET_MODE (op), XEXP (op, 0))")))
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(define_constraint "W"
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"zero immediate."
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(and (match_code "const_int")
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(match_test "ival == 0")))
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@ -2637,19 +2637,14 @@
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(define_insn "get_pc"
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[(clobber (reg:SI 14))
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(set (match_operand 0 "register_operand" "=r")
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(set (match_operand 0 "register_operand" "=r,r")
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(unspec [(match_operand 1 "" "")] UNSPEC_GET_PC))
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(use (match_operand:SI 2 "immediate_operand" ""))]
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(use (match_operand:SI 2 "immediate_operand" "W,i"))]
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"flag_pic"
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"*
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{
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if (INTVAL(operands[2]))
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return \"bl.s .+4\;ld24 %0,%#%1\;add %0,lr\";
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else
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return \"bl.s .+4\;seth %0,%#shigh(%1)\;add3 %0,%0,%#low(%1+4)\;add %0,lr\";}"
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[(set (attr "length") (if_then_else (ne (match_dup 2) (const_int 0))
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(const_int 8)
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(const_int 12)))])
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"@
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bl.s .+4\;seth %0,%#shigh(%1)\;add3 %0,%0,%#low(%1+4)\;add %0,lr
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bl.s .+4\;ld24 %0,%#%1\;add %0,lr"
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[(set_attr "length" "12,8")])
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(define_expand "builtin_setjmp_receiver"
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[(label_ref (match_operand 0 "" ""))]
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