From 3681df8fe1eac5d26deefddeb621d2d74bbf5bb9 Mon Sep 17 00:00:00 2001 From: Nick Clifton Date: Fri, 31 Aug 2007 14:27:19 +0000 Subject: [PATCH] re PR target/33132 (m32r: ICE: RTL check: expected elt 0 type 'i' or 'n', have 'w' (rtx const_int) in insn_current_length, at insn-attrtab.c:29) PR target/33132 * config/m32r/constraints.md: Add W constraint for integer zero. * config/m32r/m32r.md (get_pc): Use W and i constraints. Fix length calculation by using alternatives. From-SVN: r127992 --- gcc/ChangeLog | 7 +++++++ gcc/config/m32r/constraints.md | 7 +++++++ gcc/config/m32r/m32r.md | 17 ++++++----------- 3 files changed, 20 insertions(+), 11 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index efbaba08c57..50832cf78bf 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2007-08-31 Nick Clifton + + PR target/33132 + * config/m32r/constraints.md: Add W constraint for integer zero. + * config/m32r/m32r.md (get_pc): Use W and i constraints. + Fix length calculation by using alternatives. + 2007-08-31 Richard Sandiford * optabs.c (shift_optab_p, commutative_optab_p): New functions, diff --git a/gcc/config/m32r/constraints.md b/gcc/config/m32r/constraints.md index 3608802c777..da126c27c4b 100644 --- a/gcc/config/m32r/constraints.md +++ b/gcc/config/m32r/constraints.md @@ -39,6 +39,7 @@ ;; S is for stores with pre {inc,dec}rement ;; T is for indirect of a pointer. ;; U is for loads with post increment. +;; W is used for an immediate value of 0. ;; ;; Register constraints @@ -128,3 +129,9 @@ "A load with post increment." (and (match_code "mem") (match_test "LOAD_POSTINC_P (GET_MODE (op), XEXP (op, 0))"))) + +(define_constraint "W" + "zero immediate." + (and (match_code "const_int") + (match_test "ival == 0"))) + diff --git a/gcc/config/m32r/m32r.md b/gcc/config/m32r/m32r.md index e875f96b6e9..84cf4f954e0 100644 --- a/gcc/config/m32r/m32r.md +++ b/gcc/config/m32r/m32r.md @@ -2637,19 +2637,14 @@ (define_insn "get_pc" [(clobber (reg:SI 14)) - (set (match_operand 0 "register_operand" "=r") + (set (match_operand 0 "register_operand" "=r,r") (unspec [(match_operand 1 "" "")] UNSPEC_GET_PC)) - (use (match_operand:SI 2 "immediate_operand" ""))] + (use (match_operand:SI 2 "immediate_operand" "W,i"))] "flag_pic" - "* -{ - if (INTVAL(operands[2])) - return \"bl.s .+4\;ld24 %0,%#%1\;add %0,lr\"; - else - return \"bl.s .+4\;seth %0,%#shigh(%1)\;add3 %0,%0,%#low(%1+4)\;add %0,lr\";}" - [(set (attr "length") (if_then_else (ne (match_dup 2) (const_int 0)) - (const_int 8) - (const_int 12)))]) + "@ + bl.s .+4\;seth %0,%#shigh(%1)\;add3 %0,%0,%#low(%1+4)\;add %0,lr + bl.s .+4\;ld24 %0,%#%1\;add %0,lr" + [(set_attr "length" "12,8")]) (define_expand "builtin_setjmp_receiver" [(label_ref (match_operand 0 "" ""))]