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re PR target/68483 (gcc 5.2: suboptimal code compared to 4.9)

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PR target/68483
	* tree-vect-generic.c (lower_vec_perm): If VEC_PERM_EXPR
	is valid vec_shr pattern, don't lower it even if can_vec_perm_p
	returns false.
	* optabs.c (shift_amt_for_vec_perm_mask): Return NULL_RTX
	whenever first is nelt or above.  Don't mask expected with
	2 * nelt - 1.

	* gcc.target/i386/pr68483-1.c: New test.
	* gcc.target/i386/pr68483-2.c: New test.

From-SVN: r230797
This commit is contained in:
Jakub Jelinek 2015-11-24 11:45:52 +01:00 committed by Jakub Jelinek
parent 3de2a40ecd
commit 3788cfb513
6 changed files with 79 additions and 2 deletions
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10
gcc/ChangeLog
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@ -1,3 +1,13 @@
2015-11-24 Jakub Jelinek <jakub@redhat.com>
PR target/68483
* tree-vect-generic.c (lower_vec_perm): If VEC_PERM_EXPR
is valid vec_shr pattern, don't lower it even if can_vec_perm_p
returns false.
* optabs.c (shift_amt_for_vec_perm_mask): Return NULL_RTX
whenever first is nelt or above. Don't mask expected with
2 * nelt - 1.
2015-11-24 Ilya Enkovich <enkovich.gnu@gmail.com>
PR c/68337

4
gcc/optabs.c
View File

@ -5232,12 +5232,12 @@ shift_amt_for_vec_perm_mask (rtx sel)
return NULL_RTX;
first = INTVAL (CONST_VECTOR_ELT (sel, 0));
if (first >= 2*nelt)
if (first >= nelt)
return NULL_RTX;
for (i = 1; i < nelt; i++)
{
int idx = INTVAL (CONST_VECTOR_ELT (sel, i));
unsigned int expected = (i + first) & (2 * nelt - 1);
unsigned int expected = i + first;
/* Indices into the second vector are all equivalent. */
if (idx < 0 || (MIN (nelt, (unsigned) idx) != MIN (nelt, expected)))
return NULL_RTX;

6
gcc/testsuite/ChangeLog
View File

@ -1,3 +1,9 @@
2015-11-24 Jakub Jelinek <jakub@redhat.com>
PR target/68483
* gcc.target/i386/pr68483-1.c: New test.
* gcc.target/i386/pr68483-2.c: New test.
2015-11-24 Ilya Enkovich <enkovich.gnu@gmail.com>
PR c/68337

22
gcc/testsuite/gcc.target/i386/pr68483-1.c Normal file
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@ -0,0 +1,22 @@
/* PR target/68483 */
/* { dg-do compile } */
/* { dg-options "-O2 -ftree-vectorize -msse2 -mno-sse3" } */
void
test (int *input, int *out, unsigned x1, unsigned x2)
{
unsigned i, j;
unsigned end = x1;
for (i = j = 0; i < 1000; i++)
{
int sum = 0;
end += x2;
for (; j < end; j++)
sum += input[j];
out[i] = sum;
}
}
/* { dg-final { scan-assembler "psrldq\[^\n\r]*(8,|, 8)" { target ia32 } } } */
/* { dg-final { scan-assembler "psrldq\[^\n\r]*(4,|, 4)" { target ia32 } } } */

15
gcc/testsuite/gcc.target/i386/pr68483-2.c Normal file
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@ -0,0 +1,15 @@
/* PR target/68483 */
/* { dg-do compile } */
/* { dg-options "-O2 -msse2 -mno-sse3" } */
typedef int V __attribute__((vector_size (16)));
void
foo (V *a, V *b)
{
V c = { 0, 0, 0, 0 };
V d = { 1, 2, 3, 4 };
*a = __builtin_shuffle (*b, c, d);
}
/* { dg-final { scan-assembler "psrldq\[^\n\r]*(4,|, 4)" } } */

24
gcc/tree-vect-generic.c
View File

@ -1272,6 +1272,30 @@ lower_vec_perm (gimple_stmt_iterator *gsi)
update_stmt (stmt);
return;
}
/* Also detect vec_shr pattern - VEC_PERM_EXPR with zero
vector as VEC1 and a right element shift MASK. */
if (optab_handler (vec_shr_optab, TYPE_MODE (vect_type))
!= CODE_FOR_nothing
&& TREE_CODE (vec1) == VECTOR_CST
&& initializer_zerop (vec1)
&& sel_int[0]
&& sel_int[0] < elements)
{
for (i = 1; i < elements; ++i)
{
unsigned int expected = i + sel_int[0];
/* Indices into the second vector are all equivalent. */
if (MIN (elements, (unsigned) sel_int[i])
!= MIN (elements, expected))
break;
}
if (i == elements)
{
gimple_assign_set_rhs3 (stmt, mask);
update_stmt (stmt);
return;
}
}
}
else if (can_vec_perm_p (TYPE_MODE (vect_type), true, NULL))
return;