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reload.c (push_secondary_reload): Revert 2000-08-16 change. 

* reload.c (push_secondary_reload): Revert 2000-08-16 change.
        (find_reloads): Likewise.
        * config/alpha/alpha.md (reload_inqi): Revert 2000-08-11 change.
        (reload_inhi): Likewise.

From-SVN: r36028
This commit is contained in:
Richard Henderson 2000-08-28 20:59:00 -07:00 committed by Richard Henderson
parent 2ed885df76
commit 38323cc3b8
3 changed files with 35 additions and 21 deletions
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7
gcc/ChangeLog
View File

@ -1,3 +1,10 @@
2000-08-28 Richard Henderson <rth@cygnus.com>
* reload.c (push_secondary_reload): Revert 2000-08-16 change.
(find_reloads): Likewise.
* config/alpha/alpha.md (reload_inqi): Revert 2000-08-11 change.
(reload_inhi): Likewise.
2000-08-28 Richard Henderson <rth@cygnus.com>
* config/i386/i386.c: Don't error on EXTRA_CONSTRAINT defined.

28
gcc/config/alpha/alpha.md
View File

@ -5343,11 +5343,11 @@
(define_expand "reload_inqi"
[(parallel [(match_operand:QI 0 "register_operand" "=r")
(match_operand:QI 1 "any_memory_operand" "m")
(match_operand:DI 2 "register_operand" "=&r")])]
(match_operand:TI 2 "register_operand" "=&r")])]
"! TARGET_BWX"
"
{
rtx seq;
rtx scratch, seq;
if (GET_CODE (operands[1]) != MEM)
abort ();
@ -5361,8 +5361,16 @@
{
rtx addr;
/* It is possible that one of the registers we got for operands[2]
might coincide with that of operands[0] (which is why we made
it TImode). Pick the other one to use as our scratch. */
if (REGNO (operands[0]) == REGNO (operands[2]))
scratch = gen_rtx_REG (DImode, REGNO (operands[2]) + 1);
else
scratch = gen_rtx_REG (DImode, REGNO (operands[2]));
addr = get_unaligned_address (operands[1], 0);
seq = gen_unaligned_loadqi (operands[0], addr, operands[2],
seq = gen_unaligned_loadqi (operands[0], addr, scratch,
gen_rtx_REG (DImode, REGNO (operands[0])));
alpha_set_memflags (seq, operands[1]);
}
@ -5373,11 +5381,11 @@
(define_expand "reload_inhi"
[(parallel [(match_operand:HI 0 "register_operand" "=r")
(match_operand:HI 1 "any_memory_operand" "m")
(match_operand:DI 2 "register_operand" "=&r")])]
(match_operand:TI 2 "register_operand" "=&r")])]
"! TARGET_BWX"
"
{
rtx seq;
rtx scratch, seq;
if (GET_CODE (operands[1]) != MEM)
abort ();
@ -5391,8 +5399,16 @@
{
rtx addr;
/* It is possible that one of the registers we got for operands[2]
might coincide with that of operands[0] (which is why we made
it TImode). Pick the other one to use as our scratch. */
if (REGNO (operands[0]) == REGNO (operands[2]))
scratch = gen_rtx_REG (DImode, REGNO (operands[2]) + 1);
else
scratch = gen_rtx_REG (DImode, REGNO (operands[2]));
addr = get_unaligned_address (operands[1], 0);
seq = gen_unaligned_loadhi (operands[0], addr, operands[2],
seq = gen_unaligned_loadhi (operands[0], addr, scratch,
gen_rtx_REG (DImode, REGNO (operands[0])));
alpha_set_memflags (seq, operands[1]);
}

21
gcc/reload.c
View File

@ -400,8 +400,6 @@ push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
t_icode = icode;
icode = CODE_FOR_nothing;
}
secondary_type = in_p ? RELOAD_FOR_INPUT : RELOAD_FOR_OUTPUT;
}
/* This case isn't valid, so fail. Reload is allowed to use the same
@ -3930,11 +3928,8 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
for (i = 0; i < n_reloads; i++)
{
if (rld[i].secondary_p
&& rld[i].when_needed == operand_type[rld[i].opnum]
&& (operand_reloadnum[rld[i].opnum] < 0
|| (rld[operand_reloadnum[rld[i].opnum]].secondary_in_icode == -1
&& rld[operand_reloadnum[rld[i].opnum]].secondary_out_icode == -1)))
rld[i].when_needed = address_type[rld[i].opnum];
&& rld[i].when_needed == operand_type[rld[i].opnum])
rld[i].when_needed = address_type[rld[i].opnum];
if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
|| rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
@ -3953,15 +3948,13 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
int secondary_in_reload = rld[i].secondary_in_reload;
rld[secondary_in_reload].when_needed
= (rld[i].secondary_in_icode == -1
? RELOAD_FOR_OPADDR_ADDR
: RELOAD_FOR_OPERAND_ADDRESS);
= RELOAD_FOR_OPADDR_ADDR;
/* If there's a tertiary reload we have to change it also. */
if (secondary_in_reload > 0
&& rld[secondary_in_reload].secondary_in_reload != -1)
rld[rld[secondary_in_reload].secondary_in_reload].when_needed
= rld[secondary_in_reload].when_needed;
= RELOAD_FOR_OPADDR_ADDR;
}
if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
@ -3971,15 +3964,13 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
int secondary_out_reload = rld[i].secondary_out_reload;
rld[secondary_out_reload].when_needed
= (rld[i].secondary_out_icode == -1
? RELOAD_FOR_OPADDR_ADDR
: RELOAD_FOR_OPERAND_ADDRESS);
= RELOAD_FOR_OPADDR_ADDR;
/* If there's a tertiary reload we have to change it also. */
if (secondary_out_reload
&& rld[secondary_out_reload].secondary_out_reload != -1)
rld[rld[secondary_out_reload].secondary_out_reload].when_needed
= rld[secondary_out_reload].when_needed;
= RELOAD_FOR_OPADDR_ADDR;
}
if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS