hpux.h (TARGET_STRUCT_ARG_REG_LITTLE_ENDIAN): Remove definition
* config/ia64/hpux.h (TARGET_STRUCT_ARG_REG_LITTLE_ENDIAN): Remove definition (MEMBER_TYPE_FORCES_BLK): Move. * config/ia64/ia64.c (ia64_function_arg): Use PARALLEL to pass aggregate arguments. (ia64_function_value): Use PARALLEL to return aggregate values. From-SVN: r59963
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@ -1,3 +1,12 @@
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2002-12-09 Steve Ellcey <sje@cup.hp.com>
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* config/ia64/hpux.h (TARGET_STRUCT_ARG_REG_LITTLE_ENDIAN): Remove
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definition
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(MEMBER_TYPE_FORCES_BLK): Move.
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* config/ia64/ia64.c (ia64_function_arg): Use PARALLEL to pass
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aggregate arguments.
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(ia64_function_value): Use PARALLEL to return aggregate values.
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2002-12-09 Steve Ellcey <sje@cup.hp.com>
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* doc/tm.texi (FUNCTION_ARG_REG_LITTLE_ENDIAN): Remove definition.
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@ -108,9 +108,9 @@ do { \
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field to be treated as structures and not as the type of their
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field. Without this a structure with a single char will be
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returned just like a char variable and that is wrong on HP-UX
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IA64. TARGET_STRUCT_ARG_REG_LITTLE_ENDIAN triggers the special
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structure handling, this macro simply ensures that single field
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structures are always treated like structures. */
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IA64. */
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#define MEMBER_TYPE_FORCES_BLK(FIELD, MODE) (TREE_CODE (TREE_TYPE (FIELD)) != REAL_TYPE || (MODE == TFmode && !INTEL_EXTENDED_IEEE_FORMAT))
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/* ASM_OUTPUT_EXTERNAL_LIBCALL defaults to just a globalize_label call,
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but that doesn't put out the @function type information which causes
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@ -123,18 +123,6 @@ do { \
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ASM_OUTPUT_TYPE_DIRECTIVE (FILE, XSTR (FUN, 0), "function"); \
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} while (0)
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#define MEMBER_TYPE_FORCES_BLK(FIELD, MODE) (TREE_CODE (TREE_TYPE (FIELD)) != REAL_TYPE || (MODE == TFmode && !INTEL_EXTENDED_IEEE_FORMAT))
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/* Override the setting of FUNCTION_ARG_REG_LITTLE_ENDIAN in
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defaults.h. Setting this to true means that we are not passing
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structures in registers in the "normal" big-endian way. See
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See section 8.5 of the "Itanium Software Conventions and Runtime
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Architecture", specifically Table 8-1 and the explanation of Byte 0
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alignment and LSB alignment and a description of how structures
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are passed. */
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#define FUNCTION_ARG_REG_LITTLE_ENDIAN 1
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#undef FUNCTION_ARG_PADDING
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#define FUNCTION_ARG_PADDING(MODE, TYPE) \
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ia64_hpux_function_arg_padding ((MODE), (TYPE))
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@ -3309,7 +3309,25 @@ ia64_function_arg (cum, mode, type, named, incoming)
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happen when we have a SFmode HFA. */
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else if (((mode == TFmode) && ! INTEL_EXTENDED_IEEE_FORMAT)
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|| (! FLOAT_MODE_P (mode) || cum->fp_regs == MAX_ARGUMENT_SLOTS))
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return gen_rtx_REG (mode, basereg + cum->words + offset);
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{
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int byte_size = ((mode == BLKmode)
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? int_size_in_bytes (type) : GET_MODE_SIZE (mode));
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if (BYTES_BIG_ENDIAN
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&& (mode == BLKmode || (type && AGGREGATE_TYPE_P (type)))
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&& byte_size < UNITS_PER_WORD
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&& byte_size > 0)
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{
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rtx gr_reg = gen_rtx_EXPR_LIST (VOIDmode,
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gen_rtx_REG (DImode,
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(basereg + cum->words
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+ offset)),
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const0_rtx);
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return gen_rtx_PARALLEL (mode, gen_rtvec (1, gr_reg));
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}
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else
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return gen_rtx_REG (mode, basereg + cum->words + offset);
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}
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/* If there is a prototype, then FP values go in a FR register when
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named, and in a GR registeer when unnamed. */
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@ -3596,7 +3614,30 @@ ia64_function_value (valtype, func)
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((mode != TFmode) || INTEL_EXTENDED_IEEE_FORMAT))
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return gen_rtx_REG (mode, FR_ARG_FIRST);
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else
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return gen_rtx_REG (mode, GR_RET_FIRST);
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{
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if (BYTES_BIG_ENDIAN
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&& (mode == BLKmode || (valtype && AGGREGATE_TYPE_P (valtype))))
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{
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rtx loc[8];
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int offset;
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int bytesize;
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int i;
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offset = 0;
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bytesize = int_size_in_bytes (valtype);
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for (i = 0; offset < bytesize; i++)
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{
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loc[i] = gen_rtx_EXPR_LIST (VOIDmode,
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gen_rtx_REG (DImode,
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GR_RET_FIRST + i),
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GEN_INT (offset));
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offset += UNITS_PER_WORD;
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}
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return gen_rtx_PARALLEL (mode, gen_rtvec_v (i, loc));
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}
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else
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return gen_rtx_REG (mode, GR_RET_FIRST);
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}
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}
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/* Print a memory address as an operand to reference that memory location. */
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