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x86: Use crc32 target option for CRC32 intrinsics

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Use crc32 target option for CRC32 intrinsics to support CRC32 intrinsics
without enabling SSE vector instructions.

	* config/i386/i386-c.c (ix86_target_macros_internal): Define
	__CRC32__ for -mcrc32.
	* config/i386/i386-options.c (ix86_option_override_internal):
	Enable crc32 instruction for -msse4.2.
	* config/i386/i386.md (sse4_2_crc32<mode>): Remove TARGET_SSE4_2
	check.
	(sse4_2_crc32di): Likewise.
	* config/i386/ia32intrin.h: Use crc32 target option for CRC32
	intrinsics.
This commit is contained in:
H.J. Lu 2021-04-15 05:59:48 -07:00
parent 54995d98cc
commit 39671f87b2
4 changed files with 23 additions and 16 deletions
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2
gcc/config/i386/i386-c.c
View File

@ -532,6 +532,8 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
def_or_undef (parse_in, "__LZCNT__");
if (isa_flag & OPTION_MASK_ISA_TBM)
def_or_undef (parse_in, "__TBM__");
if (isa_flag & OPTION_MASK_ISA_CRC32)
def_or_undef (parse_in, "__CRC32__");
if (isa_flag & OPTION_MASK_ISA_POPCNT)
def_or_undef (parse_in, "__POPCNT__");
if (isa_flag & OPTION_MASK_ISA_FSGSBASE)

5
gcc/config/i386/i386-options.c
View File

@ -2617,6 +2617,11 @@ ix86_option_override_internal (bool main_args_p,
opts->x_ix86_isa_flags
|= OPTION_MASK_ISA_POPCNT & ~opts->x_ix86_isa_flags_explicit;
/* Enable crc32 instruction for -msse4.2. */
if (TARGET_SSE4_2_P (opts->x_ix86_isa_flags))
opts->x_ix86_isa_flags
|= OPTION_MASK_ISA_CRC32 & ~opts->x_ix86_isa_flags_explicit;
/* Enable lzcnt instruction for -mabm. */
if (TARGET_ABM_P(opts->x_ix86_isa_flags))
opts->x_ix86_isa_flags

4
gcc/config/i386/i386.md
View File

@ -20998,7 +20998,7 @@
[(match_operand:SI 1 "register_operand" "0")
(match_operand:SWI124 2 "nonimmediate_operand" "<r>m")]
UNSPEC_CRC32))]
"TARGET_SSE4_2 || TARGET_CRC32"
"TARGET_CRC32"
"crc32{<imodesuffix>}\t{%2, %0|%0, %2}"
[(set_attr "type" "sselog1")
(set_attr "prefix_rep" "1")
@ -21019,7 +21019,7 @@
[(match_operand:DI 1 "register_operand" "0")
(match_operand:DI 2 "nonimmediate_operand" "rm")]
UNSPEC_CRC32))]
"TARGET_64BIT && (TARGET_SSE4_2 || TARGET_CRC32)"
"TARGET_64BIT && TARGET_CRC32"
"crc32{q}\t{%2, %0|%0, %2}"
[(set_attr "type" "sselog1")
(set_attr "prefix_rep" "1")

28
gcc/config/i386/ia32intrin.h
View File

@ -51,11 +51,11 @@ __bswapd (int __X)
#ifndef __iamcu__
#ifndef __SSE4_2__
#ifndef __CRC32__
#pragma GCC push_options
#pragma GCC target("sse4.2")
#define __DISABLE_SSE4_2__
#endif /* __SSE4_2__ */
#pragma GCC target("crc32")
#define __DISABLE_CRC32__
#endif /* __CRC32__ */
/* 32bit accumulate CRC32 (polynomial 0x11EDC6F41) value. */
extern __inline unsigned int
@ -79,10 +79,10 @@ __crc32d (unsigned int __C, unsigned int __V)
return __builtin_ia32_crc32si (__C, __V);
}
#ifdef __DISABLE_SSE4_2__
#undef __DISABLE_SSE4_2__
#ifdef __DISABLE_CRC32__
#undef __DISABLE_CRC32__
#pragma GCC pop_options
#endif /* __DISABLE_SSE4_2__ */
#endif /* __DISABLE_CRC32__ */
#endif /* __iamcu__ */
@ -199,11 +199,11 @@ __bswapq (long long __X)
return __builtin_bswap64 (__X);
}
#ifndef __SSE4_2__
#ifndef __CRC32__
#pragma GCC push_options
#pragma GCC target("sse4.2")
#define __DISABLE_SSE4_2__
#endif /* __SSE4_2__ */
#pragma GCC target("crc32")
#define __DISABLE_CRC32__
#endif /* __CRC32__ */
/* 64bit accumulate CRC32 (polynomial 0x11EDC6F41) value. */
extern __inline unsigned long long
@ -213,10 +213,10 @@ __crc32q (unsigned long long __C, unsigned long long __V)
return __builtin_ia32_crc32di (__C, __V);
}
#ifdef __DISABLE_SSE4_2__
#undef __DISABLE_SSE4_2__
#ifdef __DISABLE_CRC32__
#undef __DISABLE_CRC32__
#pragma GCC pop_options
#endif /* __DISABLE_SSE4_2__ */
#endif /* __DISABLE_CRC32__ */
/* 64bit popcnt */
extern __inline long long