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zero_bits_compound-1.c: Support aarch64.

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2016-06-14  Andre Vieira  <andre.simoesdiasvieira@arm.com>

gcc/testsuite/ChangeLog:
	* gcc.dg/zero_bits_compound-1.c: Support aarch64.
	* gcc.dg/zero_bits_compound-1.c: Likewise.

From-SVN: r237430
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Andre Vieira 2016-06-14 11:24:51 +00:00 committed by Andre Vieira
parent 04976c6e07
commit 3970e5458e
3 changed files with 7 additions and 2 deletions
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5
gcc/testsuite/ChangeLog
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@ -1,3 +1,8 @@
2016-06-14 Andre Vieira <andre.simoesdiasvieira@arm.com>
* gcc.dg/zero_bits_compound-1.c: Support aarch64.
* gcc.dg/zero_bits_compound-1.c: Likewise.
2016-06-14 Richard Biener <rguenther@suse.de>
PR tree-optimization/71522

2
gcc/testsuite/gcc.dg/zero_bits_compound-1.c
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@ -4,7 +4,7 @@
/* Note: This test requires that char, int and long have different sizes and the
target has a way to do 32 -> 64 bit zero extension other than AND. */
/* { dg-do compile { target x86_64-*-* s390*-*-* } } */
/* { dg-do compile { target x86_64-*-* s390*-*-* aarch64*-*-* } } */
/* { dg-require-effective-target lp64 } */
/* { dg-options "-O3 -dP" } */

2
gcc/testsuite/gcc.dg/zero_bits_compound-2.c
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@ -1,7 +1,7 @@
/* Test whether an AND mask or'ed with the know zero bits that equals a mode
mask is a candidate for zero extendion. */
/* { dg-do compile { target x86_64-*-* s390*-*-* } } */
/* { dg-do compile { target x86_64-*-* s390*-*-* aarch64*-*-* } } */
/* { dg-require-effective-target lp64 } */
/* { dg-options "-O3 -dP" } */