arm.c (thumb1_reorg): Check that the comparison is against the constant 0.
2016-01-18 Thomas Preud'homme <thomas.preudhomme@arm.com> gcc/ * config/arm/arm.c (thumb1_reorg): Check that the comparison is against the constant 0. From-SVN: r232493
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@ -1,3 +1,8 @@
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2016-01-18 Thomas Preud'homme <thomas.preudhomme@arm.com>
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* config/arm/arm.c (thumb1_reorg): Check that the comparison is
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against the constant 0.
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2016-01-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
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2016-01-17 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
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PR tree-optimization/68799
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PR tree-optimization/68799
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@ -17206,7 +17206,7 @@ thumb1_reorg (void)
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FOR_EACH_BB_FN (bb, cfun)
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FOR_EACH_BB_FN (bb, cfun)
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{
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{
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rtx dest, src;
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rtx dest, src;
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rtx pat, op0, set = NULL;
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rtx cmp, op0, op1, set = NULL;
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rtx_insn *prev, *insn = BB_END (bb);
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rtx_insn *prev, *insn = BB_END (bb);
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bool insn_clobbered = false;
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bool insn_clobbered = false;
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@ -17219,8 +17219,13 @@ thumb1_reorg (void)
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continue;
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continue;
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/* Get the register with which we are comparing. */
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/* Get the register with which we are comparing. */
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pat = PATTERN (insn);
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cmp = XEXP (SET_SRC (PATTERN (insn)), 0);
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op0 = XEXP (XEXP (SET_SRC (pat), 0), 0);
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op0 = XEXP (cmp, 0);
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op1 = XEXP (cmp, 1);
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/* Check that comparison is against ZERO. */
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if (!CONST_INT_P (op1) || INTVAL (op1) != 0)
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continue;
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/* Find the first flag setting insn before INSN in basic block BB. */
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/* Find the first flag setting insn before INSN in basic block BB. */
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gcc_assert (insn != BB_HEAD (bb));
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gcc_assert (insn != BB_HEAD (bb));
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@ -17260,7 +17265,7 @@ thumb1_reorg (void)
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PATTERN (prev) = gen_rtx_SET (dest, src);
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PATTERN (prev) = gen_rtx_SET (dest, src);
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INSN_CODE (prev) = -1;
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INSN_CODE (prev) = -1;
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/* Set test register in INSN to dest. */
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/* Set test register in INSN to dest. */
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XEXP (XEXP (SET_SRC (pat), 0), 0) = copy_rtx (dest);
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XEXP (cmp, 0) = copy_rtx (dest);
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INSN_CODE (insn) = -1;
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INSN_CODE (insn) = -1;
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}
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}
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}
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}
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