pa.md: Delete the two remaining define_peephole patterns.
* config/pa/pa.md: Delete the two remaining define_peephole patterns. From-SVN: r84908
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@ -1,3 +1,8 @@
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2004-07-18 Zack Weinberg <zack@codesourcery.com>
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* config/pa/pa.md: Delete the two remaining define_peephole
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patterns.
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2004-07-10 Steven Bosscher <stevenb@suse.de>
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Joseph S. Myers <jsm@polyomino.org.uk>
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@ -8959,82 +8959,6 @@ add,l %2,%3,%3\;bv,n %%r0(%3)"
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[(set_attr "type" "fpalu")
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(set_attr "length" "4")])
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;; Clean up turds left by reload.
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(define_peephole
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[(set (match_operand 0 "move_dest_operand" "")
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(match_operand 1 "register_operand" "fr"))
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(set (match_operand 2 "register_operand" "fr")
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(match_dup 0))]
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"!TARGET_SOFT_FLOAT
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&& GET_CODE (operands[0]) == MEM
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&& ! MEM_VOLATILE_P (operands[0])
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&& GET_MODE (operands[0]) == GET_MODE (operands[1])
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&& GET_MODE (operands[0]) == GET_MODE (operands[2])
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&& GET_MODE (operands[0]) == DFmode
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&& GET_CODE (operands[1]) == REG
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&& GET_CODE (operands[2]) == REG
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&& ! side_effects_p (XEXP (operands[0], 0))
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&& REGNO_REG_CLASS (REGNO (operands[1]))
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== REGNO_REG_CLASS (REGNO (operands[2]))"
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"*
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{
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rtx xoperands[2];
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if (FP_REG_P (operands[1]))
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output_asm_insn (output_fp_move_double (operands), operands);
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else
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output_asm_insn (output_move_double (operands), operands);
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if (rtx_equal_p (operands[1], operands[2]))
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return \"\";
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xoperands[0] = operands[2];
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xoperands[1] = operands[1];
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if (FP_REG_P (xoperands[1]))
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output_asm_insn (output_fp_move_double (xoperands), xoperands);
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else
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output_asm_insn (output_move_double (xoperands), xoperands);
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return \"\";
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}")
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(define_peephole
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[(set (match_operand 0 "register_operand" "fr")
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(match_operand 1 "move_src_operand" ""))
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(set (match_operand 2 "register_operand" "fr")
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(match_dup 1))]
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"!TARGET_SOFT_FLOAT
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&& GET_CODE (operands[1]) == MEM
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&& ! MEM_VOLATILE_P (operands[1])
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&& GET_MODE (operands[0]) == GET_MODE (operands[1])
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&& GET_MODE (operands[0]) == GET_MODE (operands[2])
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&& GET_MODE (operands[0]) == DFmode
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&& GET_CODE (operands[0]) == REG
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&& GET_CODE (operands[2]) == REG
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&& ! side_effects_p (XEXP (operands[1], 0))
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&& REGNO_REG_CLASS (REGNO (operands[0]))
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== REGNO_REG_CLASS (REGNO (operands[2]))"
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"*
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{
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rtx xoperands[2];
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if (FP_REG_P (operands[0]))
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output_asm_insn (output_fp_move_double (operands), operands);
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else
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output_asm_insn (output_move_double (operands), operands);
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xoperands[0] = operands[2];
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xoperands[1] = operands[0];
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if (FP_REG_P (xoperands[1]))
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output_asm_insn (output_fp_move_double (xoperands), xoperands);
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else
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output_asm_insn (output_move_double (xoperands), xoperands);
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return \"\";
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}")
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;; Flush the I and D cache lines from the start address (operand0)
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;; to the end address (operand1). No lines are flushed if the end
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;; address is less than the start address (unsigned).
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