rs6000.c (rs6000_gimple_fold_builtin): Add handling for early expansion of vector subtract builtins.
2016-12-19 Will Schmidt <will_schmidt@vnet.ibm.com> * config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Add handling for early expansion of vector subtract builtins. [gcc/testsuite] 2016-12-19 Will Schmidt <will_schmidt@vnet.ibm.com> * gcc.target/powerpc/fold-vec-sub-char.c: New. * gcc.target/powerpc/fold-vec-sub-float.c: New. * gcc.target/powerpc/fold-vec-sub-floatdouble.c: New. * gcc.target/powerpc/fold-vec-sub-int.c: New. * gcc.target/powerpc/fold-vec-sub-int128.c: New. * gcc.target/powerpc/fold-vec-sub-longlong.c: New. * gcc.target/powerpc/fold-vec-sub-short.c: New. From-SVN: r243806
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2016-12-19 Will Schmidt <will_schmidt@vnet.ibm.com>
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* config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Add handling for
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early expansion of vector subtract builtins.
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2016-12-19 Chenghua Xu <paul.hua.gm@gmail.com>
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* MAINTAINERS (Write After Approval): Add myself.
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@ -16564,6 +16564,24 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)
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gsi_replace (gsi, g, true);
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return true;
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}
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/* Flavors of vec_sub. We deliberately don't expand
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P8V_BUILTIN_VSUBUQM. */
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case ALTIVEC_BUILTIN_VSUBUBM:
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case ALTIVEC_BUILTIN_VSUBUHM:
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case ALTIVEC_BUILTIN_VSUBUWM:
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case P8V_BUILTIN_VSUBUDM:
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case ALTIVEC_BUILTIN_VSUBFP:
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case VSX_BUILTIN_XVSUBDP:
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{
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arg0 = gimple_call_arg (stmt, 0);
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arg1 = gimple_call_arg (stmt, 1);
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lhs = gimple_call_lhs (stmt);
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gimple *g = gimple_build_assign (lhs, MINUS_EXPR, arg0, arg1);
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gimple_set_location (g, gimple_location (stmt));
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gsi_replace (gsi, g, true);
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return true;
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}
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default:
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break;
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}
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2016-12-19 Will Schmidt <will_schmidt@vnet.ibm.com>
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* gcc.target/powerpc/fold-vec-sub-char.c: New.
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* gcc.target/powerpc/fold-vec-sub-float.c: New.
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* gcc.target/powerpc/fold-vec-sub-floatdouble.c: New.
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* gcc.target/powerpc/fold-vec-sub-int.c: New.
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* gcc.target/powerpc/fold-vec-sub-int128.c: New.
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* gcc.target/powerpc/fold-vec-sub-longlong.c: New.
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* gcc.target/powerpc/fold-vec-sub-short.c: New.
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2016-12-19 Dominik Vogt <vogt@linux.vnet.ibm.com>
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PR target/78748
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@ -0,0 +1,46 @@
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/* Verify that overloaded built-ins for vec_sub with char
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inputs produce the right results. */
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/* { dg-do compile } */
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/* { dg-require-effective-target powerpc_altivec_ok } */
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/* { dg-options "-maltivec" } */
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#include <altivec.h>
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vector signed char
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test1 (vector bool char x, vector signed char y)
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{
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return vec_sub (x, y);
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}
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vector signed char
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test2 (vector signed char x, vector bool char y)
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{
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return vec_sub (x, y);
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}
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vector signed char
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test3 (vector signed char x, vector signed char y)
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{
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return vec_sub (x, y);
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}
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vector unsigned char
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test4 (vector bool char x, vector unsigned char y)
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{
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return vec_sub (x, y);
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}
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vector unsigned char
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test5 (vector unsigned char x, vector bool char y)
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{
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return vec_sub (x, y);
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}
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vector unsigned char
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test6 (vector unsigned char x, vector unsigned char y)
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{
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return vec_sub (x, y);
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}
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/* { dg-final { scan-assembler-times "vsububm" 6 } } */
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@ -0,0 +1,17 @@
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/* Verify that overloaded built-ins for vec_sub with float
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inputs produce the right results. */
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/* { dg-do compile } */
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/* { dg-require-effective-target powerpc_altivec_ok } */
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/* { dg-options "-maltivec -mno-vsx" } */
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#include <altivec.h>
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vector float
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test1 (vector float x, vector float y)
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{
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return vec_sub (x, y);
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}
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/* { dg-final { scan-assembler-times "vsubfp" 1 } } */
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/* Verify that overloaded built-ins for vec_sub with float and
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double inputs for VSX produce the right results. */
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/* { dg-do compile } */
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/* { dg-require-effective-target powerpc_vsx_ok } */
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/* { dg-options "-maltivec -mvsx" } */
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#include <altivec.h>
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vector float
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test1 (vector float x, vector float y)
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{
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return vec_sub (x, y);
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}
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vector double
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test2 (vector double x, vector double y)
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{
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return vec_sub (x, y);
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}
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/* { dg-final { scan-assembler-times "xvsubsp" 1 } } */
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/* { dg-final { scan-assembler-times "xvsubdp" 1 } } */
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@ -0,0 +1,47 @@
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/* Verify that overloaded built-ins for vec_sub with int
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inputs produce the right results. */
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/* { dg-do compile } */
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/* { dg-require-effective-target powerpc_altivec_ok } */
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/* { dg-options "-maltivec" } */
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#include <altivec.h>
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vector signed int
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test1 (vector bool int x, vector signed int y)
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{
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return vec_sub (x, y);
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}
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vector signed int
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test2 (vector signed int x, vector bool int y)
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{
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return vec_sub (x, y);
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}
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vector signed int
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test3 (vector signed int x, vector signed int y)
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{
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return vec_sub (x, y);
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}
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vector unsigned int
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test4 (vector bool int x, vector unsigned int y)
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{
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return vec_sub (x, y);
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}
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vector unsigned int
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test5 (vector unsigned int x, vector bool int y)
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{
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return vec_sub (x, y);
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}
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vector unsigned int
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test6 (vector unsigned int x, vector unsigned int y)
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{
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return vec_sub (x, y);
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}
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/* { dg-final { scan-assembler-times "vsubuwm" 6 } } */
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/* Verify that overloaded built-ins for vec_sub with __int128
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inputs produce the right results. */
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/* { dg-do compile } */
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/* { dg-require-effective-target powerpc_p8vector_ok } */
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/* { dg-require-effective-target int128 } */
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/* { dg-options "-maltivec -mvsx -mpower8-vector" } */
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/* { dg-additional-options "-maix64" { target powerpc-ibm-aix* } } */
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#include "altivec.h"
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vector signed __int128
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test1 (vector signed __int128 x, vector signed __int128 y)
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{
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return vec_sub (x, y);
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}
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vector unsigned __int128
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test2 (vector unsigned __int128 x, vector unsigned __int128 y)
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{
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return vec_sub (x, y);
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}
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/* { dg-final { scan-assembler-times "vsubuqm" 2 } } */
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/* Verify that overloaded built-ins for vec_sub with long long
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inputs produce the right results. */
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/* { dg-do compile } */
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/* { dg-require-effective-target powerpc_p8vector_ok } */
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/* { dg-options "-maltivec -mvsx -mpower8-vector" } */
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#include <altivec.h>
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vector signed long long
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test1 (vector bool long long x, vector signed long long y)
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{
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return vec_sub (x, y);
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}
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vector signed long long
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test2 (vector signed long long x, vector bool long long y)
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{
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return vec_sub (x, y);
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}
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vector signed long long
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test3 (vector signed long long x, vector signed long long y)
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{
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return vec_sub (x, y);
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}
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vector unsigned long long
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test4 (vector bool long long x, vector unsigned long long y)
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{
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return vec_sub (x, y);
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}
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vector unsigned long long
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test5 (vector unsigned long long x, vector bool long long y)
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{
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return vec_sub (x, y);
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}
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vector unsigned long long
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test6 (vector unsigned long long x, vector unsigned long long y)
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{
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return vec_sub (x, y);
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}
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/* { dg-final { scan-assembler-times "vsubudm" 6 } } */
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/* Verify that overloaded built-ins for vec_sub with short
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inputs produce the right results. */
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/* { dg-do compile } */
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/* { dg-require-effective-target powerpc_altivec_ok } */
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/* { dg-options "-maltivec" } */
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#include <altivec.h>
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vector signed short
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test1 (vector bool short x, vector signed short y)
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{
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return vec_sub (x, y);
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}
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vector signed short
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test2 (vector signed short x, vector bool short y)
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{
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return vec_sub (x, y);
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}
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vector signed short
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test3 (vector signed short x, vector signed short y)
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{
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return vec_sub (x, y);
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}
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vector unsigned short
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test4 (vector bool short x, vector unsigned short y)
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{
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return vec_sub (x, y);
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}
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vector unsigned short
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test5 (vector unsigned short x, vector bool short y)
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{
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return vec_sub (x, y);
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}
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vector unsigned short
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test6 (vector unsigned short x, vector unsigned short y)
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{
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return vec_sub (x, y);
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}
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/* { dg-final { scan-assembler-times "vsubuhm" 6 } } */
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