Preparatory work for PR target/21623:

* alpha.c (secondary_reload_class): Rename to:
	(alpha_secondary_reload_class).
	* alpha.h, alpha-protos.h: Likewise.
	* mn10300.c (secondary_reload_class): Rename to:
	(mn10300_secondary_reload_class).
	* mn10300.h, mn10300-protos.h: Likewise.
	* pa.c (secondary_reload_class): Rename to:
	(pa_secondary_reload_class).
	* pa.h, pa-protos.h: Likewise.
	* rs6000.c (secondary_reload_class): Rename to:
	rs6000_secondary_reload_class.
	* rs6000.h, rs6000-protos.h: Likewise.

From-SVN: r107381
This commit is contained in:
J"orn Rennecke 2005-11-22 22:57:35 +00:00 committed by Joern Rennecke
parent 73e5b024f8
commit 3c4774e08c
13 changed files with 39 additions and 21 deletions

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@ -1,3 +1,19 @@
2005-11-22 J"orn Rennecke <joern.rennecke@st.com>
Preparatory work for PR target/21623:
* alpha.c (secondary_reload_class): Rename to:
(alpha_secondary_reload_class).
* alpha.h, alpha-protos.h: Likewise.
* mn10300.c (secondary_reload_class): Rename to:
(mn10300_secondary_reload_class).
* mn10300.h, mn10300-protos.h: Likewise.
* pa.c (secondary_reload_class): Rename to:
(pa_secondary_reload_class).
* pa.h, pa-protos.h: Likewise.
* rs6000.c (secondary_reload_class): Rename to:
rs6000_secondary_reload_class.
* rs6000.h, rs6000-protos.h: Likewise.
2005-11-22 Eric Botcazou <ebotcazou@adacore.com>
PR middle-end/22561

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@ -53,8 +53,9 @@ extern rtx split_small_symbolic_operand (rtx);
extern void get_aligned_mem (rtx, rtx *, rtx *);
extern rtx get_unaligned_address (rtx, int);
extern enum reg_class alpha_preferred_reload_class (rtx, enum reg_class);
extern enum reg_class secondary_reload_class (enum reg_class,
enum machine_mode, rtx, int);
extern enum reg_class alpha_secondary_reload_class (enum reg_class,
enum machine_mode, rtx,
int);
extern void alpha_set_memflags (rtx, rtx);
extern bool alpha_split_const_mov (enum machine_mode, rtx *);

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@ -1597,7 +1597,7 @@ alpha_preferred_reload_class(rtx x, enum reg_class class)
from register elimination into a DImode fp register. */
enum reg_class
secondary_reload_class (enum reg_class class, enum machine_mode mode,
alpha_secondary_reload_class (enum reg_class class, enum machine_mode mode,
rtx x, int in)
{
if ((mode == QImode || mode == HImode) && ! TARGET_BWX)

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@ -672,10 +672,10 @@ enum reg_class {
FP register. */
#define SECONDARY_INPUT_RELOAD_CLASS(CLASS,MODE,IN) \
secondary_reload_class((CLASS), (MODE), (IN), 1)
alpha_secondary_reload_class((CLASS), (MODE), (IN), 1)
#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS,MODE,OUT) \
secondary_reload_class((CLASS), (MODE), (OUT), 0)
alpha_secondary_reload_class((CLASS), (MODE), (OUT), 0)
/* If we are copying between general and FP registers, we need a memory
location unless the FIX extension is available. */

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@ -36,8 +36,8 @@ extern void mn10300_print_reg_list (FILE *, int);
extern int mn10300_get_live_callee_saved_regs (void);
extern void mn10300_gen_multiple_store (int);
extern void notice_update_cc (rtx, rtx);
extern enum reg_class secondary_reload_class (enum reg_class,
enum machine_mode, rtx);
extern enum reg_class mn10300_secondary_reload_class (enum reg_class,
enum machine_mode, rtx);
extern const char *output_tst (rtx, rtx);
extern int store_multiple_operation (rtx, enum machine_mode);
extern int symbolic_operand (rtx, enum machine_mode);

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@ -1337,7 +1337,8 @@ store_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
We might be able to simplify this. */
enum reg_class
secondary_reload_class (enum reg_class class, enum machine_mode mode, rtx in)
mn10300_secondary_reload_class (enum reg_class class, enum machine_mode mode,
rtx in)
{
/* Memory loads less than a full word wide can't have an
address or stack pointer destination. They must use

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@ -425,7 +425,7 @@ enum reg_class {
(!TARGET_AM33 && (MODE == QImode || MODE == HImode) ? DATA_REGS : CLASS)
#define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
secondary_reload_class(CLASS,MODE,IN)
mn10300_secondary_reload_class(CLASS,MODE,IN)
/* Return the maximum number of consecutive registers
needed to represent mode MODE in a register of class CLASS. */

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@ -106,8 +106,8 @@ extern int emit_move_sequence (rtx *, enum machine_mode, rtx);
extern int emit_hpdiv_const (rtx *, int);
extern int is_function_label_plus_const (rtx);
extern int jump_in_call_delay (rtx);
extern enum reg_class secondary_reload_class (enum reg_class,
enum machine_mode, rtx);
extern enum reg_class pa_secondary_reload_class (enum reg_class,
enum machine_mode, rtx);
extern int hppa_fpstore_bypass_p (rtx, rtx);
extern int attr_length_millicode_call (rtx);
extern int attr_length_call (rtx, int);

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@ -5576,7 +5576,7 @@ output_arg_descriptor (rtx call_insn)
It might be worthwhile to try and make this a leaf function too. */
enum reg_class
secondary_reload_class (enum reg_class class, enum machine_mode mode, rtx in)
pa_secondary_reload_class (enum reg_class class, enum machine_mode mode, rtx in)
{
int regno, is_symbolic;
@ -5589,7 +5589,7 @@ secondary_reload_class (enum reg_class class, enum machine_mode mode, rtx in)
return R1_REGS;
/* Profiling showed the PA port spends about 1.3% of its compilation
time in true_regnum from calls inside secondary_reload_class. */
time in true_regnum from calls inside pa_secondary_reload_class. */
if (GET_CODE (in) == REG)
{
@ -5628,7 +5628,7 @@ secondary_reload_class (enum reg_class class, enum machine_mode mode, rtx in)
in = XEXP (in, 0);
/* Profiling has showed GCC spends about 2.6% of its compilation
time in symbolic_operand from calls inside secondary_reload_class.
time in symbolic_operand from calls inside pa_secondary_reload_class.
We use an inline copy and only compute its return value once to avoid
useless work. */

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@ -535,7 +535,7 @@ extern struct rtx_def *hppa_pic_save_rtx (void);
#define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
((CLASS == BASE_REG_CLASS && GET_CODE (IN) == REG \
&& REGNO (IN) < FIRST_PSEUDO_REGISTER) \
? NO_REGS : secondary_reload_class (CLASS, MODE, IN))
? NO_REGS : pa_secondary_reload_class (CLASS, MODE, IN))
#define MAYBE_FP_REG_CLASS_P(CLASS) \
reg_classes_intersect_p ((CLASS), FP_REGS)

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@ -64,8 +64,8 @@ extern int insvdi_rshift_rlwimi_p (rtx, rtx, rtx);
extern int registers_ok_for_quad_peep (rtx, rtx);
extern int mems_ok_for_quad_peep (rtx, rtx);
extern bool gpr_or_gpr_p (rtx, rtx);
extern enum reg_class secondary_reload_class (enum reg_class,
enum machine_mode, rtx);
extern enum reg_class rs6000_secondary_reload_class (enum reg_class,
enum machine_mode, rtx);
extern int ccr_bit (rtx, int);
extern int extract_MB (rtx);
extern int extract_ME (rtx);

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@ -9761,9 +9761,9 @@ mems_ok_for_quad_peep (rtx mem1, rtx mem2)
NO_REGS is returned. */
enum reg_class
secondary_reload_class (enum reg_class class,
enum machine_mode mode ATTRIBUTE_UNUSED,
rtx in)
rs6000_secondary_reload_class (enum reg_class class,
enum machine_mode mode ATTRIBUTE_UNUSED,
rtx in)
{
int regno;

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@ -1187,7 +1187,7 @@ enum reg_class
NO_REGS is returned. */
#define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
secondary_reload_class (CLASS, MODE, IN)
rs6000_secondary_reload_class (CLASS, MODE, IN)
/* If we are copying between FP or AltiVec registers and anything
else, we need a memory location. */