(all movstri recognizers): Eliminate updating the pointers.
From-SVN: r9855
This commit is contained in:
parent
35f456e397
commit
3c67b67326
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@ -4732,12 +4732,6 @@
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(define_expand "movstrsi_8reg"
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[(parallel [(set (mem:BLK (match_operand:SI 0 "register_operand" ""))
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(mem:BLK (match_operand:SI 1 "register_operand" "")))
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(set (match_dup 0)
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(plus:SI (match_dup 0)
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(match_operand:SI 4 "immediate_operand" "")))
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(set (match_dup 1)
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(plus:SI (match_dup 1)
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(match_dup 4)))
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(use (match_operand:SI 2 "immediate_operand" ""))
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(use (match_operand:SI 3 "immediate_operand" ""))
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(clobber (reg:SI 5))
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@ -4748,22 +4742,16 @@
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(clobber (reg:SI 10))
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(clobber (reg:SI 11))
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(clobber (reg:SI 12))
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(clobber (match_scratch:SI 5 ""))])]
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(clobber (match_scratch:SI 4 ""))])]
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"TARGET_STRING"
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"")
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(define_insn ""
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[(set (mem:BLK (match_operand:SI 0 "register_operand" "+&b,&b"))
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(mem:BLK (match_operand:SI 1 "register_operand" "+&b,&b")))
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(set (match_dup 0)
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(plus:SI (match_dup 0)
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(match_operand:SI 4 "immediate_operand" "O,i")))
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(set (match_dup 1)
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(plus:SI (match_dup 1)
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(match_dup 4)))
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(use (match_operand:SI 2 "immediate_operand" "i,i"))
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(use (match_operand:SI 3 "immediate_operand" "i,i"))
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(clobber (match_operand:SI 5 "register_operand" "r,r"))
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[(set (mem:BLK (match_operand:SI 0 "register_operand" "b"))
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(mem:BLK (match_operand:SI 1 "register_operand" "b")))
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(use (match_operand:SI 2 "immediate_operand" "i"))
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(use (match_operand:SI 3 "immediate_operand" "i"))
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(clobber (match_operand:SI 4 "register_operand" "=r"))
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(clobber (reg:SI 6))
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(clobber (reg:SI 7))
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(clobber (reg:SI 8))
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@ -4771,29 +4759,21 @@
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(clobber (reg:SI 10))
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(clobber (reg:SI 11))
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(clobber (reg:SI 12))
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(clobber (match_scratch:SI 6 "=q,q"))]
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(clobber (match_scratch:SI 5 "=q"))]
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"TARGET_STRING && TARGET_POWER
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&& ((INTVAL (operands[2]) > 24 && INTVAL (operands[2]) < 32) || INTVAL (operands[2]) == 0)
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&& (REGNO (operands[0]) < 5 || REGNO (operands[0]) > 12)
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&& (REGNO (operands[1]) < 5 || REGNO (operands[1]) > 12)
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&& REGNO (operands[5]) == 5"
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"@
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{lsi|lswi} %5,%1,%2\;{stsi|stswi} %5,%0,%2
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{lsi|lswi} %5,%1,%2\;{cal %0,%4(%0)|addi %0,%0,%4}\;{stsi|stswi} %5,%0,%2\;{cal %1,%4(%1)|addi %1,%1,%4}"
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[(set_attr "length" "8,16")])
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&& REGNO (operands[4]) == 5"
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"{lsi|lswi} %4,%1,%2\;{stsi|stswi} %4,%0,%2"
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[(set_attr "length" "8")])
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(define_insn ""
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[(set (mem:BLK (match_operand:SI 0 "register_operand" "+&b,&b"))
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(mem:BLK (match_operand:SI 1 "register_operand" "+&b,&b")))
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(set (match_dup 0)
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(plus:SI (match_dup 0)
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(match_operand:SI 4 "immediate_operand" "O,i")))
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(set (match_dup 1)
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(plus:SI (match_dup 1)
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(match_dup 4)))
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(use (match_operand:SI 2 "immediate_operand" "i,i"))
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(use (match_operand:SI 3 "immediate_operand" "i,i"))
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(clobber (match_operand:SI 5 "register_operand" "r,r"))
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[(set (mem:BLK (match_operand:SI 0 "register_operand" "b"))
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(mem:BLK (match_operand:SI 1 "register_operand" "b")))
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(use (match_operand:SI 2 "immediate_operand" "i"))
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(use (match_operand:SI 3 "immediate_operand" "i"))
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(clobber (match_operand:SI 4 "register_operand" "=r"))
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(clobber (reg:SI 6))
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(clobber (reg:SI 7))
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(clobber (reg:SI 8))
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@ -4801,28 +4781,20 @@
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(clobber (reg:SI 10))
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(clobber (reg:SI 11))
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(clobber (reg:SI 12))
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(clobber (match_scratch:SI 6 "X,X"))]
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(clobber (match_scratch:SI 5 "X"))]
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"TARGET_STRING && !TARGET_POWER
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&& ((INTVAL (operands[2]) > 24 && INTVAL (operands[2]) < 32) || INTVAL (operands[2]) == 0)
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&& (REGNO (operands[0]) < 5 || REGNO (operands[0]) > 12)
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&& (REGNO (operands[1]) < 5 || REGNO (operands[1]) > 12)
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&& REGNO (operands[5]) == 5"
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"@
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{lsi|lswi} %5,%1,%2\;{stsi|stswi} %5,%0,%2
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{lsi|lswi} %5,%1,%2\;{cal %0,%4(%0)|addi %0,%0,%4}\;{stsi|stswi} %5,%0,%2\;{cal %1,%4(%1)|addi %1,%1,%4}"
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[(set_attr "length" "8,16")])
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&& REGNO (operands[4]) == 5"
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"{lsi|lswi} %4,%1,%2\;{stsi|stswi} %4,%0,%2"
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[(set_attr "length" "8")])
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;; Move up to 24 bytes at a time. The fixed registers are needed because the
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;; register allocator doesn't have a clue about allocating 6 word registers
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(define_expand "movstrsi_6reg"
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[(parallel [(set (mem:BLK (match_operand:SI 0 "register_operand" ""))
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(mem:BLK (match_operand:SI 1 "register_operand" "")))
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(set (match_dup 0)
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(plus:SI (match_dup 0)
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(match_operand:SI 4 "immediate_operand" "")))
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(set (match_dup 1)
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(plus:SI (match_dup 1)
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(match_dup 4)))
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(use (match_operand:SI 2 "immediate_operand" ""))
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(use (match_operand:SI 3 "immediate_operand" ""))
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(clobber (reg:SI 7))
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@ -4831,252 +4803,170 @@
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(clobber (reg:SI 10))
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(clobber (reg:SI 11))
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(clobber (reg:SI 12))
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(clobber (match_scratch:SI 5 ""))])]
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(clobber (match_scratch:SI 4 ""))])]
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"TARGET_STRING"
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"")
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(define_insn ""
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[(set (mem:BLK (match_operand:SI 0 "register_operand" "+&b,&b"))
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(mem:BLK (match_operand:SI 1 "register_operand" "+&b,&b")))
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(set (match_dup 0)
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(plus:SI (match_dup 0)
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(match_operand:SI 4 "immediate_operand" "O,i")))
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(set (match_dup 1)
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(plus:SI (match_dup 1)
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(match_dup 4)))
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(use (match_operand:SI 2 "immediate_operand" "i,i"))
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(use (match_operand:SI 3 "immediate_operand" "i,i"))
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(clobber (match_operand:SI 5 "register_operand" "r,r"))
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[(set (mem:BLK (match_operand:SI 0 "register_operand" "b"))
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(mem:BLK (match_operand:SI 1 "register_operand" "b")))
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(use (match_operand:SI 2 "immediate_operand" "i"))
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(use (match_operand:SI 3 "immediate_operand" "i"))
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(clobber (match_operand:SI 4 "register_operand" "=r"))
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(clobber (reg:SI 8))
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(clobber (reg:SI 9))
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(clobber (reg:SI 10))
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(clobber (reg:SI 11))
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(clobber (reg:SI 12))
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(clobber (match_scratch:SI 6 "=q,q"))]
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(clobber (match_scratch:SI 5 "=q"))]
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"TARGET_STRING && TARGET_POWER
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&& INTVAL (operands[2]) > 16 && INTVAL (operands[2]) <= 24
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&& (REGNO (operands[0]) < 7 || REGNO (operands[0]) > 12)
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&& (REGNO (operands[1]) < 7 || REGNO (operands[1]) > 12)
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&& REGNO (operands[5]) == 7"
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"@
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{lsi|lswi} %5,%1,%2\;{stsi|stswi} %5,%0,%2
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{lsi|lswi} %5,%1,%2\;{cal %0,%4(%0)|addi %0,%0,%4}\;{stsi|stswi} %5,%0,%2\;{cal %1,%4(%1)|addi %1,%1,%4}"
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[(set_attr "length" "8,16")])
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&& REGNO (operands[4]) == 7"
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"{lsi|lswi} %4,%1,%2\;{stsi|stswi} %4,%0,%2"
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[(set_attr "length" "8")])
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(define_insn ""
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[(set (mem:BLK (match_operand:SI 0 "register_operand" "+&b,&b"))
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(mem:BLK (match_operand:SI 1 "register_operand" "+&b,&b")))
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(set (match_dup 0)
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(plus:SI (match_dup 0)
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(match_operand:SI 4 "immediate_operand" "O,i")))
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(set (match_dup 1)
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(plus:SI (match_dup 1)
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(match_dup 4)))
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(use (match_operand:SI 2 "immediate_operand" "i,i"))
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(use (match_operand:SI 3 "immediate_operand" "i,i"))
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(clobber (match_operand:SI 5 "register_operand" "r,r"))
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[(set (mem:BLK (match_operand:SI 0 "register_operand" "b"))
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(mem:BLK (match_operand:SI 1 "register_operand" "b")))
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(use (match_operand:SI 2 "immediate_operand" "i"))
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(use (match_operand:SI 3 "immediate_operand" "i"))
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(clobber (match_operand:SI 4 "register_operand" "=r"))
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(clobber (reg:SI 8))
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(clobber (reg:SI 9))
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(clobber (reg:SI 10))
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(clobber (reg:SI 11))
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(clobber (reg:SI 12))
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(clobber (match_scratch:SI 6 "X,X"))]
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(clobber (match_scratch:SI 5 "X"))]
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"TARGET_STRING && !TARGET_POWER
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&& INTVAL (operands[2]) > 16 && INTVAL (operands[2]) <= 32
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&& (REGNO (operands[0]) < 7 || REGNO (operands[0]) > 12)
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&& (REGNO (operands[1]) < 7 || REGNO (operands[1]) > 12)
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&& REGNO (operands[5]) == 7"
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"@
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{lsi|lswi} %5,%1,%2\;{stsi|stswi} %5,%0,%2
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{lsi|lswi} %5,%1,%2\;{cal %0,%4(%0)|addi %0,%0,%4}\;{stsi|stswi} %5,%0,%2\;{cal %1,%4(%1)|addi %1,%1,%4}"
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[(set_attr "length" "8,16")])
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&& REGNO (operands[4]) == 7"
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"{lsi|lswi} %4,%1,%2\;{stsi|stswi} %4,%0,%2"
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[(set_attr "length" "8")])
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;; Move up to 16 bytes at a time, using 4 fixed registers to avoid spill problems
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;; with TImode
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(define_expand "movstrsi_4reg"
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[(parallel [(set (mem:BLK (match_operand:SI 0 "register_operand" ""))
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(mem:BLK (match_operand:SI 1 "register_operand" "")))
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(set (match_dup 0)
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(plus:SI (match_dup 0)
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(match_operand:SI 4 "immediate_operand" "")))
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(set (match_dup 1)
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(plus:SI (match_dup 1)
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(match_dup 4)))
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(use (match_operand:SI 2 "immediate_operand" ""))
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(use (match_operand:SI 3 "immediate_operand" ""))
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(clobber (reg:SI 9))
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(clobber (reg:SI 10))
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(clobber (reg:SI 11))
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(clobber (reg:SI 12))
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(clobber (match_scratch:SI 5 ""))])]
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(clobber (match_scratch:SI 4 ""))])]
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"TARGET_STRING"
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"")
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(define_insn ""
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[(set (mem:BLK (match_operand:SI 0 "register_operand" "+&b,&b"))
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(mem:BLK (match_operand:SI 1 "register_operand" "+&b,&b")))
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(set (match_dup 0)
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(plus:SI (match_dup 0)
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(match_operand:SI 4 "immediate_operand" "O,i")))
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(set (match_dup 1)
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(plus:SI (match_dup 1)
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(match_dup 4)))
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(use (match_operand:SI 2 "immediate_operand" "i,i"))
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(use (match_operand:SI 3 "immediate_operand" "i,i"))
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(clobber (match_operand:SI 5 "register_operand" "r,r"))
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[(set (mem:BLK (match_operand:SI 0 "register_operand" "b"))
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(mem:BLK (match_operand:SI 1 "register_operand" "b")))
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(use (match_operand:SI 2 "immediate_operand" "i"))
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(use (match_operand:SI 3 "immediate_operand" "i"))
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(clobber (match_operand:SI 4 "register_operand" "=r"))
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(clobber (reg:SI 10))
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(clobber (reg:SI 11))
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(clobber (reg:SI 12))
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(clobber (match_scratch:SI 6 "=q,q"))]
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(clobber (match_scratch:SI 5 "=q"))]
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"TARGET_STRING && TARGET_POWER
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&& INTVAL (operands[2]) > 8 && INTVAL (operands[2]) <= 16
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&& (REGNO (operands[0]) < 9 || REGNO (operands[0]) > 12)
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&& (REGNO (operands[1]) < 9 || REGNO (operands[1]) > 12)
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&& REGNO (operands[5]) == 9"
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"@
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{lsi|lswi} %5,%1,%2\;{stsi|stswi} %5,%0,%2
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{lsi|lswi} %5,%1,%2\;{cal %0,%4(%0)|addi %0,%0,%4}\;{stsi|stswi} %5,%0,%2\;{cal %1,%4(%1)|addi %1,%1,%4}"
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[(set_attr "length" "8,16")])
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&& REGNO (operands[4]) == 9"
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"{lsi|lswi} %4,%1,%2\;{stsi|stswi} %4,%0,%2"
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[(set_attr "length" "8")])
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(define_insn ""
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[(set (mem:BLK (match_operand:SI 0 "register_operand" "+&b,&b"))
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(mem:BLK (match_operand:SI 1 "register_operand" "+&b,&b")))
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(set (match_dup 0)
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(plus:SI (match_dup 0)
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(match_operand:SI 4 "immediate_operand" "O,i")))
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(set (match_dup 1)
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(plus:SI (match_dup 1)
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(match_dup 4)))
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(use (match_operand:SI 2 "immediate_operand" "i,i"))
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(use (match_operand:SI 3 "immediate_operand" "i,i"))
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(clobber (match_operand:SI 5 "register_operand" "r,r"))
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[(set (mem:BLK (match_operand:SI 0 "register_operand" "b"))
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(mem:BLK (match_operand:SI 1 "register_operand" "b")))
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(use (match_operand:SI 2 "immediate_operand" "i"))
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(use (match_operand:SI 3 "immediate_operand" "i"))
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(clobber (match_operand:SI 4 "register_operand" "=r"))
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(clobber (reg:SI 10))
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(clobber (reg:SI 11))
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(clobber (reg:SI 12))
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(clobber (match_scratch:SI 6 "X,X"))]
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(clobber (match_scratch:SI 5 "X"))]
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"TARGET_STRING && !TARGET_POWER
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&& INTVAL (operands[2]) > 8 && INTVAL (operands[2]) <= 16
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&& (REGNO (operands[0]) < 9 || REGNO (operands[0]) > 12)
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&& (REGNO (operands[1]) < 9 || REGNO (operands[1]) > 12)
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&& REGNO (operands[5]) == 9"
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"@
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{lsi|lswi} %5,%1,%2\;{stsi|stswi} %5,%0,%2
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{lsi|lswi} %5,%1,%2\;{cal %0,%4(%0)|addi %0,%0,%4}\;{stsi|stswi} %5,%0,%2\;{cal %1,%4(%1)|addi %1,%1,%4}"
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[(set_attr "length" "8,16")])
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&& REGNO (operands[4]) == 9"
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"{lsi|lswi} %4,%1,%2\;{stsi|stswi} %4,%0,%2"
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[(set_attr "length" "8")])
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;; Move up to 8 bytes at a time.
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(define_expand "movstrsi_2reg"
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[(parallel [(set (mem:BLK (match_operand:SI 0 "register_operand" ""))
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(mem:BLK (match_operand:SI 1 "register_operand" "")))
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(set (match_dup 0)
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(plus:SI (match_dup 0)
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(match_operand:SI 4 "immediate_operand" "")))
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(set (match_dup 1)
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(plus:SI (match_dup 1)
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(match_dup 4)))
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(use (match_operand:SI 2 "immediate_operand" ""))
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(use (match_operand:SI 3 "immediate_operand" ""))
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(clobber (match_scratch:DI 5 ""))
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(clobber (match_scratch:SI 6 ""))])]
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(clobber (match_scratch:DI 4 ""))
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(clobber (match_scratch:SI 5 ""))])]
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"TARGET_STRING && !TARGET_64BIT"
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"")
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(define_insn ""
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[(set (mem:BLK (match_operand:SI 0 "register_operand" "+&b,&b"))
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(mem:BLK (match_operand:SI 1 "register_operand" "+&b,&b")))
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(set (match_dup 0)
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(plus:SI (match_dup 0)
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(match_operand:SI 4 "immediate_operand" "O,i")))
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(set (match_dup 1)
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(plus:SI (match_dup 1)
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(match_dup 4)))
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(use (match_operand:SI 2 "immediate_operand" "i,i"))
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(use (match_operand:SI 3 "immediate_operand" "i,i"))
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(clobber (match_scratch:DI 5 "=&r,&r"))
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(clobber (match_scratch:SI 6 "=q,q"))]
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[(set (mem:BLK (match_operand:SI 0 "register_operand" "b"))
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(mem:BLK (match_operand:SI 1 "register_operand" "b")))
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(use (match_operand:SI 2 "immediate_operand" "i"))
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(use (match_operand:SI 3 "immediate_operand" "i"))
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(clobber (match_scratch:DI 4 "=&r"))
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||||
(clobber (match_scratch:SI 5 "=q"))]
|
||||
"TARGET_STRING && TARGET_POWER && !TARGET_64BIT
|
||||
&& INTVAL (operands[2]) > 4 && INTVAL (operands[2]) <= 8"
|
||||
"@
|
||||
{lsi|lswi} %5,%1,%2\;{stsi|stswi} %5,%0,%2
|
||||
{lsi|lswi} %5,%1,%2\;{cal %0,%4(%0)|addi %0,%0,%4}\;{stsi|stswi} %5,%0,%2\;{cal %1,%4(%1)|addi %1,%1,%4}"
|
||||
[(set_attr "length" "8,16")])
|
||||
&& INTVAL (operands[2]) > 4 && INTVAL (operands[2]) <= 8"
|
||||
"{lsi|lswi} %4,%1,%2\;{stsi|stswi} %4,%0,%2"
|
||||
[(set_attr "length" "8")])
|
||||
|
||||
(define_insn ""
|
||||
[(set (mem:BLK (match_operand:SI 0 "register_operand" "+&b,&b"))
|
||||
(mem:BLK (match_operand:SI 1 "register_operand" "+&b,&b")))
|
||||
(set (match_dup 0)
|
||||
(plus:SI (match_dup 0)
|
||||
(match_operand:SI 4 "immediate_operand" "O,i")))
|
||||
(set (match_dup 1)
|
||||
(plus:SI (match_dup 1)
|
||||
(match_dup 4)))
|
||||
(use (match_operand:SI 2 "immediate_operand" "i,i"))
|
||||
(use (match_operand:SI 3 "immediate_operand" "i,i"))
|
||||
(clobber (match_scratch:DI 5 "=&r,&r"))
|
||||
(clobber (match_scratch:SI 6 "X,X"))]
|
||||
[(set (mem:BLK (match_operand:SI 0 "register_operand" "b"))
|
||||
(mem:BLK (match_operand:SI 1 "register_operand" "b")))
|
||||
(use (match_operand:SI 2 "immediate_operand" "i"))
|
||||
(use (match_operand:SI 3 "immediate_operand" "i"))
|
||||
(clobber (match_scratch:DI 4 "=&r"))
|
||||
(clobber (match_scratch:SI 5 "X"))]
|
||||
"TARGET_STRING && !TARGET_POWER && !TARGET_64BIT
|
||||
&& INTVAL (operands[2]) > 4 && INTVAL (operands[2]) <= 8"
|
||||
"@
|
||||
{lsi|lswi} %5,%1,%2\;{stsi|stswi} %5,%0,%2
|
||||
{lsi|lswi} %5,%1,%2\;{cal %0,%4(%0)|addi %0,%0,%4}\;{stsi|stswi} %5,%0,%2\;{cal %1,%4(%1)|addi %1,%1,%4}"
|
||||
[(set_attr "length" "8,16")])
|
||||
"{lsi|lswi} %4,%1,%2\;{stsi|stswi} %4,%0,%2"
|
||||
[(set_attr "length" "8")])
|
||||
|
||||
;; Move up to 4 bytes at a time.
|
||||
(define_expand "movstrsi_1reg"
|
||||
[(parallel [(set (mem:BLK (match_operand:SI 0 "register_operand" ""))
|
||||
(mem:BLK (match_operand:SI 1 "register_operand" "")))
|
||||
(set (match_dup 0)
|
||||
(plus:SI (match_dup 0)
|
||||
(match_operand:SI 4 "immediate_operand" "")))
|
||||
(set (match_dup 1)
|
||||
(plus:SI (match_dup 1)
|
||||
(match_dup 4)))
|
||||
(use (match_operand:SI 2 "immediate_operand" ""))
|
||||
(use (match_operand:SI 3 "immediate_operand" ""))
|
||||
(clobber (match_scratch:SI 5 ""))
|
||||
(clobber (match_scratch:SI 6 ""))])]
|
||||
(clobber (match_scratch:SI 4 ""))
|
||||
(clobber (match_scratch:SI 5 ""))])]
|
||||
"TARGET_STRING"
|
||||
"")
|
||||
|
||||
(define_insn ""
|
||||
[(set (mem:BLK (match_operand:SI 0 "register_operand" "+&b,&b"))
|
||||
(mem:BLK (match_operand:SI 1 "register_operand" "+&b,&b")))
|
||||
(set (match_dup 0)
|
||||
(plus:SI (match_dup 0)
|
||||
(match_operand:SI 4 "immediate_operand" "O,i")))
|
||||
(set (match_dup 1)
|
||||
(plus:SI (match_dup 1)
|
||||
(match_dup 4)))
|
||||
(use (match_operand:SI 2 "immediate_operand" "i,i"))
|
||||
(use (match_operand:SI 3 "immediate_operand" "i,i"))
|
||||
(clobber (match_scratch:SI 5 "=&r,&r"))
|
||||
(clobber (match_scratch:SI 6 "=q,q"))]
|
||||
[(set (mem:BLK (match_operand:SI 0 "register_operand" "b"))
|
||||
(mem:BLK (match_operand:SI 1 "register_operand" "b")))
|
||||
(use (match_operand:SI 2 "immediate_operand" "i"))
|
||||
(use (match_operand:SI 3 "immediate_operand" "i"))
|
||||
(clobber (match_scratch:SI 4 "=&r"))
|
||||
(clobber (match_scratch:SI 5 "=q"))]
|
||||
"TARGET_STRING && TARGET_POWER
|
||||
&& INTVAL (operands[2]) > 0 && INTVAL (operands[2]) <= 4"
|
||||
"@
|
||||
{lsi|lswi} %5,%1,%2\;{stsi|stswi} %5,%0,%2
|
||||
{lsi|lswi} %5,%1,%2\;{cal %0,%4(%0)|addi %0,%0,%4}\;{stsi|stswi} %5,%0,%2\;{cal %1,%4(%1)|addi %1,%1,%4}"
|
||||
[(set_attr "length" "8,16")])
|
||||
"{lsi|lswi} %4,%1,%2\;{stsi|stswi} %4,%0,%2"
|
||||
[(set_attr "length" "8")])
|
||||
|
||||
(define_insn ""
|
||||
[(set (mem:BLK (match_operand:SI 0 "register_operand" "+&b,&b"))
|
||||
(mem:BLK (match_operand:SI 1 "register_operand" "+&b,&b")))
|
||||
(set (match_dup 0)
|
||||
(plus:SI (match_dup 0)
|
||||
(match_operand:SI 4 "immediate_operand" "O,i")))
|
||||
(set (match_dup 1)
|
||||
(plus:SI (match_dup 1)
|
||||
(match_dup 4)))
|
||||
(use (match_operand:SI 2 "immediate_operand" "i,i"))
|
||||
(use (match_operand:SI 3 "immediate_operand" "i,i"))
|
||||
(clobber (match_scratch:SI 5 "=&r,&r"))
|
||||
(clobber (match_scratch:SI 6 "X,X"))]
|
||||
[(set (mem:BLK (match_operand:SI 0 "register_operand" "b"))
|
||||
(mem:BLK (match_operand:SI 1 "register_operand" "b")))
|
||||
(use (match_operand:SI 2 "immediate_operand" "i"))
|
||||
(use (match_operand:SI 3 "immediate_operand" "i"))
|
||||
(clobber (match_scratch:SI 4 "=&r"))
|
||||
(clobber (match_scratch:SI 5 "X"))]
|
||||
"TARGET_STRING && !TARGET_POWER
|
||||
&& INTVAL (operands[2]) > 0 && INTVAL (operands[2]) <= 4"
|
||||
"@
|
||||
{lsi|lswi} %5,%1,%2\;{stsi|stswi} %5,%0,%2
|
||||
{lsi|lswi} %5,%1,%2\;{cal %0,%4(%0)|addi %0,%0,%4}\;{stsi|stswi} %5,%0,%2\;{cal %1,%4(%1)|addi %1,%1,%4}"
|
||||
[(set_attr "length" "8,16")])
|
||||
"{lsi|lswi} %4,%1,%2\;{stsi|stswi} %4,%0,%2"
|
||||
[(set_attr "length" "8")])
|
||||
|
||||
|
||||
;; Define insns that do load or store with update. Some of these we can
|
||||
|
|
Loading…
Reference in New Issue