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larith.asm (divmodhi4): Empty for 68HC12.

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* config/m68hc11/larith.asm (divmodhi4): Empty for 68HC12.
	(__mulsi3): Rewrite for 68HC12.
	* config/m68hc11/m68hc11.md (divmodhi4): Use idivs for 68HC12.
	Mark 'x' constraint with earlyclobber to prevent a
	RELOAD_FOR_OTHER_ADDRESS to go in it.
	(mulhi3_m68hc12): New pattern.
	(mulhi3_m68hc11): Rename of mulhi3.
	(mulhi3): New expand for 68HC12 optimisation.
	(umulhisi3, mulhisi3): New patterns for 68HC12.

From-SVN: r41841
This commit is contained in:
Stephane Carrez 2001-05-04 21:42:50 +02:00 committed by Stephane Carrez
parent 8559523974
commit 3d0746bacb
3 changed files with 118 additions and 11 deletions
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12
gcc/ChangeLog
View File

@ -1,3 +1,15 @@
2001-05-04 Stephane Carrez <Stephane.Carrez@worldnet.fr>
* config/m68hc11/larith.asm (divmodhi4): Empty for 68HC12.
(__mulsi3): Rewrite for 68HC12.
* config/m68hc11/m68hc11.md (divmodhi4): Use idivs for 68HC12.
Mark 'x' constraint with earlyclobber to prevent a
RELOAD_FOR_OTHER_ADDRESS to go in it.
(mulhi3_m68hc12): New pattern.
(mulhi3_m68hc11): Rename of mulhi3.
(mulhi3): New expand for 68HC12 optimisation.
(umulhisi3, mulhisi3): New patterns for 68HC12.
2001-05-04 Stephane Carrez <Stephane.Carrez@worldnet.fr>
* config/m68hc11/m68hc11.md (*tbne, *tbeq): New patterns for 68HC12.

27
gcc/config/m68hc11/larith.asm
View File

@ -628,6 +628,9 @@ Return_zero:
#endif
#ifdef L_divmodhi4
#ifndef mc68hc12
/* 68HC12 signed divisions are generated inline (idivs). */
.sect .text
.globl __divmodhi4
@ -692,6 +695,7 @@ Numerator_neg_denominator_pos:
comb
addd #1
rts
#endif /* !mc68hc12 */
#endif
#ifdef L_mulqi3
@ -865,11 +869,27 @@ Ret:
;
;
__mulsi3:
#ifdef mc68hc12
pshd ; Save A.low
ldy 4,sp
emul ; A.low * B.high
ldy 6,sp
exg x,d
emul ; A.high * B.low
leax d,x
ldy 6,sp
puld
emul ; A.low * B.low
exg d,y
leax d,x
exg d,y
rts
#else
B_low = 8
B_high = 6
A_low = 0
A_high = 2
__mulsi3:
pshx
pshb
psha
@ -882,11 +902,7 @@ __mulsi3:
;
; If A.high is 0, optimize into: (A.low * B.high) << 16 + (A.low * B.low)
;
#ifdef mc68hc12
cpx #0
#else
stx *_.tmp
#endif
beq A_high_zero
bsr ___mulhi3 ; A.high * B.low
;
@ -984,6 +1000,7 @@ A_low_B_low:
bsr __mulhi32
bra Return
#endif
#endif
#ifdef L_map_data

90
gcc/config/m68hc11/m68hc11.md
View File

@ -2618,11 +2618,28 @@
;; 32 and 64-bit multiply are handled by the library
;;
(define_insn "mulhi3"
(define_expand "mulsi3"
[(set (match_operand:SI 0 "nonimmediate_operand" "")
(mult:SI (match_operand:SI 1 "general_operand" "")
(match_operand:SI 2 "general_operand" "")))]
""
"m68hc11_emit_libcall (\"__mulsi3\", MULT, SImode, SImode, 3, operands);
DONE;")
(define_expand "mulhi3"
[(parallel [(set (match_operand:HI 0 "register_operand" "")
(mult:HI (match_operand:HI 1 "register_operand" "")
(match_operand:HI 2 "register_operand" "")))
(clobber (match_scratch:HI 3 ""))])]
""
"")
(define_insn "mulhi3_m68hc11"
[(set (match_operand:HI 0 "register_operand" "=d")
(mult:HI (match_operand:HI 1 "register_operand" "%0")
(match_operand:HI 2 "register_operand" "x")))]
""
(match_operand:HI 2 "register_operand" "x")))
(clobber (match_scratch:HI 3 "=X"))]
"TARGET_M6811"
"*
{
CC_STATUS_INIT;
@ -2630,6 +2647,59 @@
return \"jsr\\t___mulhi3\";
}")
(define_insn "mulhi3_m68hc12"
[(set (match_operand:HI 0 "register_operand" "=d,d")
(mult:HI (match_operand:HI 1 "register_operand" "%0,0")
(match_operand:HI 2 "register_operand" "y,x")))
(clobber (match_scratch:HI 3 "=2,2"))]
"TARGET_M6812"
"*
{
CC_STATUS_INIT;
if (X_REG_P (operands[2]))
return \"exg\\tx,y\\n\\temul\\n\\texg\\tx,y\";
else
return \"emul\";
}")
(define_insn "umulhisi3"
[(set (match_operand:SI 0 "register_operand" "=D,D")
(mult:SI (zero_extend:SI
(match_operand:HI 1 "register_operand" "%d,d"))
(zero_extend:SI
(match_operand:HI 2 "register_operand" "y,x"))))
(clobber (match_scratch:HI 3 "=2,X"))]
"TARGET_M6812"
"*
{
if (X_REG_P (operands [2]))
output_asm_insn (\"exg\\tx,y\", operands);
/* Can't use the carry after that; other flags are ok when testing
the 32-bit result. */
cc_status.flags |= CC_NO_OVERFLOW;
return \"emul\\n\\texg\\tx,y\";
}")
(define_insn "mulhisi3"
[(set (match_operand:SI 0 "register_operand" "=D,D")
(mult:SI (sign_extend:SI
(match_operand:HI 1 "register_operand" "%d,d"))
(sign_extend:SI
(match_operand:HI 2 "register_operand" "y,x"))))
(clobber (match_scratch:HI 3 "=2,X"))]
"TARGET_M6812"
"*
{
if (X_REG_P (operands [2]))
output_asm_insn (\"exg\\tx,y\", operands);
/* Can't use the carry after that; other flags are ok when testing
the 32-bit result. */
cc_status.flags |= CC_NO_OVERFLOW;
return \"emuls\\n\\texg\\tx,y\";
}")
(define_insn "umulqihi3"
[(set (match_operand:HI 0 "register_operand" "=d")
(mult:HI (zero_extend:HI
@ -2741,7 +2811,7 @@
[(set (match_operand:HI 0 "register_operand" "=d,d")
(div:HI (match_operand:HI 1 "register_operand" "0,0")
(match_operand:HI 2 "general_operand" "A,ium")))
(set (match_operand:HI 3 "register_operand" "=x,x")
(set (match_operand:HI 3 "register_operand" "=&x,&x")
(mod:HI (match_dup 1) (match_dup 2)))]
""
"*
@ -2758,8 +2828,16 @@
output_asm_insn (\"ldx\\t%2\", operands);
}
}
CC_STATUS_INIT;
return \"bsr\\t__divmodhi4\";
if (TARGET_M6812)
{
/* Flags are ok after that. */
return \"idivs\\n\\txgdx\";
}
else
{
CC_STATUS_INIT;
return \"bsr\\t__divmodhi4\";
}
}")
(define_insn "udivmodhi4"