re PR target/66112 (__builtin_mul_overflow for int16_t emits poor code)
PR target/66112 * config/i386/i386.md (mulv<mode>4, umulv<mode>4, *umulv<mode>4): Use SWI248 iterator instead of SWI. (*mulv<mode>4_1): Use SWI48 instead of SWI. Simplify output template. Use eq_attr "alternative" "0" instead of match_test in length_immediate attribute computation. (*mulvhi4, *mulvhi4_1): New define_insns. * gcc.target/i386/pr66112-2.c: New test. From-SVN: r223116
This commit is contained in:
Jakub Jelinek
Jakub Jelinek
parent
c1ee2e626e
commit
3d2def23a5
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@ -1,5 +1,13 @@
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2015-05-13 Jakub Jelinek <jakub@redhat.com>
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PR target/66112
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* config/i386/i386.md (mulv<mode>4, umulv<mode>4, *umulv<mode>4):
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Use SWI248 iterator instead of SWI.
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(*mulv<mode>4_1): Use SWI48 instead of SWI. Simplify output template.
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Use eq_attr "alternative" "0" instead of match_test in
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length_immediate attribute computation.
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(*mulvhi4, *mulvhi4_1): New define_insns.
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PR target/66112
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* internal-fn.c (get_min_precision): Use UNSIGNED instead of
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SIGNED to get precision of non-negative value.
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@ -6602,14 +6602,14 @@
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[(parallel [(set (reg:CCO FLAGS_REG)
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(eq:CCO (mult:<DWI>
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(sign_extend:<DWI>
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(match_operand:SWI48 1 "register_operand"))
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(match_operand:SWI248 1 "register_operand"))
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(match_dup 4))
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(sign_extend:<DWI>
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(mult:SWI48 (match_dup 1)
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(match_operand:SWI48 2
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"<general_operand>")))))
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(set (match_operand:SWI48 0 "register_operand")
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(mult:SWI48 (match_dup 1) (match_dup 2)))])
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(mult:SWI248 (match_dup 1)
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(match_operand:SWI248 2
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"<general_operand>")))))
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(set (match_operand:SWI248 0 "register_operand")
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(mult:SWI248 (match_dup 1) (match_dup 2)))])
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(set (pc) (if_then_else
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(eq (reg:CCO FLAGS_REG) (const_int 0))
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(label_ref (match_operand 3))
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@ -6665,16 +6665,14 @@
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(match_operand:<DWI> 3 "const_int_operand" "K,i"))
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(sign_extend:<DWI>
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(mult:SWI48 (match_dup 1)
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(match_operand:SWI 2 "x86_64_immediate_operand"
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"K,<i>")))))
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(match_operand:SWI48 2
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"x86_64_immediate_operand" "K,<i>")))))
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(set (match_operand:SWI48 0 "register_operand" "=r,r")
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(mult:SWI48 (match_dup 1) (match_dup 2)))]
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"!(MEM_P (operands[1]) && MEM_P (operands[2]))
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&& CONST_INT_P (operands[2])
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&& INTVAL (operands[2]) == INTVAL (operands[3])"
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"@
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imul{<imodesuffix>}\t{%2, %1, %0|%0, %1, %2}
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imul{<imodesuffix>}\t{%2, %1, %0|%0, %1, %2}"
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"imul{<imodesuffix>}\t{%2, %1, %0|%0, %1, %2}"
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[(set_attr "type" "imul")
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(set (attr "athlon_decode")
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(cond [(eq_attr "cpu" "athlon")
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@ -6689,26 +6687,78 @@
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(set_attr "bdver1_decode" "direct")
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(set_attr "mode" "<MODE>")
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(set (attr "length_immediate")
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(cond [(match_test "IN_RANGE (INTVAL (operands[2]), -128, 127)")
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(cond [(eq_attr "alternative" "0")
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(const_string "1")
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(match_test "<MODE_SIZE> == 8")
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(const_string "4")]
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(const_string "<MODE_SIZE>")))])
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(define_insn "*mulvhi4"
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[(set (reg:CCO FLAGS_REG)
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(eq:CCO (mult:SI
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(sign_extend:SI
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(match_operand:HI 1 "nonimmediate_operand" "0"))
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(sign_extend:SI
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(match_operand:HI 2 "general_operand" "mr")))
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(sign_extend:SI
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(mult:HI (match_dup 1) (match_dup 2)))))
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(set (match_operand:HI 0 "register_operand" "=r")
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(mult:HI (match_dup 1) (match_dup 2)))]
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"!(MEM_P (operands[1]) && MEM_P (operands[2]))"
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"imul{w}\t{%2, %0|%0, %2}"
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[(set_attr "type" "imul")
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(set_attr "prefix_0f" "1")
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(set_attr "athlon_decode" "vector")
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(set_attr "amdfam10_decode" "direct")
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(set_attr "bdver1_decode" "double")
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(set_attr "mode" "HI")])
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(define_insn "*mulvhi4_1"
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[(set (reg:CCO FLAGS_REG)
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(eq:CCO (mult:SI
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(sign_extend:SI
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(match_operand:HI 1 "nonimmediate_operand" "rm,rm"))
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(match_operand:SI 3 "const_int_operand" "K,i"))
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(sign_extend:SI
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(mult:HI (match_dup 1)
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(match_operand:HI 2
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"x86_64_immediate_operand" "K,n")))))
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(set (match_operand:HI 0 "register_operand" "=r,r")
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(mult:HI (match_dup 1) (match_dup 2)))]
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"!(MEM_P (operands[1]) && MEM_P (operands[2]))
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&& CONST_INT_P (operands[2])
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&& INTVAL (operands[2]) == INTVAL (operands[3])"
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"imul{w}\t{%2, %1, %0|%0, %1, %2}"
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[(set_attr "type" "imul")
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(set_attr "prefix_0f" "0")
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(set (attr "athlon_decode")
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(cond [(eq_attr "cpu" "athlon")
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(const_string "vector")
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(eq_attr "alternative" "1")
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(const_string "vector")]
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(const_string "direct")))
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(set_attr "amdfam10_decode" "vector")
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(set_attr "bdver1_decode" "double")
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(set_attr "mode" "HI")
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(set (attr "length_immediate")
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(cond [(eq_attr "alternative" "0")
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(const_string "1")]
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(const_string "2")))])
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(define_expand "umulv<mode>4"
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[(parallel [(set (reg:CCO FLAGS_REG)
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(eq:CCO (mult:<DWI>
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(zero_extend:<DWI>
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(match_operand:SWI48 1
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(match_operand:SWI248 1
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"nonimmediate_operand"))
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(zero_extend:<DWI>
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(match_operand:SWI48 2
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(match_operand:SWI248 2
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"nonimmediate_operand")))
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(zero_extend:<DWI>
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(mult:SWI48 (match_dup 1) (match_dup 2)))))
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(set (match_operand:SWI48 0 "register_operand")
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(mult:SWI48 (match_dup 1) (match_dup 2)))
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(clobber (match_scratch:SWI48 4))])
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(mult:SWI248 (match_dup 1) (match_dup 2)))))
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(set (match_operand:SWI248 0 "register_operand")
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(mult:SWI248 (match_dup 1) (match_dup 2)))
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(clobber (match_scratch:SWI248 4))])
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(set (pc) (if_then_else
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(eq (reg:CCO FLAGS_REG) (const_int 0))
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(label_ref (match_operand 3))
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@ -6723,14 +6773,14 @@
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[(set (reg:CCO FLAGS_REG)
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(eq:CCO (mult:<DWI>
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(zero_extend:<DWI>
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(match_operand:SWI48 1 "nonimmediate_operand" "%0"))
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(match_operand:SWI248 1 "nonimmediate_operand" "%0"))
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(zero_extend:<DWI>
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(match_operand:SWI48 2 "nonimmediate_operand" "rm")))
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(match_operand:SWI248 2 "nonimmediate_operand" "rm")))
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(zero_extend:<DWI>
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(mult:SWI48 (match_dup 1) (match_dup 2)))))
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(set (match_operand:SWI48 0 "register_operand" "=a")
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(mult:SWI48 (match_dup 1) (match_dup 2)))
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(clobber (match_scratch:SWI48 3 "=d"))]
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(mult:SWI248 (match_dup 1) (match_dup 2)))))
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(set (match_operand:SWI248 0 "register_operand" "=a")
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(mult:SWI248 (match_dup 1) (match_dup 2)))
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(clobber (match_scratch:SWI248 3 "=d"))]
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"!(MEM_P (operands[1]) && MEM_P (operands[2]))"
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"mul{<imodesuffix>}\t%2"
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[(set_attr "type" "imul")
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@ -1,5 +1,8 @@
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2015-05-13 Jakub Jelinek <jakub@redhat.com>
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PR target/66112
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* gcc.target/i386/pr66112-2.c: New test.
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PR target/66112
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* gcc.target/i386/pr66112-1.c: New test.
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@ -0,0 +1,29 @@
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/* PR target/66112 */
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/* { dg-do compile } */
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/* { dg-options "-O2" } */
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unsigned short int
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foo (int a, int b)
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{
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unsigned short int res;
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a &= 0xffff;
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b &= 0xffff;
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if (__builtin_mul_overflow (a, b, &res))
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res = 0x123;
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return res;
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}
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short int
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bar (int a, int b)
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{
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short int res;
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a = (short int) a;
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b = (short int) b;
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if (__builtin_mul_overflow (a, b, &res))
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res = 0x123;
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return res;
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}
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/* { dg-final { scan-assembler-times "jn?o\[ \t\]" 2 } } */
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/* { dg-final { scan-assembler-times "mulw\[ \t\]" 2 } } */
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/* { dg-final { scan-assembler-times "imulw\[ \t\]" 1 } } */
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