optabs.c (expand_abs_nojump): Use SCALAR_FLOAT_MODE_P instead of explicitly testing GET_MODE_CLASS (x) ==...
* optabs.c (expand_abs_nojump): Use SCALAR_FLOAT_MODE_P instead of explicitly testing GET_MODE_CLASS (x) == MODE_FLOAT. * genopinit.c (gen_insn): Likewise. * reload.c (find_equiv_reg): Likewise. * loop.c (load_mems): Likewise. * rtlanal.c (may_trap_p_1, canonicalize_condition): Likewise. * cse.c (find_comparison_args, fold_rtx): Likewise. * dwarf2out.c (add_const_value_attribute): Likewise. * expr.c (convert_move): Likewise. * recog.c (general_operand, register_operand): Likewise. * reg-stack.c (replace_reg): Likewise. * tree-vect-generic.c (type_for_widest_vector_mode): Likewise. * c-common.c (handle_vector_size_attribute): Likewise. * simplify-rtx.c (simplify_const_unary_operation): Likewise. (simplify_binary_operation_1): Likewise. (simplify_const_binary_operation): Likewise. (simplify_relational_operation): Likewise. (simplify_const_relational_operation): Likewise. (simplify_immed_subreg): Likewise. * emit-rtl.c (gen_lowpart_common): Likewise. * expmed.c (expand_mult): Likewise. * stor-layout.c (layout_type): Likewise. From-SVN: r107322
This commit is contained in:
parent
9cfda6fa54
commit
3d8bf70f59
@ -1,3 +1,28 @@
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2005-11-22 Ben Elliston <bje@au.ibm.com>
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* optabs.c (expand_abs_nojump): Use SCALAR_FLOAT_MODE_P instead of
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explicitly testing GET_MODE_CLASS (x) == MODE_FLOAT.
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* genopinit.c (gen_insn): Likewise.
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* reload.c (find_equiv_reg): Likewise.
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* loop.c (load_mems): Likewise.
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* rtlanal.c (may_trap_p_1, canonicalize_condition): Likewise.
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* cse.c (find_comparison_args, fold_rtx): Likewise.
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* dwarf2out.c (add_const_value_attribute): Likewise.
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* expr.c (convert_move): Likewise.
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* recog.c (general_operand, register_operand): Likewise.
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* reg-stack.c (replace_reg): Likewise.
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* tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
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* c-common.c (handle_vector_size_attribute): Likewise.
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* simplify-rtx.c (simplify_const_unary_operation): Likewise.
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(simplify_binary_operation_1): Likewise.
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(simplify_const_binary_operation): Likewise.
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(simplify_relational_operation): Likewise.
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(simplify_const_relational_operation): Likewise.
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(simplify_immed_subreg): Likewise.
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* emit-rtl.c (gen_lowpart_common): Likewise.
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* expmed.c (expand_mult): Likewise.
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* stor-layout.c (layout_type): Likewise.
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2005-11-21 Paolo Bonzini <bonzini@gnu.org>
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PR target/24951
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@ -5164,7 +5164,7 @@ handle_vector_size_attribute (tree *node, tree name, tree args,
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orig_mode = TYPE_MODE (type);
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if (TREE_CODE (type) == RECORD_TYPE
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|| (GET_MODE_CLASS (orig_mode) != MODE_FLOAT
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|| (!SCALAR_FLOAT_MODE_P (orig_mode)
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&& GET_MODE_CLASS (orig_mode) != MODE_INT)
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|| !host_integerp (TYPE_SIZE_UNIT (type), 1))
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{
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12
gcc/cse.c
12
gcc/cse.c
@ -3088,7 +3088,7 @@ find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
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|| (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
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&& code == LT && STORE_FLAG_VALUE == -1)
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#ifdef FLOAT_STORE_FLAG_VALUE
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|| (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
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|| (SCALAR_FLOAT_MODE_P (arg1)
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&& (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
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REAL_VALUE_NEGATIVE (fsfv)))
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#endif
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@ -3098,7 +3098,7 @@ find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
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|| (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
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&& code == GE && STORE_FLAG_VALUE == -1)
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#ifdef FLOAT_STORE_FLAG_VALUE
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|| (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
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|| (SCALAR_FLOAT_MODE_P (arg1)
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&& (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
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REAL_VALUE_NEGATIVE (fsfv)))
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#endif
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@ -3161,7 +3161,7 @@ find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
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<< (GET_MODE_BITSIZE (inner_mode) - 1))))
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#ifdef FLOAT_STORE_FLAG_VALUE
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|| (code == LT
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&& GET_MODE_CLASS (inner_mode) == MODE_FLOAT
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&& SCALAR_FLOAT_MODE_P (inner_mode)
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&& (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
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REAL_VALUE_NEGATIVE (fsfv)))
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#endif
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@ -3181,7 +3181,7 @@ find_comparison_args (enum rtx_code code, rtx *parg1, rtx *parg2,
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<< (GET_MODE_BITSIZE (inner_mode) - 1))))
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#ifdef FLOAT_STORE_FLAG_VALUE
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|| (code == GE
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&& GET_MODE_CLASS (inner_mode) == MODE_FLOAT
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&& SCALAR_FLOAT_MODE_P (inner_mode)
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&& (fsfv = FLOAT_STORE_FLAG_VALUE (GET_MODE (arg1)),
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REAL_VALUE_NEGATIVE (fsfv)))
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#endif
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@ -3946,7 +3946,7 @@ fold_rtx (rtx x, rtx insn)
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enum machine_mode mode_arg1;
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#ifdef FLOAT_STORE_FLAG_VALUE
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if (GET_MODE_CLASS (mode) == MODE_FLOAT)
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if (SCALAR_FLOAT_MODE (mode))
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{
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true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
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(FLOAT_STORE_FLAG_VALUE (mode), mode));
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@ -4061,7 +4061,7 @@ fold_rtx (rtx x, rtx insn)
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rtx true_rtx = const_true_rtx, false_rtx = const0_rtx;
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#ifdef FLOAT_STORE_FLAG_VALUE
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if (GET_MODE_CLASS (mode) == MODE_FLOAT)
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if (SCALAR_FLOAT_MODE_P (mode))
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{
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true_rtx = (CONST_DOUBLE_FROM_REAL_VALUE
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(FLOAT_STORE_FLAG_VALUE (mode), mode));
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@ -9787,7 +9787,7 @@ add_const_value_attribute (dw_die_ref die, rtx rtl)
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{
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enum machine_mode mode = GET_MODE (rtl);
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if (GET_MODE_CLASS (mode) == MODE_FLOAT)
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if (SCALAR_FLOAT_MODE_P (mode))
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{
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unsigned int length = GET_MODE_SIZE (mode);
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unsigned char *array = ggc_alloc (length);
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@ -1162,7 +1162,7 @@ gen_lowpart_common (enum machine_mode mode, rtx x)
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return 0;
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/* Don't allow generating paradoxical FLOAT_MODE subregs. */
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if (GET_MODE_CLASS (mode) == MODE_FLOAT && msize > xsize)
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if (SCALAR_FLOAT_MODE_P (mode) && msize > xsize)
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return 0;
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offset = subreg_lowpart_offset (mode, innermode);
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@ -3155,7 +3155,7 @@ expand_mult (enum machine_mode mode, rtx op0, rtx op1, rtx target,
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/* Expand x*2.0 as x+x. */
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if (GET_CODE (op1) == CONST_DOUBLE
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&& GET_MODE_CLASS (mode) == MODE_FLOAT)
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&& SCALAR_FLOAT_MODE_P (mode))
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{
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REAL_VALUE_TYPE d;
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REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
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@ -349,8 +349,8 @@ convert_move (rtx to, rtx from, int unsignedp)
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{
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enum machine_mode to_mode = GET_MODE (to);
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enum machine_mode from_mode = GET_MODE (from);
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int to_real = GET_MODE_CLASS (to_mode) == MODE_FLOAT;
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int from_real = GET_MODE_CLASS (from_mode) == MODE_FLOAT;
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int to_real = SCALAR_FLOAT_MODE_P (to_mode);
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int from_real = SCALAR_FLOAT_MODE_P (from_mode);
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enum insn_code code;
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rtx libcall;
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@ -354,7 +354,7 @@ gen_insn (rtx insn)
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case 'I': case 'F': case 'N':
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break;
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case 'V':
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if (GET_MODE_CLASS (m1) == MODE_FLOAT)
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if (SCALAR_FLOAT_MODE_P (m1))
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printf ("v");
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break;
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case 'a':
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@ -10816,7 +10816,7 @@ load_mems (const struct loop *loop)
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}
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if (flag_float_store && written
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&& GET_MODE_CLASS (GET_MODE (mem)) == MODE_FLOAT)
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&& SCALAR_FLOAT_MODE_P (GET_MODE (mem)))
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loop_info->mems[i].optimize = 0;
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/* If this MEM is written to, we must be sure that there
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@ -2641,7 +2641,7 @@ expand_abs_nojump (enum machine_mode mode, rtx op0, rtx target,
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return temp;
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/* For floating point modes, try clearing the sign bit. */
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if (GET_MODE_CLASS (mode) == MODE_FLOAT)
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if (SCALAR_FLOAT_MODE_P (mode))
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{
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temp = expand_absneg_bit (ABS, mode, op0, target);
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if (temp)
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@ -1003,7 +1003,7 @@ general_operand (rtx op, enum machine_mode mode)
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/* FLOAT_MODE subregs can't be paradoxical. Combine will occasionally
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create such rtl, and we must reject it. */
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if (GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
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if (SCALAR_FLOAT_MODE_P (GET_MODE (op))
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&& GET_MODE_SIZE (GET_MODE (op)) > GET_MODE_SIZE (GET_MODE (sub)))
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return 0;
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@ -1087,7 +1087,7 @@ register_operand (rtx op, enum machine_mode mode)
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/* FLOAT_MODE subregs can't be paradoxical. Combine will occasionally
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create such rtl, and we must reject it. */
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if (GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
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if (SCALAR_FLOAT_MODE_P (GET_MODE (op))
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&& GET_MODE_SIZE (GET_MODE (op)) > GET_MODE_SIZE (GET_MODE (sub)))
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return 0;
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@ -690,7 +690,7 @@ replace_reg (rtx *reg, int regno)
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gcc_assert (regno <= LAST_STACK_REG);
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gcc_assert (STACK_REG_P (*reg));
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gcc_assert (GET_MODE_CLASS (GET_MODE (*reg)) == MODE_FLOAT
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gcc_assert (SCALAR_FLOAT_MODE_P (GET_MODE (*reg))
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|| GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT);
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*reg = FP_MODE_REG (regno, GET_MODE (*reg));
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@ -6518,7 +6518,7 @@ find_equiv_reg (rtx goal, rtx insn, enum reg_class class, int other,
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enum rtx_code code = GET_CODE (XEXP (goal, 0));
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if (MEM_VOLATILE_P (goal))
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return 0;
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if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
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if (flag_float_store && SCALAR_FLOAT_MODE_P (GET_MODE (goal)))
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return 0;
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/* An address with side effects must be reexecuted. */
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switch (code)
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@ -6609,8 +6609,7 @@ find_equiv_reg (rtx goal, rtx insn, enum reg_class class, int other,
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= true_regnum (valtry = SET_DEST (pat))) >= 0)
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|| (REG_P (SET_DEST (pat))
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&& GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
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&& (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
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== MODE_FLOAT)
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&& SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
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&& GET_CODE (goal) == CONST_INT
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&& 0 != (goaltry
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= operand_subword (XEXP (tem, 0), 0, 0,
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@ -6624,8 +6623,7 @@ find_equiv_reg (rtx goal, rtx insn, enum reg_class class, int other,
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NULL_RTX))
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&& REG_P (SET_DEST (pat))
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&& GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
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&& (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
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== MODE_FLOAT)
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&& SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem, 0)))
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&& GET_CODE (goal) == CONST_INT
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&& 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
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VOIDmode))
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@ -2155,7 +2155,7 @@ may_trap_p_1 (rtx x, bool unaligned_mems)
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case UMOD:
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if (HONOR_SNANS (GET_MODE (x)))
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return 1;
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if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
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if (SCALAR_FLOAT_MODE_P (GET_MODE (x)))
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return flag_trapping_math;
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if (!CONSTANT_P (XEXP (x, 1)) || (XEXP (x, 1) == const0_rtx))
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return 1;
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@ -2212,7 +2212,7 @@ may_trap_p_1 (rtx x, bool unaligned_mems)
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default:
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/* Any floating arithmetic may trap. */
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if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
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if (SCALAR_FLOAT_MODE_P (GET_MODE (x))
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&& flag_trapping_math)
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return 1;
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}
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@ -4683,7 +4683,7 @@ canonicalize_condition (rtx insn, rtx cond, int reverse, rtx *earliest,
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<< (GET_MODE_BITSIZE (inner_mode) - 1))))
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#ifdef FLOAT_STORE_FLAG_VALUE
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|| (code == LT
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&& GET_MODE_CLASS (inner_mode) == MODE_FLOAT
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&& SCALAR_FLOAT_MODE_P (inner_mode)
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&& (fsfv = FLOAT_STORE_FLAG_VALUE (inner_mode),
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REAL_VALUE_NEGATIVE (fsfv)))
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#endif
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@ -4703,7 +4703,7 @@ canonicalize_condition (rtx insn, rtx cond, int reverse, rtx *earliest,
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<< (GET_MODE_BITSIZE (inner_mode) - 1))))
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#ifdef FLOAT_STORE_FLAG_VALUE
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|| (code == GE
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&& GET_MODE_CLASS (inner_mode) == MODE_FLOAT
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&& SCALAR_FLOAT_MODE_P (inner_mode)
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&& (fsfv = FLOAT_STORE_FLAG_VALUE (inner_mode),
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REAL_VALUE_NEGATIVE (fsfv)))
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#endif
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@ -983,7 +983,7 @@ simplify_const_unary_operation (enum rtx_code code, enum machine_mode mode,
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}
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else if (GET_CODE (op) == CONST_DOUBLE
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&& GET_MODE_CLASS (mode) == MODE_FLOAT)
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&& SCALAR_FLOAT_MODE_P (mode))
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{
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REAL_VALUE_TYPE d, t;
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REAL_VALUE_FROM_CONST_DOUBLE (d, op);
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@ -1029,7 +1029,7 @@ simplify_const_unary_operation (enum rtx_code code, enum machine_mode mode,
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}
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else if (GET_CODE (op) == CONST_DOUBLE
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&& GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
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&& SCALAR_FLOAT_MODE_P (GET_MODE (op))
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&& GET_MODE_CLASS (mode) == MODE_INT
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&& width <= 2*HOST_BITS_PER_WIDE_INT && width > 0)
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{
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@ -1610,7 +1610,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
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/* x*2 is x+x and x*(-1) is -x */
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if (GET_CODE (trueop1) == CONST_DOUBLE
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&& GET_MODE_CLASS (GET_MODE (trueop1)) == MODE_FLOAT
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&& SCALAR_FLOAT_MODE_P (GET_MODE (trueop1))
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&& GET_MODE (op0) == mode)
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{
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REAL_VALUE_TYPE d;
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@ -1792,7 +1792,7 @@ simplify_binary_operation_1 (enum rtx_code code, enum machine_mode mode,
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case DIV:
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/* Handle floating point and integers separately. */
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if (GET_MODE_CLASS (mode) == MODE_FLOAT)
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if (SCALAR_FLOAT_MODE_P (mode))
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{
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/* Maybe change 0.0 / x to 0.0. This transformation isn't
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safe for modes with NaNs, since 0.0 / 0.0 will then be
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@ -2146,7 +2146,7 @@ simplify_const_binary_operation (enum rtx_code code, enum machine_mode mode,
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return gen_rtx_CONST_VECTOR (mode, v);
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}
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if (GET_MODE_CLASS (mode) == MODE_FLOAT
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if (SCALAR_FLOAT_MODE_P (mode)
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&& GET_CODE (op0) == CONST_DOUBLE
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&& GET_CODE (op1) == CONST_DOUBLE
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&& mode == GET_MODE (op0) && mode == GET_MODE (op1))
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@ -2890,7 +2890,7 @@ simplify_relational_operation (enum rtx_code code, enum machine_mode mode,
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tem = simplify_const_relational_operation (code, cmp_mode, op0, op1);
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if (tem)
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{
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if (GET_MODE_CLASS (mode) == MODE_FLOAT)
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if (SCALAR_FLOAT_MODE_P (mode))
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{
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if (tem == const0_rtx)
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return CONST0_RTX (mode);
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@ -3108,7 +3108,7 @@ simplify_const_relational_operation (enum rtx_code code,
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the result. */
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else if (GET_CODE (trueop0) == CONST_DOUBLE
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&& GET_CODE (trueop1) == CONST_DOUBLE
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&& GET_MODE_CLASS (GET_MODE (trueop0)) == MODE_FLOAT)
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&& SCALAR_FLOAT_MODE_P (GET_MODE (trueop0)))
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{
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REAL_VALUE_TYPE d0, d1;
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@ -3642,7 +3642,7 @@ simplify_immed_subreg (enum machine_mode outermode, rtx op,
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long tmp[max_bitsize / 32];
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int bitsize = GET_MODE_BITSIZE (GET_MODE (el));
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gcc_assert (GET_MODE_CLASS (GET_MODE (el)) == MODE_FLOAT);
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gcc_assert (SCALAR_FLOAT_MODE_P (GET_MODE (el)));
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gcc_assert (bitsize <= elem_bitsize);
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gcc_assert (bitsize % value_bit == 0);
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@ -1645,7 +1645,7 @@ layout_type (tree type)
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enum machine_mode mode;
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/* First, look for a supported vector type. */
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if (GET_MODE_CLASS (innermode) == MODE_FLOAT)
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if (SCALAR_FLOAT_MODE_P (innermode))
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mode = MIN_MODE_VECTOR_FLOAT;
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else
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mode = MIN_MODE_VECTOR_INT;
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@ -348,7 +348,7 @@ type_for_widest_vector_mode (enum machine_mode inner_mode, optab op)
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enum machine_mode best_mode = VOIDmode, mode;
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int best_nunits = 0;
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if (GET_MODE_CLASS (inner_mode) == MODE_FLOAT)
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if (SCALAR_FLOAT_MODE_P (inner_mode))
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mode = MIN_MODE_VECTOR_FLOAT;
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else
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mode = MIN_MODE_VECTOR_INT;
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