Add multilib support for embedded bare-metal targets
2016-11-22 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
* config.gcc: Allow new rmprofile value for configure option
--with-multilib-list.
* config/arm/t-rmprofile: New file.
* doc/install.texi (--with-multilib-list): Document new rmprofile value
for ARM.
From-SVN: r242696
This commit is contained in:
Thomas Preud'homme
Thomas Preud'homme
parent
c69fb8161a
commit
3e0201f014
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@ -1,3 +1,11 @@
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2016-11-22 Thomas Preud'homme <thomas.preudhomme@arm.com>
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* config.gcc: Allow new rmprofile value for configure option
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--with-multilib-list.
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* config/arm/t-rmprofile: New file.
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* doc/install.texi (--with-multilib-list): Document new rmprofile value
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for ARM.
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2016-11-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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PR target/78439
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@ -3756,6 +3756,16 @@ case "${target}" in
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# pragmatic.
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tmake_profile_file="arm/t-aprofile"
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;;
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rmprofile)
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# Note that arm/t-rmprofile is a
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# stand-alone make file fragment to be
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# used only with itself. We do not
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# specifically use the
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# TM_MULTILIB_OPTION framework because
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# this shorthand is more
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# pragmatic.
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tmake_profile_file="arm/t-rmprofile"
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;;
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default)
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;;
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*)
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@ -3765,9 +3775,10 @@ case "${target}" in
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esac
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if test "x${tmake_profile_file}" != x ; then
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# arm/t-aprofile is only designed to work
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# without any with-cpu, with-arch, with-mode,
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# with-fpu or with-float options.
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# arm/t-aprofile and arm/t-rmprofile are only
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# designed to work without any with-cpu,
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# with-arch, with-mode, with-fpu or with-float
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# options.
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if test "x$with_arch" != x \
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|| test "x$with_cpu" != x \
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|| test "x$with_float" != x \
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@ -0,0 +1,174 @@
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# Copyright (C) 2016 Free Software Foundation, Inc.
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#
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# This file is part of GCC.
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#
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# GCC is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3, or (at your option)
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# any later version.
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#
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# GCC is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with GCC; see the file COPYING3. If not see
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# <http://www.gnu.org/licenses/>.
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# This is a target makefile fragment that attempts to get
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# multilibs built for the range of CPU's, FPU's and ABI's that
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# are relevant for the ARM architecture. It should not be used in
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# conjunction with another make file fragment and assumes --with-arch,
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# --with-cpu, --with-fpu, --with-float, --with-mode have their default
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# values during the configure step. We enforce this during the
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# top-level configury.
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MULTILIB_OPTIONS =
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MULTILIB_DIRNAMES =
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MULTILIB_EXCEPTIONS =
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MULTILIB_MATCHES =
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MULTILIB_REUSE =
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# We have the following hierachy:
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# ISA: A32 (.) or T16/T32 (thumb).
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# Architecture: ARMv6S-M (v6-m), ARMv7-M (v7-m), ARMv7E-M (v7e-m),
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# ARMv8-M Baseline (v8-m.base) or ARMv8-M Mainline (v8-m.main).
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# FPU: VFPv3-D16 (fpv3), FPV4-SP-D16 (fpv4-sp), FPV5-SP-D16 (fpv5-sp),
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# VFPv5-D16 (fpv5), or None (.).
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# Float-abi: Soft (.), softfp (softfp), or hard (hardfp).
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# Options to build libraries with
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MULTILIB_OPTIONS += mthumb
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MULTILIB_DIRNAMES += thumb
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MULTILIB_OPTIONS += march=armv6s-m/march=armv7-m/march=armv7e-m/march=armv7/march=armv8-m.base/march=armv8-m.main
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MULTILIB_DIRNAMES += v6-m v7-m v7e-m v7-ar v8-m.base v8-m.main
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MULTILIB_OPTIONS += mfpu=vfpv3-d16/mfpu=fpv4-sp-d16/mfpu=fpv5-sp-d16/mfpu=fpv5-d16
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MULTILIB_DIRNAMES += fpv3 fpv4-sp fpv5-sp fpv5
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MULTILIB_OPTIONS += mfloat-abi=softfp/mfloat-abi=hard
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MULTILIB_DIRNAMES += softfp hard
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# Option combinations to build library with
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# Default CPU/Arch
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MULTILIB_REQUIRED += mthumb
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MULTILIB_REQUIRED += mfloat-abi=hard
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# ARMv6-M
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MULTILIB_REQUIRED += mthumb/march=armv6s-m
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# ARMv8-M Baseline
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MULTILIB_REQUIRED += mthumb/march=armv8-m.base
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# ARMv7-M
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MULTILIB_REQUIRED += mthumb/march=armv7-m
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# ARMv7E-M
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MULTILIB_REQUIRED += mthumb/march=armv7e-m
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MULTILIB_REQUIRED += mthumb/march=armv7e-m/mfpu=fpv4-sp-d16/mfloat-abi=softfp
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MULTILIB_REQUIRED += mthumb/march=armv7e-m/mfpu=fpv4-sp-d16/mfloat-abi=hard
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MULTILIB_REQUIRED += mthumb/march=armv7e-m/mfpu=fpv5-d16/mfloat-abi=softfp
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MULTILIB_REQUIRED += mthumb/march=armv7e-m/mfpu=fpv5-d16/mfloat-abi=hard
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MULTILIB_REQUIRED += mthumb/march=armv7e-m/mfpu=fpv5-sp-d16/mfloat-abi=softfp
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MULTILIB_REQUIRED += mthumb/march=armv7e-m/mfpu=fpv5-sp-d16/mfloat-abi=hard
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# ARMv8-M Mainline
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MULTILIB_REQUIRED += mthumb/march=armv8-m.main
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MULTILIB_REQUIRED += mthumb/march=armv8-m.main/mfpu=fpv5-d16/mfloat-abi=softfp
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MULTILIB_REQUIRED += mthumb/march=armv8-m.main/mfpu=fpv5-d16/mfloat-abi=hard
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MULTILIB_REQUIRED += mthumb/march=armv8-m.main/mfpu=fpv5-sp-d16/mfloat-abi=softfp
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MULTILIB_REQUIRED += mthumb/march=armv8-m.main/mfpu=fpv5-sp-d16/mfloat-abi=hard
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# ARMv7-R as well as ARMv7-A and ARMv8-A if aprofile was not specified
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MULTILIB_REQUIRED += mthumb/march=armv7
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MULTILIB_REQUIRED += mthumb/march=armv7/mfpu=vfpv3-d16/mfloat-abi=softfp
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MULTILIB_REQUIRED += mthumb/march=armv7/mfpu=vfpv3-d16/mfloat-abi=hard
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# Matches
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# CPU Matches
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MULTILIB_MATCHES += march?armv6s-m=mcpu?cortex-m0
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MULTILIB_MATCHES += march?armv6s-m=mcpu?cortex-m0.small-multiply
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MULTILIB_MATCHES += march?armv6s-m=mcpu?cortex-m0plus
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MULTILIB_MATCHES += march?armv6s-m=mcpu?cortex-m0plus.small-multiply
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MULTILIB_MATCHES += march?armv6s-m=mcpu?cortex-m1
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MULTILIB_MATCHES += march?armv6s-m=mcpu?cortex-m1.small-multiply
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MULTILIB_MATCHES += march?armv7-m=mcpu?cortex-m3
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MULTILIB_MATCHES += march?armv7e-m=mcpu?cortex-m4
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MULTILIB_MATCHES += march?armv7e-m=mcpu?cortex-m7
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MULTILIB_MATCHES += march?armv7=mcpu?cortex-r4
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MULTILIB_MATCHES += march?armv7=mcpu?cortex-r4f
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MULTILIB_MATCHES += march?armv7=mcpu?cortex-r5
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MULTILIB_MATCHES += march?armv7=mcpu?cortex-r7
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MULTILIB_MATCHES += march?armv7=mcpu?cortex-r8
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MULTILIB_MATCHES += march?armv7=mcpu?marvell-pj4
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MULTILIB_MATCHES += march?armv7=mcpu?generic-armv7-a
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MULTILIB_MATCHES += march?armv7=mcpu?cortex-a8
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MULTILIB_MATCHES += march?armv7=mcpu?cortex-a9
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MULTILIB_MATCHES += march?armv7=mcpu?cortex-a5
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MULTILIB_MATCHES += march?armv7=mcpu?cortex-a7
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MULTILIB_MATCHES += march?armv7=mcpu?cortex-a15
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MULTILIB_MATCHES += march?armv7=mcpu?cortex-a12
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MULTILIB_MATCHES += march?armv7=mcpu?cortex-a17
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MULTILIB_MATCHES += march?armv7=mcpu?cortex-a15.cortex-a7
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MULTILIB_MATCHES += march?armv7=mcpu?cortex-a17.cortex-a7
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MULTILIB_MATCHES += march?armv7=mcpu?cortex-a32
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MULTILIB_MATCHES += march?armv7=mcpu?cortex-a35
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MULTILIB_MATCHES += march?armv7=mcpu?cortex-a53
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MULTILIB_MATCHES += march?armv7=mcpu?cortex-a57
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MULTILIB_MATCHES += march?armv7=mcpu?cortex-a57.cortex-a53
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MULTILIB_MATCHES += march?armv7=mcpu?cortex-a72
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MULTILIB_MATCHES += march?armv7=mcpu?cortex-a72.cortex-a53
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MULTILIB_MATCHES += march?armv7=mcpu?cortex-a73
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MULTILIB_MATCHES += march?armv7=mcpu?cortex-a73.cortex-a35
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MULTILIB_MATCHES += march?armv7=mcpu?cortex-a73.cortex-a53
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MULTILIB_MATCHES += march?armv7=mcpu?exynos-m1
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MULTILIB_MATCHES += march?armv7=mcpu?qdf24xx
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MULTILIB_MATCHES += march?armv7=mcpu?xgene1
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# Arch Matches
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MULTILIB_MATCHES += march?armv6s-m=march?armv6-m
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MULTILIB_MATCHES += march?armv8-m.main=march?armv8-m.main+dsp
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MULTILIB_MATCHES += march?armv7=march?armv7-r
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ifeq (,$(HAS_APROFILE))
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MULTILIB_MATCHES += march?armv7=march?armv7-a
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MULTILIB_MATCHES += march?armv7=march?armv7ve
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MULTILIB_MATCHES += march?armv7=march?armv8-a
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MULTILIB_MATCHES += march?armv7=march?armv8-a+crc
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MULTILIB_MATCHES += march?armv7=march?armv8.1-a
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MULTILIB_MATCHES += march?armv7=march?armv8.1-a+crc
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MULTILIB_MATCHES += march?armv7=march?armv8.2-a
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MULTILIB_MATCHES += march?armv7=march?armv8.2-a+fp16
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endif
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# FPU matches
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ifeq (,$(HAS_APROFILE))
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MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?vfpv3
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MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?vfpv3-fp16
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MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?vfpv3-d16-fp16
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MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?neon
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MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?neon-fp16
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MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?vfpv4
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MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?vfpv4-d16
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MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?neon-vfpv4
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MULTILIB_MATCHES += mfpu?fpv5-d16=mfpu?fp-armv8
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MULTILIB_MATCHES += mfpu?fpv5-d16=mfpu?neon-fp-armv8
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MULTILIB_MATCHES += mfpu?fpv5-d16=mfpu?crypto-neon-fp-armv8
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endif
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# We map all requests for ARMv7-R or ARMv7-A in ARM mode to Thumb mode and
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# any FPU to VFPv3-d16 if possible.
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MULTILIB_REUSE += mthumb/march.armv7=march.armv7
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MULTILIB_REUSE += mthumb/march.armv7/mfpu.vfpv3-d16/mfloat-abi.softfp=march.armv7/mfpu.vfpv3-d16/mfloat-abi.softfp
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MULTILIB_REUSE += mthumb/march.armv7/mfpu.vfpv3-d16/mfloat-abi.hard=march.armv7/mfpu.vfpv3-d16/mfloat-abi.hard
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MULTILIB_REUSE += mthumb/march.armv7/mfpu.vfpv3-d16/mfloat-abi.softfp=march.armv7/mfpu.fpv5-d16/mfloat-abi.softfp
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MULTILIB_REUSE += mthumb/march.armv7/mfpu.vfpv3-d16/mfloat-abi.hard=march.armv7/mfpu.fpv5-d16/mfloat-abi.hard
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MULTILIB_REUSE += mthumb/march.armv7/mfpu.vfpv3-d16/mfloat-abi.softfp=mthumb/march.armv7/mfpu.fpv5-d16/mfloat-abi.softfp
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MULTILIB_REUSE += mthumb/march.armv7/mfpu.vfpv3-d16/mfloat-abi.hard=mthumb/march.armv7/mfpu.fpv5-d16/mfloat-abi.hard
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@ -1081,19 +1081,59 @@ sysv, aix.
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@item --with-multilib-list=@var{list}
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@itemx --without-multilib-list
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Specify what multilibs to build.
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Currently only implemented for arm*-*-*, sh*-*-* and x86-64-*-linux*.
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Specify what multilibs to build. @var{list} is a comma separated list of
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values, possibly consisting of a single value. Currently only implemented
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for arm*-*-*, sh*-*-* and x86-64-*-linux*. The accepted values and meaning
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for each target is given below.
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@table @code
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@item arm*-*-*
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@var{list} is either @code{default} or @code{aprofile}. Specifying
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@code{default} is equivalent to omitting this option while specifying
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@code{aprofile} builds multilibs for each combination of ISA (@code{-marm} or
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@code{-mthumb}), architecture (@code{-march=armv7-a}, @code{-march=armv7ve},
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or @code{-march=armv8-a}), FPU available (none, @code{-mfpu=vfpv3-d16},
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@code{-mfpu=neon}, @code{-mfpu=vfpv4-d16}, @code{-mfpu=neon-vfpv4} or
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@code{-mfpu=neon-fp-armv8} depending on architecture) and floating-point ABI
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(@code{-mfloat-abi=softfp} or @code{-mfloat-abi=hard}).
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@var{list} is one of@code{default}, @code{aprofile} or @code{rmprofile}.
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Specifying @code{default} is equivalent to omitting this option, ie. only the
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default runtime library will be enabled. Specifying @code{aprofile} or
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@code{rmprofile} builds multilibs for a combination of ISA, architecture,
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FPU available and floating-point ABI.
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The table below gives the combination of ISAs, architectures, FPUs and
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floating-point ABIs for which multilibs are built for each accepted value.
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@multitable @columnfractions .15 .28 .30
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@item Option @tab aprofile @tab rmprofile
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@item ISAs
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@tab @code{-marm} and @code{-mthumb}
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@tab @code{-mthumb}
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@item Architectures@*@*@*@*@*@*
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@tab default architecture@*
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@code{-march=armv7-a}@*
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@code{-march=armv7ve}@*
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@code{-march=armv8-a}@*@*@*
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@tab default architecture@*
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@code{-march=armv6s-m}@*
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@code{-march=armv7-m}@*
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@code{-march=armv7e-m}@*
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@code{-march=armv8-m.base}@*
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@code{-march=armv8-m.main}@*
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@code{-march=armv7}
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@item FPUs@*@*@*@*@*
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@tab none@*
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@code{-mfpu=vfpv3-d16}@*
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@code{-mfpu=neon}@*
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@code{-mfpu=vfpv4-d16}@*
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@code{-mfpu=neon-vfpv4}@*
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@code{-mfpu=neon-fp-armv8}
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@tab none@*
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@code{-mfpu=vfpv3-d16}@*
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@code{-mfpu=fpv4-sp-d16}@*
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@code{-mfpu=fpv5-sp-d16}@*
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@code{-mfpu=fpv5-d16}@*
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@item floating-point@/ ABIs@*@*
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@tab @code{-mfloat-abi=soft}@*
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@code{-mfloat-abi=softfp}@*
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@code{-mfloat-abi=hard}
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@tab @code{-mfloat-abi=soft}@*
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@code{-mfloat-abi=softfp}@*
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@code{-mfloat-abi=hard}
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@end multitable
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@item sh*-*-*
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@var{list} is a comma separated list of CPU names. These must be of the
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