re PR other/5299 (then -> than fixes)

2002-01-11  Craig Rodrigues  <rodrigc@gcc.gnu.org>

        PR other/5299
        * config/ns32k/ns32k.md: Fix spelling mistake of "than" in comments.
        * combine.c (force_to_mode): Same.
        * reload1.c (clear_reload_reg_in_use): Same.

From-SVN: r48780

gcc/ChangeLog

@@ -1,3 +1,10 @@
+2002-01-11  Craig Rodrigues  <rodrigc@gcc.gnu.org>
+
+	PR other/5299
+	* config/ns32k/ns32k.md: Fix spelling mistake of "than" in comments.
+	* combine.c (force_to_mode): Same.
+	* reload1.c (clear_reload_reg_in_use): Same.
+
 2002-01-11  Nick Clifton  <nickc@cambridge.redhat.com>
 
 	* config/arm/arm.c (arm_gen_constant): Correct test of 'remainder'

gcc/combine.c

@@ -6974,7 +6974,7 @@ force_to_mode (x, mode, mask, reg, just_select)
 	{
 	  int i = -1;
 
-	  /* If the considered data is wider then HOST_WIDE_INT, we can't
+	  /* If the considered data is wider than HOST_WIDE_INT, we can't
 	     represent a mask for all its bits in a single scalar.
 	     But we only care about the lower bits, so calculate these.  */
 

gcc/config/ns32k/ns32k.md

@@ -2046,7 +2046,7 @@
 }")
 
 ;;; Index insns.  These are about the same speed as multiply-add counterparts.
-;;; but slower then using power-of-2 shifts if we can use them
+;;; but slower than using power-of-2 shifts if we can use them
 ;
 ;;; See note 1
 ;(define_insn ""

gcc/reload1.c

@@ -4313,7 +4313,7 @@ clear_reload_reg_in_use (regno, opnum, type, mode)
      excluding the intervals of of reload registers by them from the
      interval of freed reload registers.  Since we only keep track of
      one set of interval bounds, we might have to exclude somewhat
-     more then what would be necessary if we used a HARD_REG_SET here.
+     more than what would be necessary if we used a HARD_REG_SET here.
      But this should only happen very infrequently, so there should
      be no reason to worry about it.  */