s390.c (s390_select_ccmode): Do not attempt to use CCL, CCL1, or CCL2 modes with floating point operations.
2003-08-01 Andreas Krebbel <krebbel1@de.ibm.com> * config/s390/s390.c (s390_select_ccmode): Do not attempt to use CCL, CCL1, or CCL2 modes with floating point operations. * config/s390/s390.md ("*addsf3_cc", "*addsf3_cconly", "*adddf3_cc", "*adddf3_cconly", "*subsf3_cc", "*subsf3_cconly", "*subdf3_cc", "*subdf3_cconly"): New insns. ("*negabssi2", "*negabsdi2", "*negabsdf2", "*negabssf2"): Likewise. From-SVN: r70052
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d6f7c70410
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@ -1,3 +1,13 @@
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2003-08-01 Andreas Krebbel <krebbel1@de.ibm.com>
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* config/s390/s390.c (s390_select_ccmode): Do not attempt to use CCL,
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CCL1, or CCL2 modes with floating point operations.
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* config/s390/s390.md ("*addsf3_cc", "*addsf3_cconly", "*adddf3_cc",
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"*adddf3_cconly", "*subsf3_cc", "*subsf3_cconly", "*subdf3_cc",
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"*subdf3_cconly"): New insns.
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("*negabssi2", "*negabsdi2", "*negabsdf2", "*negabssf2"): Likewise.
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2003-08-01 Neil Booth <neil@daikokuya.co.uk>
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* Makefile.in: Refine dependencies.
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@ -377,8 +377,9 @@ s390_select_ccmode (code, op0, op1)
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if (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 1)) == CONST_INT
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&& CONST_OK_FOR_LETTER_P (INTVAL (XEXP (op0, 1)), 'K'))
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return CCAPmode;
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if (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
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|| GET_CODE (op1) == NEG)
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if ((GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
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|| GET_CODE (op1) == NEG)
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&& GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
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return CCLmode;
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if (GET_CODE (op0) == AND)
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@ -432,7 +433,8 @@ s390_select_ccmode (code, op0, op1)
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case LTU:
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case GEU:
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if (GET_CODE (op0) == PLUS)
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if (GET_CODE (op0) == PLUS
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&& GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
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return CCL1mode;
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if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
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@ -442,7 +444,8 @@ s390_select_ccmode (code, op0, op1)
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case LEU:
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case GTU:
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if (GET_CODE (op0) == MINUS)
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if (GET_CODE (op0) == MINUS
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&& GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
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return CCL2mode;
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if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
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@ -3451,6 +3451,33 @@
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[(set_attr "op_type" "RRE,RXE")
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(set_attr "type" "fsimpd,fsimpd")])
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(define_insn "*adddf3_cc"
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[(set (reg 33)
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(compare (plus:DF (match_operand:DF 1 "nonimmediate_operand" "%0,0")
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(match_operand:DF 2 "general_operand" "f,R"))
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(match_operand:DF 3 "const0_operand" "")))
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(set (match_operand:DF 0 "register_operand" "=f,f")
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(plus:DF (match_dup 1) (match_dup 2)))]
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"s390_match_ccmode (insn, CCSmode) && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
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"@
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adbr\\t%0,%2
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adb\\t%0,%2"
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[(set_attr "op_type" "RRE,RXE")
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(set_attr "type" "fsimpd,fsimpd")])
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(define_insn "*adddf3_cconly"
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[(set (reg 33)
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(compare (plus:DF (match_operand:DF 1 "nonimmediate_operand" "%0,0")
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(match_operand:DF 2 "general_operand" "f,R"))
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(match_operand:DF 3 "const0_operand" "")))
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(clobber (match_scratch:DF 0 "=f,f"))]
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"s390_match_ccmode (insn, CCSmode) && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
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"@
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adbr\\t%0,%2
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adb\\t%0,%2"
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[(set_attr "op_type" "RRE,RXE")
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(set_attr "type" "fsimpd,fsimpd")])
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(define_insn "*adddf3_ibm"
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[(set (match_operand:DF 0 "register_operand" "=f,f")
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(plus:DF (match_operand:DF 1 "nonimmediate_operand" "%0,0")
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@ -3488,6 +3515,33 @@
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[(set_attr "op_type" "RRE,RXE")
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(set_attr "type" "fsimps,fsimps")])
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(define_insn "*addsf3_cc"
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[(set (reg 33)
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(compare (plus:SF (match_operand:SF 1 "nonimmediate_operand" "%0,0")
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(match_operand:SF 2 "general_operand" "f,R"))
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(match_operand:SF 3 "const0_operand" "")))
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(set (match_operand:SF 0 "register_operand" "=f,f")
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(plus:SF (match_dup 1) (match_dup 2)))]
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"s390_match_ccmode (insn, CCSmode) && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
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"@
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aebr\\t%0,%2
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aeb\\t%0,%2"
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[(set_attr "op_type" "RRE,RXE")
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(set_attr "type" "fsimps,fsimps")])
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(define_insn "*addsf3_cconly"
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[(set (reg 33)
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(compare (plus:SF (match_operand:SF 1 "nonimmediate_operand" "%0,0")
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(match_operand:SF 2 "general_operand" "f,R"))
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(match_operand:SF 3 "const0_operand" "")))
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(clobber (match_scratch:SF 0 "=f,f"))]
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"s390_match_ccmode (insn, CCSmode) && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
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"@
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aebr\\t%0,%2
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aeb\\t%0,%2"
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[(set_attr "op_type" "RRE,RXE")
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(set_attr "type" "fsimps,fsimps")])
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(define_insn "*addsf3"
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[(set (match_operand:SF 0 "register_operand" "=f,f")
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(plus:SF (match_operand:SF 1 "nonimmediate_operand" "%0,0")
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@ -3752,6 +3806,33 @@
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[(set_attr "op_type" "RRE,RXE")
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(set_attr "type" "fsimpd,fsimpd")])
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(define_insn "*subdf3_cc"
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[(set (reg 33)
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(compare (minus:DF (match_operand:DF 1 "nonimmediate_operand" "%0,0")
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(match_operand:DF 2 "general_operand" "f,R"))
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(match_operand:DF 3 "const0_operand" "")))
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(set (match_operand:DF 0 "register_operand" "=f,f")
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(plus:DF (match_dup 1) (match_dup 2)))]
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"s390_match_ccmode (insn, CCSmode) && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
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"@
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sdbr\\t%0,%2
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sdb\\t%0,%2"
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[(set_attr "op_type" "RRE,RXE")
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(set_attr "type" "fsimpd,fsimpd")])
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(define_insn "*subdf3_cconly"
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[(set (reg 33)
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(compare (minus:DF (match_operand:DF 1 "nonimmediate_operand" "%0,0")
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(match_operand:DF 2 "general_operand" "f,R"))
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(match_operand:DF 3 "const0_operand" "")))
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(clobber (match_scratch:DF 0 "=f,f"))]
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"s390_match_ccmode (insn, CCSmode) && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
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"@
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sdbr\\t%0,%2
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sdb\\t%0,%2"
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[(set_attr "op_type" "RRE,RXE")
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(set_attr "type" "fsimpd,fsimpd")])
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(define_insn "*subdf3_ibm"
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[(set (match_operand:DF 0 "register_operand" "=f,f")
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(minus:DF (match_operand:DF 1 "register_operand" "0,0")
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@ -3789,6 +3870,33 @@
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[(set_attr "op_type" "RRE,RXE")
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(set_attr "type" "fsimps,fsimps")])
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(define_insn "*subsf3_cc"
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[(set (reg 33)
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(compare (minus:SF (match_operand:SF 1 "nonimmediate_operand" "%0,0")
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(match_operand:SF 2 "general_operand" "f,R"))
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(match_operand:SF 3 "const0_operand" "")))
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(set (match_operand:SF 0 "register_operand" "=f,f")
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(minus:SF (match_dup 1) (match_dup 2)))]
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"s390_match_ccmode (insn, CCSmode) && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
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"@
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sebr\\t%0,%2
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seb\\t%0,%2"
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[(set_attr "op_type" "RRE,RXE")
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(set_attr "type" "fsimps,fsimps")])
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(define_insn "*subsf3_cconly"
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[(set (reg 33)
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(compare (minus:SF (match_operand:SF 1 "nonimmediate_operand" "%0,0")
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(match_operand:SF 2 "general_operand" "f,R"))
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(match_operand:SF 3 "const0_operand" "")))
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(clobber (match_scratch:SF 0 "=f,f"))]
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"s390_match_ccmode (insn, CCSmode) && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
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"@
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sebr\\t%0,%2
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seb\\t%0,%2"
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[(set_attr "op_type" "RRE,RXE")
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(set_attr "type" "fsimps,fsimps")])
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(define_insn "*subsf3_ibm"
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[(set (match_operand:SF 0 "register_operand" "=f,f")
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(minus:SF (match_operand:SF 1 "register_operand" "0,0")
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[(set_attr "op_type" "RR")
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(set_attr "type" "fsimps")])
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;;
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;;- Negated absolute value instructions
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;;
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;
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; Integer
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;
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(define_insn "*negabssi2"
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[(set (match_operand:SI 0 "register_operand" "=d")
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(neg:SI (abs:SI (match_operand:SI 1 "register_operand" "d"))))
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(clobber (reg:CC 33))]
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""
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"lnr\\t%0,%1"
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[(set_attr "op_type" "RR")])
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(define_insn "*negabsdi2"
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[(set (match_operand:DI 0 "register_operand" "=d")
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(neg:DI (abs:DI (match_operand:DI 1 "register_operand" "d"))))
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(clobber (reg:CC 33))]
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"TARGET_64BIT"
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"lngr\\t%0,%1"
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[(set_attr "op_type" "RRE")])
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;
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; Floating point
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;
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(define_insn "*negabssf2"
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[(set (match_operand:SF 0 "register_operand" "=f")
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(neg:SF (abs:SF (match_operand:SF 1 "register_operand" "f"))))
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(clobber (reg:CC 33))]
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"TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
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"lnebr\\t%0,%1"
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[(set_attr "op_type" "RRE")
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(set_attr "type" "fsimps")])
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(define_insn "*negabsdf2"
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[(set (match_operand:DF 0 "register_operand" "=f")
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(neg:DF (abs:DF (match_operand:DF 1 "register_operand" "f"))))
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(clobber (reg:CC 33))]
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"TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
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"lndbr\\t%0,%1"
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[(set_attr "op_type" "RRE")
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(set_attr "type" "fsimpd")])
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;;
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;;- Square root instructions.
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;;
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