mips.h (FP_INC, [...]): New macros.
* config/mips/mips.h (FP_INC, UNITS_PER_FPVALUE): New macros. * config/mips/mips.c (compute_frame_size): Retrofit them here. (save_restore_insns, mips_expand_epilogue): And here. (build_mips16_call_stub): And here. (mips_function_value): Use the new macros to decide whether a single or complex float can be returned in floating-point registers. Return a parallel rtx in the complex case. From-SVN: r50766
This commit is contained in:
Richard Sandiford
Richard Sandiford
parent
1e3881c2a0
commit
3f26edaa19
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@ -1,3 +1,13 @@
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2002-03-14 Richard Sandiford <rsandifo@redhat.com>
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* config/mips/mips.h (FP_INC, UNITS_PER_FPVALUE): New macros.
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* config/mips/mips.c (compute_frame_size): Retrofit them here.
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(save_restore_insns, mips_expand_epilogue): And here.
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(build_mips16_call_stub): And here.
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(mips_function_value): Use the new macros to decide whether a single
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or complex float can be returned in floating-point registers. Return
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a parallel rtx in the complex case.
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Thu Mar 14 11:03:12 CET 2002 Jan Hubicka <jh@suse.cz>
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* toplev.c (rest_of_compilation): Add CLEANUP_UPDATE_LIFE to cfg_cleanup
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@ -6362,6 +6362,7 @@ compute_frame_size (size)
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long fmask; /* mask of saved fp registers */
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int fp_inc; /* 1 or 2 depending on the size of fp regs */
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long fp_bits; /* bitmask to use for each fp register */
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tree return_type;
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gp_reg_size = 0;
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fp_reg_size = 0;
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@ -6380,6 +6381,7 @@ compute_frame_size (size)
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args_size = 4 * UNITS_PER_WORD;
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total_size = var_size + args_size + extra_size;
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return_type = DECL_RESULT (current_function_decl);
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/* Calculate space needed for gp registers. */
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for (regno = GP_REG_FIRST; regno <= GP_REG_LAST; regno++)
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@ -6398,12 +6400,9 @@ compute_frame_size (size)
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&& regno == GP_REG_FIRST + 31
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&& mips16_hard_float
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&& ! mips_entry
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&& ! aggregate_value_p (DECL_RESULT (current_function_decl))
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&& (GET_MODE_CLASS (DECL_MODE (DECL_RESULT (current_function_decl)))
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== MODE_FLOAT)
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&& (! TARGET_SINGLE_FLOAT
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|| (GET_MODE_SIZE (DECL_MODE (DECL_RESULT (current_function_decl)))
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<= 4))))
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&& ! aggregate_value_p (return_type)
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&& GET_MODE_CLASS (DECL_MODE (return_type)) == MODE_FLOAT
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&& GET_MODE_SIZE (DECL_MODE (return_type)) <= UNITS_PER_FPVALUE))
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{
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gp_reg_size += GET_MODE_SIZE (gpr_mode);
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mask |= 1L << (regno - GP_REG_FIRST);
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@ -6854,12 +6853,10 @@ save_restore_insns (store_p, large_reg, large_offset, file)
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/* Save floating point registers if needed. */
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if (fmask)
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{
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int fp_inc = (TARGET_FLOAT64 || TARGET_SINGLE_FLOAT) ? 1 : 2;
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int fp_size = fp_inc * UNITS_PER_FPREG;
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/* Pick which pointer to use as a base register. */
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fp_offset = current_frame_info.fp_sp_offset;
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end_offset = fp_offset - (current_frame_info.fp_reg_size - fp_size);
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end_offset = fp_offset - (current_frame_info.fp_reg_size
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- UNITS_PER_FPVALUE);
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if (fp_offset < 0 || end_offset < 0)
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internal_error
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@ -6905,9 +6902,9 @@ save_restore_insns (store_p, large_reg, large_offset, file)
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/* This loop must iterate over the same space as its companion in
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compute_frame_size. */
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for (regno = (FP_REG_LAST - fp_inc + 1);
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for (regno = (FP_REG_LAST - FP_INC + 1);
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regno >= FP_REG_FIRST;
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regno -= fp_inc)
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regno -= FP_INC)
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if (BITSET_P (fmask, regno - FP_REG_FIRST))
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{
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if (file == 0)
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@ -6939,7 +6936,7 @@ save_restore_insns (store_p, large_reg, large_offset, file)
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fprintf (file, "(%s)\n", reg_names[REGNO(base_reg_rtx)]);
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}
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fp_offset -= fp_size;
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fp_offset -= UNITS_PER_FPVALUE;
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}
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}
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}
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@ -7769,23 +7766,24 @@ mips_expand_epilogue ()
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int
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mips_can_use_return_insn ()
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{
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tree return_type;
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if (! reload_completed)
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return 0;
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if (regs_ever_live[31] || current_function_profile)
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return 0;
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return_type = DECL_RESULT (current_function_decl);
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/* In mips16 mode, a function which returns a floating point value
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needs to arrange to copy the return value into the floating point
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registers. */
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if (TARGET_MIPS16
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&& mips16_hard_float
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&& ! aggregate_value_p (DECL_RESULT (current_function_decl))
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&& (GET_MODE_CLASS (DECL_MODE (DECL_RESULT (current_function_decl)))
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== MODE_FLOAT)
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&& (! TARGET_SINGLE_FLOAT
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|| (GET_MODE_SIZE (DECL_MODE (DECL_RESULT (current_function_decl)))
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<= 4)))
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&& ! aggregate_value_p (return_type)
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&& GET_MODE_CLASS (DECL_MODE (return_type)) == MODE_FLOAT
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&& GET_MODE_SIZE (DECL_MODE (return_type)) <= UNITS_PER_FPVALUE)
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return 0;
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if (current_frame_info.initialized)
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@ -7951,41 +7949,23 @@ mips_function_value (valtype, func)
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just as PROMOTE_MODE does. */
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mode = promote_mode (valtype, mode, &unsignedp, 1);
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if (mclass == MODE_FLOAT)
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if (mclass == MODE_FLOAT && GET_MODE_SIZE (mode) <= UNITS_PER_FPVALUE)
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reg = FP_RETURN;
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else if (mclass == MODE_COMPLEX_FLOAT
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&& GET_MODE_SIZE (mode) <= UNITS_PER_FPVALUE * 2)
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{
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if (TARGET_SINGLE_FLOAT
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&& (mclass == MODE_FLOAT
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? GET_MODE_SIZE (mode) > 4 : GET_MODE_SIZE (mode) / 2 > 4))
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reg = GP_RETURN;
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else
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reg = FP_RETURN;
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}
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enum machine_mode cmode = TYPE_MODE (TREE_TYPE (valtype));
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else if (mclass == MODE_COMPLEX_FLOAT)
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{
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if (TARGET_FLOAT64)
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reg = FP_RETURN;
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else if (mode == SCmode)
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{
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/* When FP registers are 32 bits, we can't directly reference
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the odd numbered ones, so let's make a pair of evens. */
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enum machine_mode cmode = TYPE_MODE (TREE_TYPE (valtype));
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return gen_rtx_PARALLEL
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(VOIDmode,
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gen_rtvec (2,
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gen_rtx_EXPR_LIST (VOIDmode,
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gen_rtx_REG (cmode,
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FP_RETURN),
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GEN_INT (0)),
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gen_rtx_EXPR_LIST (VOIDmode,
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gen_rtx_REG (cmode,
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FP_RETURN + 2),
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GEN_INT (4))));
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}
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else
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reg = FP_RETURN;
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return gen_rtx_PARALLEL
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(VOIDmode,
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gen_rtvec (2,
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gen_rtx_EXPR_LIST (VOIDmode,
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gen_rtx_REG (cmode, FP_RETURN),
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GEN_INT (0)),
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gen_rtx_EXPR_LIST (VOIDmode,
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gen_rtx_REG (cmode, FP_RETURN + FP_INC),
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GEN_INT (GET_MODE_SIZE (cmode)))));
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}
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else if (TREE_CODE (valtype) == RECORD_TYPE
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@ -8680,8 +8660,7 @@ build_mips16_call_stub (retval, fnmem, arg_size, fp_code)
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register. */
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fpret = (retval != 0
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&& GET_MODE_CLASS (GET_MODE (retval)) == MODE_FLOAT
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&& (! TARGET_SINGLE_FLOAT
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|| GET_MODE_SIZE (GET_MODE (retval)) <= 4));
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&& GET_MODE_SIZE (GET_MODE (retval)) <= UNITS_PER_FPVALUE);
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/* We don't need to do anything if there were no floating point
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arguments and the value will not be returned in a floating point
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@ -1591,6 +1591,13 @@ do { \
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/* For MIPS, width of a floating point register. */
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#define UNITS_PER_FPREG (TARGET_FLOAT64 ? 8 : 4)
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/* If register $f0 holds a floating-point value, $f(0 + FP_INC) is
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the next available register. */
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#define FP_INC (TARGET_FLOAT64 || TARGET_SINGLE_FLOAT ? 1 : 2)
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/* The largest size of value that can be held in floating-point registers. */
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#define UNITS_PER_FPVALUE (FP_INC * UNITS_PER_FPREG)
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/* A C expression for the size in bits of the type `int' on the
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target machine. If you don't define this, the default is one
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word. */
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