From 3ff9b352df898807b0c8608a74cfb89b1626d38a Mon Sep 17 00:00:00 2001 From: Hale Wang Date: Thu, 6 Nov 2014 05:38:45 +0000 Subject: [PATCH] arm.c: Add cortex-m7 tune. 2014-10-11 Hale Wang * config/arm/arm.c: Add cortex-m7 tune. * config/arm/arm-cores.def: Use cortex-m7 tune. From-SVN: r217173 --- gcc/ChangeLog | 5 +++++ gcc/config/arm/arm-cores.def | 2 +- gcc/config/arm/arm.c | 21 +++++++++++++++++++++ 3 files changed, 27 insertions(+), 1 deletion(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e254dc2723d..a3a9334fdea 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2014-10-11 Hale Wang + + * config/arm/arm.c: Add cortex-m7 tune. + * config/arm/arm-cores.def: Use cortex-m7 tune. + 2014-11-05 Uros Bizjak PR target/63538 diff --git a/gcc/config/arm/arm-cores.def b/gcc/config/arm/arm-cores.def index 56ec7fd8fe7..3b34173e983 100644 --- a/gcc/config/arm/arm-cores.def +++ b/gcc/config/arm/arm-cores.def @@ -149,7 +149,7 @@ ARM_CORE("cortex-r4", cortexr4, cortexr4, 7R, FL_LDSCHED, cortex) ARM_CORE("cortex-r4f", cortexr4f, cortexr4f, 7R, FL_LDSCHED, cortex) ARM_CORE("cortex-r5", cortexr5, cortexr5, 7R, FL_LDSCHED | FL_ARM_DIV, cortex) ARM_CORE("cortex-r7", cortexr7, cortexr7, 7R, FL_LDSCHED | FL_ARM_DIV, cortex) -ARM_CORE("cortex-m7", cortexm7, cortexm7, 7EM, FL_LDSCHED, v7m) +ARM_CORE("cortex-m7", cortexm7, cortexm7, 7EM, FL_LDSCHED, cortex_m7) ARM_CORE("cortex-m4", cortexm4, cortexm4, 7EM, FL_LDSCHED, v7m) ARM_CORE("cortex-m3", cortexm3, cortexm3, 7M, FL_LDSCHED, v7m) ARM_CORE("marvell-pj4", marvell_pj4, marvell_pj4, 7A, FL_LDSCHED, 9e) diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 4f047076f83..beeeb970db0 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -2022,6 +2022,27 @@ const struct tune_params arm_v7m_tune = 8 /* Maximum insns to inline memset. */ }; +/* Cortex-M7 tuning. */ + +const struct tune_params arm_cortex_m7_tune = +{ + arm_9e_rtx_costs, + &v7m_extra_costs, + NULL, /* Sched adj cost. */ + 0, /* Constant limit. */ + 0, /* Max cond insns. */ + ARM_PREFETCH_NOT_BENEFICIAL, + true, /* Prefer constant pool. */ + arm_cortex_m_branch_cost, + false, /* Prefer LDRD/STRD. */ + {true, true}, /* Prefer non short circuit. */ + &arm_default_vec_cost, /* Vectorizer costs. */ + false, /* Prefer Neon for 64-bits bitops. */ + false, false, /* Prefer 32-bit encodings. */ + false, /* Prefer Neon for stringops. */ + 8 /* Maximum insns to inline memset. */ +}; + /* The arm_v6m_tune is duplicated from arm_cortex_tune, rather than arm_v6t2_tune. It is used for cortex-m0, cortex-m1 and cortex-m0plus. */ const struct tune_params arm_v6m_tune =