From 40501e5f72f1d3dc0eac9d392cd8d7a5d4196035 Mon Sep 17 00:00:00 2001 From: Alan Modra Date: Thu, 20 Sep 2001 02:35:00 +0000 Subject: [PATCH] revert: rs6000.c (logical_operand): CONST_INTs are already sign-extended. 2001-09-19 Alan Modra David Edelsohn Revert: * config/rs6000/rs6000.c (logical_operand): CONST_INTs are already sign-extended. * config/rs6000/aix.h (INIT_TARGET_OPTABS): Define TFmode handlers. * config/rs6000/rs6000.c (logical_operand): Streamline comparison with HOST_WIDE_INT. (rs6000_emit_set_long_const): Avoid unnecessary shift. (output_profile_hook): Declare label_name const. * config/rs6000/rs6000.md (boolcsi3, boolcdi3): Change predicates to match constraints. Co-Authored-By: David Edelsohn From-SVN: r45699 --- gcc/ChangeLog | 15 ++++++++++++++ gcc/config/rs6000/aix.h | 20 +++++++++++++++++-- gcc/config/rs6000/rs6000.c | 40 ++++++++++++++++++------------------- gcc/config/rs6000/rs6000.md | 8 ++++---- 4 files changed, 57 insertions(+), 26 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 101d40a0d52..0d6f11fb25e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,18 @@ +2001-09-19 Alan Modra + David Edelsohn + + Revert: + * config/rs6000/rs6000.c (logical_operand): CONST_INTs are + already sign-extended. + + * config/rs6000/aix.h (INIT_TARGET_OPTABS): Define TFmode handlers. + * config/rs6000/rs6000.c (logical_operand): Always compare op as + HOST_WIDE_INT. + (rs6000_emit_set_long_const): Avoid unnecessary shift. + (output_profile_hook): Declare label_name const. + * config/rs6000/rs6000.md (boolcsi3, boolcdi3): Change predicates + to match constraints. + 2001-09-19 Stan Shebs * alias.c: Fix typos in comments. diff --git a/gcc/config/rs6000/aix.h b/gcc/config/rs6000/aix.h index 28bf98aab13..d807ee2a9db 100644 --- a/gcc/config/rs6000/aix.h +++ b/gcc/config/rs6000/aix.h @@ -146,8 +146,13 @@ Boston, MA 02111-1307, USA. */ /* Define cutoff for using external functions to save floating point. */ #define FP_SAVE_INLINE(FIRST_REG) ((FIRST_REG) == 62 || (FIRST_REG) == 63) -/* Optabs entries for the int->float routines, using the standard - AIX names. */ +/* Optabs entries for the int->float routines and quad FP operations + using the standard AIX names. */ +#define ADDTF3_LIBCALL "_xlqadd" +#define DIVTF3_LIBCALL "_xlqdiv" +#define MULTF3_LIBCALL "_xlqmul" +#define SUBTF3_LIBCALL "_xlqsub" + #define INIT_TARGET_OPTABS \ do { \ if (! TARGET_POWER2 && ! TARGET_POWERPC && TARGET_HARD_FLOAT) \ @@ -155,6 +160,17 @@ Boston, MA 02111-1307, USA. */ fixdfsi_libfunc = init_one_libfunc (RS6000_ITRUNC); \ fixunsdfsi_libfunc = init_one_libfunc (RS6000_UITRUNC); \ } \ + if (TARGET_HARD_FLOAT) \ + { \ + add_optab->handlers[(int) TFmode].libfunc \ + = init_one_libfunc (ADDTF3_LIBCALL); \ + sub_optab->handlers[(int) TFmode].libfunc \ + = init_one_libfunc (SUBTF3_LIBCALL); \ + smul_optab->handlers[(int) TFmode].libfunc \ + = init_one_libfunc (MULTF3_LIBCALL); \ + sdiv_optab->handlers[(int) TFmode].libfunc \ + = init_one_libfunc (DIVTF3_LIBCALL); \ + } \ } while (0) /* AIX always has a TOC. */ diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 3cbb3aab233..c1b1f71152d 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -1104,36 +1104,35 @@ logical_operand (op, mode) register rtx op; enum machine_mode mode; { - /* an unsigned representation of 'op'. */ - unsigned HOST_WIDE_INT opl, oph; + HOST_WIDE_INT opl, oph; if (gpc_reg_operand (op, mode)) return 1; if (GET_CODE (op) == CONST_INT) - opl = INTVAL (op); + { + opl = INTVAL (op) & GET_MODE_MASK (mode); + +#if HOST_BITS_PER_WIDE_INT <= 32 + if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT && opl < 0) + return 0; +#endif + } else if (GET_CODE (op) == CONST_DOUBLE) { if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT) - abort(); + abort (); opl = CONST_DOUBLE_LOW (op); oph = CONST_DOUBLE_HIGH (op); - - if (oph != ((unsigned HOST_WIDE_INT)0 - - ((opl & ((unsigned HOST_WIDE_INT)1 - << (HOST_BITS_PER_WIDE_INT - 1))) != 0))) + if (oph != 0) return 0; } else return 0; - /* This must really be SImode, not MODE. */ - if (opl != (unsigned HOST_WIDE_INT) trunc_int_for_mode (opl, SImode)) - return 0; - - return ((opl & 0xffff) == 0 - || (opl & ~ (unsigned HOST_WIDE_INT) 0xffff) == 0); + return ((opl & ~ (unsigned HOST_WIDE_INT) 0xffff) == 0 + || (opl & ~ (unsigned HOST_WIDE_INT) 0xffff0000) == 0); } /* Return 1 if C is a constant that is not a logical operand (as @@ -1740,10 +1739,10 @@ rs6000_emit_set_long_const (dest, c1, c2) #endif /* Construct the high word */ - if (d4) + if (d4 != 0) { emit_move_insn (dest, GEN_INT (d4)); - if (d3) + if (d3 != 0) emit_move_insn (dest, gen_rtx_PLUS (DImode, dest, GEN_INT (d3))); } @@ -1751,12 +1750,13 @@ rs6000_emit_set_long_const (dest, c1, c2) emit_move_insn (dest, GEN_INT (d3)); /* Shift it into place */ - emit_move_insn (dest, gen_rtx_ASHIFT (DImode, dest, GEN_INT (32))); + if (d3 != 0 || d4 != 0) + emit_move_insn (dest, gen_rtx_ASHIFT (DImode, dest, GEN_INT (32))); /* Add in the low bits. */ - if (d2) + if (d2 != 0) emit_move_insn (dest, gen_rtx_PLUS (DImode, dest, GEN_INT (d2))); - if (d1) + if (d1 != 0) emit_move_insn (dest, gen_rtx_PLUS (DImode, dest, GEN_INT (d1))); } @@ -7834,7 +7834,7 @@ output_profile_hook (labelno) if (DEFAULT_ABI == ABI_AIX) { char buf[30]; - char *label_name; + const char *label_name; rtx fun; labelno += 1; diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 5cb537d1b86..34781f573f7 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -2804,7 +2804,7 @@ [(set (match_operand:SI 0 "gpc_reg_operand" "=r") (match_operator:SI 3 "boolean_operator" [(not:SI (match_operand:SI 1 "gpc_reg_operand" "r")) - (match_operand:SI 2 "logical_operand" "r")]))] + (match_operand:SI 2 "gpc_reg_operand" "r")]))] "" "%q3 %0,%2,%1") @@ -2870,7 +2870,7 @@ [(set (match_operand:SI 0 "gpc_reg_operand" "=r") (match_operator:SI 3 "boolean_operator" [(not:SI (match_operand:SI 1 "gpc_reg_operand" "r")) - (not:SI (match_operand:SI 2 "logical_operand" "r"))]))] + (not:SI (match_operand:SI 2 "gpc_reg_operand" "r"))]))] "" "%q3 %0,%1,%2") @@ -7129,7 +7129,7 @@ [(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_operator:DI 3 "boolean_operator" [(not:DI (match_operand:DI 1 "gpc_reg_operand" "r")) - (match_operand:DI 2 "logical_operand" "r")]))] + (match_operand:DI 2 "gpc_reg_operand" "r")]))] "TARGET_POWERPC64" "%q3 %0,%2,%1") @@ -7195,7 +7195,7 @@ [(set (match_operand:DI 0 "gpc_reg_operand" "=r") (match_operator:DI 3 "boolean_operator" [(not:DI (match_operand:DI 1 "gpc_reg_operand" "r")) - (not:DI (match_operand:DI 2 "logical_operand" "r"))]))] + (not:DI (match_operand:DI 2 "gpc_reg_operand" "r"))]))] "TARGET_POWERPC64" "%q3 %0,%1,%2")