machmode.h (GET_MODE_UNIT_PRECISION): New macro.
gcc/ * machmode.h (GET_MODE_UNIT_PRECISION): New macro. * simplify-rtx.c (simplify_truncation): New function, extracted from simplify_subreg and (in small part) from simplify_unary_operation_1. (simplify_unary_operation_1) <TRUNCATE>: Use it. Remove sign bit test for !TRULY_NOOP_TRUNCATION_MODES_P. (simplify_subreg): Use simplify_truncate for lowpart subregs where both the inner and outer modes are scalar integers. * config/mips/mips.c (mips_truncated_op_cost): New function. (mips_rtx_costs): Adjust test for BADDU. * config/mips/mips.md (*baddu_di<mode>): Push truncates to operands. From-SVN: r192186
This commit is contained in:
Richard Sandiford
Richard Sandiford
parent
ed901e4c61
commit
40c5ed5b5a
@ -1,3 +1,17 @@
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2012-10-07 Richard Sandiford <rdsandiford@googlemail.com>
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* machmode.h (GET_MODE_UNIT_PRECISION): New macro.
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* simplify-rtx.c (simplify_truncation): New function,
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extracted from simplify_subreg and (in small part) from
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simplify_unary_operation_1.
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(simplify_unary_operation_1) <TRUNCATE>: Use it. Remove sign bit
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test for !TRULY_NOOP_TRUNCATION_MODES_P.
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(simplify_subreg): Use simplify_truncate for lowpart subregs
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where both the inner and outer modes are scalar integers.
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* config/mips/mips.c (mips_truncated_op_cost): New function.
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(mips_rtx_costs): Adjust test for BADDU.
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* config/mips/mips.md (*baddu_di<mode>): Push truncates to operands.
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2012-10-07 Jan Hubicka <jh@suse.cz>
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* ipa-inline-analysis.c (do_estimate_edge_time): Return actual
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@ -3557,6 +3557,17 @@ mips_set_reg_reg_cost (enum machine_mode mode)
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}
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}
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/* Return the cost of an operand X that can be trucated for free.
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SPEED says whether we're optimizing for size or speed. */
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static int
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mips_truncated_op_cost (rtx x, bool speed)
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{
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if (GET_CODE (x) == TRUNCATE)
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x = XEXP (x, 0);
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return set_src_cost (x, speed);
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}
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/* Implement TARGET_RTX_COSTS. */
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static bool
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@ -3937,12 +3948,13 @@ mips_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED,
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case ZERO_EXTEND:
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if (outer_code == SET
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&& ISA_HAS_BADDU
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&& (GET_CODE (XEXP (x, 0)) == TRUNCATE
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|| GET_CODE (XEXP (x, 0)) == SUBREG)
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&& GET_MODE (XEXP (x, 0)) == QImode
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&& GET_CODE (XEXP (XEXP (x, 0), 0)) == PLUS)
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&& GET_CODE (XEXP (x, 0)) == PLUS)
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{
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*total = set_src_cost (XEXP (XEXP (x, 0), 0), speed);
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rtx plus = XEXP (x, 0);
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*total = (COSTS_N_INSNS (1)
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+ mips_truncated_op_cost (XEXP (plus, 0), speed)
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+ mips_truncated_op_cost (XEXP (plus, 1), speed));
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return true;
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}
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*total = mips_zero_extend_cost (mode, XEXP (x, 0));
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@ -1306,9 +1306,8 @@
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(define_insn "*baddu_di<mode>"
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[(set (match_operand:GPR 0 "register_operand" "=d")
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(zero_extend:GPR
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(truncate:QI
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(plus:DI (match_operand:DI 1 "register_operand" "d")
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(match_operand:DI 2 "register_operand" "d")))))]
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(plus:QI (truncate:QI (match_operand:DI 1 "register_operand" "d"))
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(truncate:QI (match_operand:DI 2 "register_operand" "d")))))]
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"ISA_HAS_BADDU && TARGET_64BIT"
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"baddu\\t%0,%1,%2"
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[(set_attr "alu_type" "add")])
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@ -217,6 +217,11 @@ extern const unsigned char mode_inner[NUM_MACHINE_MODES];
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#define GET_MODE_UNIT_BITSIZE(MODE) \
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((unsigned short) (GET_MODE_UNIT_SIZE (MODE) * BITS_PER_UNIT))
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#define GET_MODE_UNIT_PRECISION(MODE) \
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(GET_MODE_INNER (MODE) == VOIDmode \
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? GET_MODE_PRECISION (MODE) \
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: GET_MODE_PRECISION (GET_MODE_INNER (MODE)))
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/* Get the number of units in the object. */
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extern const unsigned char mode_nunits[NUM_MACHINE_MODES];
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@ -564,6 +564,212 @@ simplify_replace_rtx (rtx x, const_rtx old_rtx, rtx new_rtx)
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return simplify_replace_fn_rtx (x, old_rtx, 0, new_rtx);
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}
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/* Try to simplify a MODE truncation of OP, which has OP_MODE.
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Only handle cases where the truncated value is inherently an rvalue.
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RTL provides two ways of truncating a value:
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1. a lowpart subreg. This form is only a truncation when both
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the outer and inner modes (here MODE and OP_MODE respectively)
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are scalar integers, and only then when the subreg is used as
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an rvalue.
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It is only valid to form such truncating subregs if the
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truncation requires no action by the target. The onus for
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proving this is on the creator of the subreg -- e.g. the
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caller to simplify_subreg or simplify_gen_subreg -- and typically
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involves either TRULY_NOOP_TRUNCATION_MODES_P or truncated_to_mode.
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2. a TRUNCATE. This form handles both scalar and compound integers.
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The first form is preferred where valid. However, the TRUNCATE
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handling in simplify_unary_operation turns the second form into the
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first form when TRULY_NOOP_TRUNCATION_MODES_P or truncated_to_mode allow,
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so it is generally safe to form rvalue truncations using:
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simplify_gen_unary (TRUNCATE, ...)
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and leave simplify_unary_operation to work out which representation
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should be used.
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Because of the proof requirements on (1), simplify_truncation must
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also use simplify_gen_unary (TRUNCATE, ...) to truncate parts of OP,
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regardless of whether the outer truncation came from a SUBREG or a
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TRUNCATE. For example, if the caller has proven that an SImode
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truncation of:
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(and:DI X Y)
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is a no-op and can be represented as a subreg, it does not follow
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that SImode truncations of X and Y are also no-ops. On a target
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like 64-bit MIPS that requires SImode values to be stored in
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sign-extended form, an SImode truncation of:
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(and:DI (reg:DI X) (const_int 63))
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is trivially a no-op because only the lower 6 bits can be set.
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However, X is still an arbitrary 64-bit number and so we cannot
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assume that truncating it too is a no-op. */
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static rtx
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simplify_truncation (enum machine_mode mode, rtx op,
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enum machine_mode op_mode)
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{
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unsigned int precision = GET_MODE_UNIT_PRECISION (mode);
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unsigned int op_precision = GET_MODE_UNIT_PRECISION (op_mode);
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gcc_assert (precision <= op_precision);
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/* Optimize truncations of zero and sign extended values. */
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if (GET_CODE (op) == ZERO_EXTEND
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|| GET_CODE (op) == SIGN_EXTEND)
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{
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/* There are three possibilities. If MODE is the same as the
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origmode, we can omit both the extension and the subreg.
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If MODE is not larger than the origmode, we can apply the
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truncation without the extension. Finally, if the outermode
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is larger than the origmode, we can just extend to the appropriate
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mode. */
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enum machine_mode origmode = GET_MODE (XEXP (op, 0));
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if (mode == origmode)
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return XEXP (op, 0);
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else if (precision <= GET_MODE_UNIT_PRECISION (origmode))
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return simplify_gen_unary (TRUNCATE, mode,
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XEXP (op, 0), origmode);
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else
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return simplify_gen_unary (GET_CODE (op), mode,
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XEXP (op, 0), origmode);
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}
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/* Simplify (truncate:SI (op:DI (x:DI) (y:DI)))
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to (op:SI (truncate:SI (x:DI)) (truncate:SI (x:DI))). */
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if (GET_CODE (op) == PLUS
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|| GET_CODE (op) == MINUS
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|| GET_CODE (op) == MULT)
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{
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rtx op0 = simplify_gen_unary (TRUNCATE, mode, XEXP (op, 0), op_mode);
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if (op0)
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{
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rtx op1 = simplify_gen_unary (TRUNCATE, mode, XEXP (op, 1), op_mode);
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if (op1)
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return simplify_gen_binary (GET_CODE (op), mode, op0, op1);
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}
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}
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/* Simplify (truncate:QI (lshiftrt:SI (sign_extend:SI (x:QI)) C)) into
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to (ashiftrt:QI (x:QI) C), where C is a suitable small constant and
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the outer subreg is effectively a truncation to the original mode. */
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if ((GET_CODE (op) == LSHIFTRT
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|| GET_CODE (op) == ASHIFTRT)
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/* Ensure that OP_MODE is at least twice as wide as MODE
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to avoid the possibility that an outer LSHIFTRT shifts by more
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than the sign extension's sign_bit_copies and introduces zeros
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into the high bits of the result. */
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&& 2 * precision <= op_precision
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&& CONST_INT_P (XEXP (op, 1))
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&& GET_CODE (XEXP (op, 0)) == SIGN_EXTEND
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&& GET_MODE (XEXP (XEXP (op, 0), 0)) == mode
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&& INTVAL (XEXP (op, 1)) < precision)
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return simplify_gen_binary (ASHIFTRT, mode,
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XEXP (XEXP (op, 0), 0), XEXP (op, 1));
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/* Likewise (truncate:QI (lshiftrt:SI (zero_extend:SI (x:QI)) C)) into
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to (lshiftrt:QI (x:QI) C), where C is a suitable small constant and
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the outer subreg is effectively a truncation to the original mode. */
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if ((GET_CODE (op) == LSHIFTRT
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|| GET_CODE (op) == ASHIFTRT)
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&& CONST_INT_P (XEXP (op, 1))
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&& GET_CODE (XEXP (op, 0)) == ZERO_EXTEND
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&& GET_MODE (XEXP (XEXP (op, 0), 0)) == mode
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&& INTVAL (XEXP (op, 1)) < precision)
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return simplify_gen_binary (LSHIFTRT, mode,
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XEXP (XEXP (op, 0), 0), XEXP (op, 1));
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/* Likewise (truncate:QI (ashift:SI (zero_extend:SI (x:QI)) C)) into
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to (ashift:QI (x:QI) C), where C is a suitable small constant and
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the outer subreg is effectively a truncation to the original mode. */
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if (GET_CODE (op) == ASHIFT
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&& CONST_INT_P (XEXP (op, 1))
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&& (GET_CODE (XEXP (op, 0)) == ZERO_EXTEND
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|| GET_CODE (XEXP (op, 0)) == SIGN_EXTEND)
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&& GET_MODE (XEXP (XEXP (op, 0), 0)) == mode
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&& INTVAL (XEXP (op, 1)) < precision)
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return simplify_gen_binary (ASHIFT, mode,
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XEXP (XEXP (op, 0), 0), XEXP (op, 1));
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/* Recognize a word extraction from a multi-word subreg. */
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if ((GET_CODE (op) == LSHIFTRT
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|| GET_CODE (op) == ASHIFTRT)
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&& SCALAR_INT_MODE_P (mode)
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&& SCALAR_INT_MODE_P (op_mode)
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&& precision >= BITS_PER_WORD
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&& 2 * precision <= op_precision
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&& CONST_INT_P (XEXP (op, 1))
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&& (INTVAL (XEXP (op, 1)) & (precision - 1)) == 0
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&& INTVAL (XEXP (op, 1)) >= 0
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&& INTVAL (XEXP (op, 1)) < op_precision)
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{
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int byte = subreg_lowpart_offset (mode, op_mode);
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int shifted_bytes = INTVAL (XEXP (op, 1)) / BITS_PER_UNIT;
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return simplify_gen_subreg (mode, XEXP (op, 0), op_mode,
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(WORDS_BIG_ENDIAN
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? byte - shifted_bytes
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: byte + shifted_bytes));
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}
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/* If we have a TRUNCATE of a right shift of MEM, make a new MEM
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and try replacing the TRUNCATE and shift with it. Don't do this
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if the MEM has a mode-dependent address. */
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if ((GET_CODE (op) == LSHIFTRT
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|| GET_CODE (op) == ASHIFTRT)
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&& SCALAR_INT_MODE_P (op_mode)
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&& MEM_P (XEXP (op, 0))
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&& CONST_INT_P (XEXP (op, 1))
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&& (INTVAL (XEXP (op, 1)) % GET_MODE_BITSIZE (mode)) == 0
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&& INTVAL (XEXP (op, 1)) > 0
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&& INTVAL (XEXP (op, 1)) < GET_MODE_BITSIZE (op_mode)
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&& ! mode_dependent_address_p (XEXP (XEXP (op, 0), 0),
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MEM_ADDR_SPACE (XEXP (op, 0)))
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&& ! MEM_VOLATILE_P (XEXP (op, 0))
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&& (GET_MODE_SIZE (mode) >= UNITS_PER_WORD
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|| WORDS_BIG_ENDIAN == BYTES_BIG_ENDIAN))
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{
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int byte = subreg_lowpart_offset (mode, op_mode);
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int shifted_bytes = INTVAL (XEXP (op, 1)) / BITS_PER_UNIT;
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return adjust_address_nv (XEXP (op, 0), mode,
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(WORDS_BIG_ENDIAN
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? byte - shifted_bytes
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: byte + shifted_bytes));
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}
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/* (truncate:SI (OP:DI ({sign,zero}_extend:DI foo:SI))) is
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(OP:SI foo:SI) if OP is NEG or ABS. */
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if ((GET_CODE (op) == ABS
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|| GET_CODE (op) == NEG)
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&& (GET_CODE (XEXP (op, 0)) == SIGN_EXTEND
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|| GET_CODE (XEXP (op, 0)) == ZERO_EXTEND)
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&& GET_MODE (XEXP (XEXP (op, 0), 0)) == mode)
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return simplify_gen_unary (GET_CODE (op), mode,
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XEXP (XEXP (op, 0), 0), mode);
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/* (truncate:A (subreg:B (truncate:C X) 0)) is
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(truncate:A X). */
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if (GET_CODE (op) == SUBREG
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&& SCALAR_INT_MODE_P (mode)
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&& SCALAR_INT_MODE_P (op_mode)
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&& SCALAR_INT_MODE_P (GET_MODE (SUBREG_REG (op)))
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&& GET_CODE (SUBREG_REG (op)) == TRUNCATE
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&& subreg_lowpart_p (op))
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return simplify_gen_unary (TRUNCATE, mode, XEXP (SUBREG_REG (op), 0),
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GET_MODE (XEXP (SUBREG_REG (op), 0)));
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/* (truncate:A (truncate:B X)) is (truncate:A X). */
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if (GET_CODE (op) == TRUNCATE)
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return simplify_gen_unary (TRUNCATE, mode, XEXP (op, 0),
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GET_MODE (XEXP (op, 0)));
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return NULL_RTX;
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}
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/* Try to simplify a unary operation CODE whose output mode is to be
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MODE with input operand OP whose mode was originally OP_MODE.
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Return zero if no simplification can be made. */
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@ -815,50 +1021,34 @@ simplify_unary_operation_1 (enum rtx_code code, enum machine_mode mode, rtx op)
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break;
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case TRUNCATE:
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/* We can't handle truncation to a partial integer mode here
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because we don't know the real bitsize of the partial
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integer mode. */
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/* Don't optimize (lshiftrt (mult ...)) as it would interfere
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with the umulXi3_highpart patterns. */
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if (GET_CODE (op) == LSHIFTRT
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&& GET_CODE (XEXP (op, 0)) == MULT)
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break;
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if (GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
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break;
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{
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if (TRULY_NOOP_TRUNCATION_MODES_P (mode, GET_MODE (op)))
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return rtl_hooks.gen_lowpart_no_emit (mode, op);
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/* We can't handle truncation to a partial integer mode here
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because we don't know the real bitsize of the partial
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integer mode. */
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break;
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}
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/* (truncate:SI ({sign,zero}_extend:DI foo:SI)) == foo:SI. */
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if ((GET_CODE (op) == SIGN_EXTEND
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|| GET_CODE (op) == ZERO_EXTEND)
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&& GET_MODE (XEXP (op, 0)) == mode)
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return XEXP (op, 0);
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/* (truncate:SI (OP:DI ({sign,zero}_extend:DI foo:SI))) is
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(OP:SI foo:SI) if OP is NEG or ABS. */
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if ((GET_CODE (op) == ABS
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|| GET_CODE (op) == NEG)
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&& (GET_CODE (XEXP (op, 0)) == SIGN_EXTEND
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|| GET_CODE (XEXP (op, 0)) == ZERO_EXTEND)
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&& GET_MODE (XEXP (XEXP (op, 0), 0)) == mode)
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return simplify_gen_unary (GET_CODE (op), mode,
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XEXP (XEXP (op, 0), 0), mode);
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/* (truncate:A (subreg:B (truncate:C X) 0)) is
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(truncate:A X). */
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if (GET_CODE (op) == SUBREG
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&& GET_CODE (SUBREG_REG (op)) == TRUNCATE
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&& subreg_lowpart_p (op))
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return simplify_gen_unary (TRUNCATE, mode, XEXP (SUBREG_REG (op), 0),
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GET_MODE (XEXP (SUBREG_REG (op), 0)));
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if (GET_MODE (op) != VOIDmode)
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{
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temp = simplify_truncation (mode, op, GET_MODE (op));
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if (temp)
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return temp;
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}
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/* If we know that the value is already truncated, we can
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replace the TRUNCATE with a SUBREG. Note that this is also
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valid if TRULY_NOOP_TRUNCATION is false for the corresponding
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modes we just have to apply a different definition for
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truncation. But don't do this for an (LSHIFTRT (MULT ...))
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since this will cause problems with the umulXi3_highpart
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patterns. */
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if ((TRULY_NOOP_TRUNCATION_MODES_P (mode, GET_MODE (op))
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? (num_sign_bit_copies (op, GET_MODE (op))
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> (unsigned int) (GET_MODE_PRECISION (GET_MODE (op))
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- GET_MODE_PRECISION (mode)))
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: truncated_to_mode (mode, op))
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&& ! (GET_CODE (op) == LSHIFTRT
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&& GET_CODE (XEXP (op, 0)) == MULT))
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replace the TRUNCATE with a SUBREG. */
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if (GET_MODE_NUNITS (mode) == 1
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&& (TRULY_NOOP_TRUNCATION_MODES_P (mode, GET_MODE (op))
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|| truncated_to_mode (mode, op)))
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return rtl_hooks.gen_lowpart_no_emit (mode, op);
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/* A truncate of a comparison can be replaced with a subreg if
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@ -5596,14 +5786,6 @@ simplify_subreg (enum machine_mode outermode, rtx op,
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return NULL_RTX;
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}
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/* Merge implicit and explicit truncations. */
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|
||||
if (GET_CODE (op) == TRUNCATE
|
||||
&& GET_MODE_SIZE (outermode) < GET_MODE_SIZE (innermode)
|
||||
&& subreg_lowpart_offset (outermode, innermode) == byte)
|
||||
return simplify_gen_unary (TRUNCATE, outermode, XEXP (op, 0),
|
||||
GET_MODE (XEXP (op, 0)));
|
||||
|
||||
/* SUBREG of a hard register => just change the register number
|
||||
and/or mode. If the hard register is not valid in that mode,
|
||||
suppress this simplification. If the hard register is the stack,
|
||||
@ -5689,160 +5871,23 @@ simplify_subreg (enum machine_mode outermode, rtx op,
|
||||
return NULL_RTX;
|
||||
}
|
||||
|
||||
/* Optimize SUBREG truncations of zero and sign extended values. */
|
||||
if ((GET_CODE (op) == ZERO_EXTEND
|
||||
|| GET_CODE (op) == SIGN_EXTEND)
|
||||
&& SCALAR_INT_MODE_P (innermode)
|
||||
&& GET_MODE_PRECISION (outermode) < GET_MODE_PRECISION (innermode))
|
||||
/* A SUBREG resulting from a zero extension may fold to zero if
|
||||
it extracts higher bits that the ZERO_EXTEND's source bits. */
|
||||
if (GET_CODE (op) == ZERO_EXTEND)
|
||||
{
|
||||
unsigned int bitpos = subreg_lsb_1 (outermode, innermode, byte);
|
||||
|
||||
/* If we're requesting the lowpart of a zero or sign extension,
|
||||
there are three possibilities. If the outermode is the same
|
||||
as the origmode, we can omit both the extension and the subreg.
|
||||
If the outermode is not larger than the origmode, we can apply
|
||||
the truncation without the extension. Finally, if the outermode
|
||||
is larger than the origmode, but both are integer modes, we
|
||||
can just extend to the appropriate mode. */
|
||||
if (bitpos == 0)
|
||||
{
|
||||
enum machine_mode origmode = GET_MODE (XEXP (op, 0));
|
||||
if (outermode == origmode)
|
||||
return XEXP (op, 0);
|
||||
if (GET_MODE_PRECISION (outermode) <= GET_MODE_PRECISION (origmode))
|
||||
return simplify_gen_subreg (outermode, XEXP (op, 0), origmode,
|
||||
subreg_lowpart_offset (outermode,
|
||||
origmode));
|
||||
if (SCALAR_INT_MODE_P (outermode))
|
||||
return simplify_gen_unary (GET_CODE (op), outermode,
|
||||
XEXP (op, 0), origmode);
|
||||
}
|
||||
|
||||
/* A SUBREG resulting from a zero extension may fold to zero if
|
||||
it extracts higher bits that the ZERO_EXTEND's source bits. */
|
||||
if (GET_CODE (op) == ZERO_EXTEND
|
||||
&& bitpos >= GET_MODE_PRECISION (GET_MODE (XEXP (op, 0))))
|
||||
if (bitpos >= GET_MODE_PRECISION (GET_MODE (XEXP (op, 0))))
|
||||
return CONST0_RTX (outermode);
|
||||
}
|
||||
|
||||
/* Simplify (subreg:SI (op:DI ((x:DI) (y:DI)), 0)
|
||||
to (op:SI (subreg:SI (x:DI) 0) (subreg:SI (x:DI) 0)), where
|
||||
the outer subreg is effectively a truncation to the original mode. */
|
||||
if ((GET_CODE (op) == PLUS
|
||||
|| GET_CODE (op) == MINUS
|
||||
|| GET_CODE (op) == MULT)
|
||||
&& SCALAR_INT_MODE_P (outermode)
|
||||
if (SCALAR_INT_MODE_P (outermode)
|
||||
&& SCALAR_INT_MODE_P (innermode)
|
||||
&& GET_MODE_PRECISION (outermode) < GET_MODE_PRECISION (innermode)
|
||||
&& byte == subreg_lowpart_offset (outermode, innermode))
|
||||
{
|
||||
rtx op0 = simplify_gen_subreg (outermode, XEXP (op, 0),
|
||||
innermode, byte);
|
||||
if (op0)
|
||||
{
|
||||
rtx op1 = simplify_gen_subreg (outermode, XEXP (op, 1),
|
||||
innermode, byte);
|
||||
if (op1)
|
||||
return simplify_gen_binary (GET_CODE (op), outermode, op0, op1);
|
||||
}
|
||||
}
|
||||
|
||||
/* Simplify (subreg:QI (lshiftrt:SI (sign_extend:SI (x:QI)) C), 0) into
|
||||
to (ashiftrt:QI (x:QI) C), where C is a suitable small constant and
|
||||
the outer subreg is effectively a truncation to the original mode. */
|
||||
if ((GET_CODE (op) == LSHIFTRT
|
||||
|| GET_CODE (op) == ASHIFTRT)
|
||||
&& SCALAR_INT_MODE_P (outermode)
|
||||
&& SCALAR_INT_MODE_P (innermode)
|
||||
/* Ensure that OUTERMODE is at least twice as wide as the INNERMODE
|
||||
to avoid the possibility that an outer LSHIFTRT shifts by more
|
||||
than the sign extension's sign_bit_copies and introduces zeros
|
||||
into the high bits of the result. */
|
||||
&& (2 * GET_MODE_PRECISION (outermode)) <= GET_MODE_PRECISION (innermode)
|
||||
&& CONST_INT_P (XEXP (op, 1))
|
||||
&& GET_CODE (XEXP (op, 0)) == SIGN_EXTEND
|
||||
&& GET_MODE (XEXP (XEXP (op, 0), 0)) == outermode
|
||||
&& INTVAL (XEXP (op, 1)) < GET_MODE_PRECISION (outermode)
|
||||
&& subreg_lsb_1 (outermode, innermode, byte) == 0)
|
||||
return simplify_gen_binary (ASHIFTRT, outermode,
|
||||
XEXP (XEXP (op, 0), 0), XEXP (op, 1));
|
||||
|
||||
/* Likewise (subreg:QI (lshiftrt:SI (zero_extend:SI (x:QI)) C), 0) into
|
||||
to (lshiftrt:QI (x:QI) C), where C is a suitable small constant and
|
||||
the outer subreg is effectively a truncation to the original mode. */
|
||||
if ((GET_CODE (op) == LSHIFTRT
|
||||
|| GET_CODE (op) == ASHIFTRT)
|
||||
&& SCALAR_INT_MODE_P (outermode)
|
||||
&& SCALAR_INT_MODE_P (innermode)
|
||||
&& GET_MODE_PRECISION (outermode) < GET_MODE_PRECISION (innermode)
|
||||
&& CONST_INT_P (XEXP (op, 1))
|
||||
&& GET_CODE (XEXP (op, 0)) == ZERO_EXTEND
|
||||
&& GET_MODE (XEXP (XEXP (op, 0), 0)) == outermode
|
||||
&& INTVAL (XEXP (op, 1)) < GET_MODE_PRECISION (outermode)
|
||||
&& subreg_lsb_1 (outermode, innermode, byte) == 0)
|
||||
return simplify_gen_binary (LSHIFTRT, outermode,
|
||||
XEXP (XEXP (op, 0), 0), XEXP (op, 1));
|
||||
|
||||
/* Likewise (subreg:QI (ashift:SI (zero_extend:SI (x:QI)) C), 0) into
|
||||
to (ashift:QI (x:QI) C), where C is a suitable small constant and
|
||||
the outer subreg is effectively a truncation to the original mode. */
|
||||
if (GET_CODE (op) == ASHIFT
|
||||
&& SCALAR_INT_MODE_P (outermode)
|
||||
&& SCALAR_INT_MODE_P (innermode)
|
||||
&& GET_MODE_PRECISION (outermode) < GET_MODE_PRECISION (innermode)
|
||||
&& CONST_INT_P (XEXP (op, 1))
|
||||
&& (GET_CODE (XEXP (op, 0)) == ZERO_EXTEND
|
||||
|| GET_CODE (XEXP (op, 0)) == SIGN_EXTEND)
|
||||
&& GET_MODE (XEXP (XEXP (op, 0), 0)) == outermode
|
||||
&& INTVAL (XEXP (op, 1)) < GET_MODE_PRECISION (outermode)
|
||||
&& subreg_lsb_1 (outermode, innermode, byte) == 0)
|
||||
return simplify_gen_binary (ASHIFT, outermode,
|
||||
XEXP (XEXP (op, 0), 0), XEXP (op, 1));
|
||||
|
||||
/* Recognize a word extraction from a multi-word subreg. */
|
||||
if ((GET_CODE (op) == LSHIFTRT
|
||||
|| GET_CODE (op) == ASHIFTRT)
|
||||
&& SCALAR_INT_MODE_P (innermode)
|
||||
&& GET_MODE_PRECISION (outermode) >= BITS_PER_WORD
|
||||
&& GET_MODE_PRECISION (innermode) >= (2 * GET_MODE_PRECISION (outermode))
|
||||
&& CONST_INT_P (XEXP (op, 1))
|
||||
&& (INTVAL (XEXP (op, 1)) & (GET_MODE_PRECISION (outermode) - 1)) == 0
|
||||
&& INTVAL (XEXP (op, 1)) >= 0
|
||||
&& INTVAL (XEXP (op, 1)) < GET_MODE_PRECISION (innermode)
|
||||
&& byte == subreg_lowpart_offset (outermode, innermode))
|
||||
{
|
||||
int shifted_bytes = INTVAL (XEXP (op, 1)) / BITS_PER_UNIT;
|
||||
return simplify_gen_subreg (outermode, XEXP (op, 0), innermode,
|
||||
(WORDS_BIG_ENDIAN
|
||||
? byte - shifted_bytes
|
||||
: byte + shifted_bytes));
|
||||
}
|
||||
|
||||
/* If we have a lowpart SUBREG of a right shift of MEM, make a new MEM
|
||||
and try replacing the SUBREG and shift with it. Don't do this if
|
||||
the MEM has a mode-dependent address or if we would be widening it. */
|
||||
|
||||
if ((GET_CODE (op) == LSHIFTRT
|
||||
|| GET_CODE (op) == ASHIFTRT)
|
||||
&& SCALAR_INT_MODE_P (innermode)
|
||||
&& MEM_P (XEXP (op, 0))
|
||||
&& CONST_INT_P (XEXP (op, 1))
|
||||
&& GET_MODE_SIZE (outermode) < GET_MODE_SIZE (GET_MODE (op))
|
||||
&& (INTVAL (XEXP (op, 1)) % GET_MODE_BITSIZE (outermode)) == 0
|
||||
&& INTVAL (XEXP (op, 1)) > 0
|
||||
&& INTVAL (XEXP (op, 1)) < GET_MODE_BITSIZE (innermode)
|
||||
&& ! mode_dependent_address_p (XEXP (XEXP (op, 0), 0),
|
||||
MEM_ADDR_SPACE (XEXP (op, 0)))
|
||||
&& ! MEM_VOLATILE_P (XEXP (op, 0))
|
||||
&& byte == subreg_lowpart_offset (outermode, innermode)
|
||||
&& (GET_MODE_SIZE (outermode) >= UNITS_PER_WORD
|
||||
|| WORDS_BIG_ENDIAN == BYTES_BIG_ENDIAN))
|
||||
{
|
||||
int shifted_bytes = INTVAL (XEXP (op, 1)) / BITS_PER_UNIT;
|
||||
return adjust_address_nv (XEXP (op, 0), outermode,
|
||||
(WORDS_BIG_ENDIAN
|
||||
? byte - shifted_bytes
|
||||
: byte + shifted_bytes));
|
||||
rtx tem = simplify_truncation (outermode, op, innermode);
|
||||
if (tem)
|
||||
return tem;
|
||||
}
|
||||
|
||||
return NULL_RTX;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user