rs6000.md (fnmaddsf4_powerpc_1): Remove HONOR_SIGNED_ZEROS final condition.

2009-09-09  Segher Boessenkool  <segher@kernel.crashing.org>

        * config/rs6000/rs6000.md (fnmaddsf4_powerpc_1): Remove
        HONOR_SIGNED_ZEROS final condition.
        (fnmsubsf4_powerpc_1): Same.
        (fnmadddf4_fpr_1): Same.
        (fnmsubdf4_fpr_1): Same.

From-SVN: r154743
This commit is contained in:
Segher Boessenkool 2009-11-30 00:51:02 +01:00 committed by David Edelsohn
parent 489df541a7
commit 41557b0889
2 changed files with 12 additions and 4 deletions

View File

@ -1,3 +1,11 @@
2009-09-09 Segher Boessenkool <segher@kernel.crashing.org>
* config/rs6000/rs6000.md (fnmaddsf4_powerpc_1): Remove
HONOR_SIGNED_ZEROS final condition.
(fnmsubsf4_powerpc_1): Same.
(fnmadddf4_fpr_1): Same.
(fnmsubdf4_fpr_1): Same.
2009-11-29 Ira Rosen <irar@il.ibm.com>
PR tree-optimization/42193

View File

@ -5807,7 +5807,7 @@
(match_operand:SF 2 "gpc_reg_operand" "f"))
(match_operand:SF 3 "gpc_reg_operand" "f"))))]
"TARGET_POWERPC && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_FUSED_MADD
&& TARGET_SINGLE_FLOAT && HONOR_SIGNED_ZEROS (SFmode)"
&& TARGET_SINGLE_FLOAT"
"fnmadds %0,%1,%2,%3"
[(set_attr "type" "fp")
(set_attr "fp_type" "fp_maddsub_s")])
@ -5848,7 +5848,7 @@
(match_operand:SF 2 "gpc_reg_operand" "f"))
(match_operand:SF 3 "gpc_reg_operand" "f"))))]
"TARGET_POWERPC && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_FUSED_MADD
&& TARGET_SINGLE_FLOAT && HONOR_SIGNED_ZEROS (SFmode)"
&& TARGET_SINGLE_FLOAT"
"fnmsubs %0,%1,%2,%3"
[(set_attr "type" "fp")
(set_attr "fp_type" "fp_maddsub_s")])
@ -6251,7 +6251,7 @@
(match_operand:DF 2 "gpc_reg_operand" "d"))
(match_operand:DF 3 "gpc_reg_operand" "d"))))]
"TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_FUSED_MADD && TARGET_DOUBLE_FLOAT
&& HONOR_SIGNED_ZEROS (DFmode) && VECTOR_UNIT_NONE_P (DFmode)"
&& VECTOR_UNIT_NONE_P (DFmode)"
"{fnma|fnmadd} %0,%1,%2,%3"
[(set_attr "type" "dmul")
(set_attr "fp_type" "fp_maddsub_d")])
@ -6273,7 +6273,7 @@
(match_operand:DF 2 "gpc_reg_operand" "d"))
(match_operand:DF 3 "gpc_reg_operand" "d"))))]
"TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_FUSED_MADD && TARGET_DOUBLE_FLOAT
&& HONOR_SIGNED_ZEROS (DFmode) && VECTOR_UNIT_NONE_P (DFmode)"
&& VECTOR_UNIT_NONE_P (DFmode)"
"{fnms|fnmsub} %0,%1,%2,%3"
[(set_attr "type" "dmul")
(set_attr "fp_type" "fp_maddsub_d")])