OpenE2K/gcc
2
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

AVX-512. Add cvtps2 insn patterns.

Browse Source 
gcc/
	* config/i386/sse.md
	(define_insn
	"<sse2_avx_avx512f>_fix_notrunc<sf2simodelower><mode><mask_name>"):
	Add masking.
	(define_insn "fix_truncv8sfv8si2<mask_name>"): Ditto.
	(define_insn "fix_truncv4sfv4si2<mask_name>"): Ditto.


Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>

From-SVN: r215545
This commit is contained in:
Alexander Ivchenko 2014-09-24 08:06:30 +00:00 committed by Kirill Yukhin
parent 41755b527c
commit 415ebad0b3
2 changed files with 31 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
gcc/ChangeLog
View File

@ -1,3 +1,19 @@
2014-09-24 Alexander Ivchenko <alexander.ivchenko@intel.com>
Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Anna Tikhonova <anna.tikhonova@intel.com>
Ilya Tocar <ilya.tocar@intel.com>
Andrey Turetskiy <andrey.turetskiy@intel.com>
Ilya Verbin <ilya.verbin@intel.com>
Kirill Yukhin <kirill.yukhin@intel.com>
Michael Zolotukhin <michael.v.zolotukhin@intel.com>
* config/i386/sse.md
(define_insn
"<sse2_avx_avx512f>_fix_notrunc<sf2simodelower><mode><mask_name>"):
Add masking.
(define_insn "fix_truncv8sfv8si2<mask_name>"): Ditto.
(define_insn "fix_truncv4sfv4si2<mask_name>"): Ditto.
2014-09-24 Alexander Ivchenko <alexander.ivchenko@intel.com>
Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Anna Tikhonova <anna.tikhonova@intel.com>

30
gcc/config/i386/sse.md
View File

@ -3937,13 +3937,13 @@
(define_mode_attr sf2simodelower
[(V16SI "v16sf") (V8SI "v8sf") (V4SI "v4sf")])
(define_insn "<sse2_avx_avx512f>_fix_notrunc<sf2simodelower><mode>"
(define_insn "<sse2_avx_avx512f>_fix_notrunc<sf2simodelower><mode><mask_name>"
[(set (match_operand:VI4_AVX 0 "register_operand" "=v")
(unspec:VI4_AVX
[(match_operand:<ssePSmode> 1 "nonimmediate_operand" "vm")]
UNSPEC_FIX_NOTRUNC))]
"TARGET_SSE2"
"%vcvtps2dq\t{%1, %0|%0, %1}"
"TARGET_SSE2 && <mask_mode512bit_condition>"
"%vcvtps2dq\t{%1, %0<mask_operand2>|%0<mask_operand2>, %1}"
[(set_attr "type" "ssecvt")
(set (attr "prefix_data16")
(if_then_else
@ -4031,20 +4031,20 @@
(set_attr "prefix" "evex")
(set_attr "mode" "XI")])
(define_insn "fix_truncv8sfv8si2"
[(set (match_operand:V8SI 0 "register_operand" "=x")
(fix:V8SI (match_operand:V8SF 1 "nonimmediate_operand" "xm")))]
"TARGET_AVX"
"vcvttps2dq\t{%1, %0|%0, %1}"
(define_insn "fix_truncv8sfv8si2<mask_name>"
[(set (match_operand:V8SI 0 "register_operand" "=v")
(fix:V8SI (match_operand:V8SF 1 "nonimmediate_operand" "vm")))]
"TARGET_AVX && <mask_avx512vl_condition>"
"vcvttps2dq\t{%1, %0<mask_operand2>|%0<mask_operand2>, %1}"
[(set_attr "type" "ssecvt")
(set_attr "prefix" "vex")
(set_attr "prefix" "<mask_prefix>")
(set_attr "mode" "OI")])
(define_insn "fix_truncv4sfv4si2"
[(set (match_operand:V4SI 0 "register_operand" "=x")
(fix:V4SI (match_operand:V4SF 1 "nonimmediate_operand" "xm")))]
"TARGET_SSE2"
"%vcvttps2dq\t{%1, %0|%0, %1}"
(define_insn "fix_truncv4sfv4si2<mask_name>"
[(set (match_operand:V4SI 0 "register_operand" "=v")
(fix:V4SI (match_operand:V4SF 1 "nonimmediate_operand" "vm")))]
"TARGET_SSE2 && <mask_avx512vl_condition>"
"%vcvttps2dq\t{%1, %0<mask_operand2>|%0<mask_operand2>, %1}"
[(set_attr "type" "ssecvt")
(set (attr "prefix_rep")
(if_then_else
@ -4057,7 +4057,7 @@
(const_string "*")
(const_string "0")))
(set_attr "prefix_data16" "0")
(set_attr "prefix" "maybe_vex")
(set_attr "prefix" "<mask_prefix2>")
(set_attr "mode" "TI")])
(define_expand "fixuns_trunc<mode><sseintvecmodelower>2"