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s390.md: Added agen condition to operand forwarding bypasses.

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2009-10-20  Wolfgang Gellerich  <gellerich@de.ibm.com>

	* config/s390/s390.md: Added agen condition to operand
	forwarding bypasses. 
	Added bypass for early address generation use of int results.
	Updated comments.

From-SVN: r153006
This commit is contained in:
Wolfgang Gellerich 2009-10-20 08:16:23 +00:00 committed by Andreas Krebbel
parent bd62d832fb
commit 421b1e6b16
2 changed files with 26 additions and 15 deletions
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7
gcc/ChangeLog
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@ -1,3 +1,10 @@
2009-10-20 Wolfgang Gellerich <gellerich@de.ibm.com>
* config/s390/s390.md: Added agen condition to operand
forwarding bypasses.
Added bypass for early address generation use of int results.
Updated comments.
2009-10-20 Stefan Dösinger <stefan@codeweavers.com>
* config/i386/i386.c: Remove signal.h #include.

34
gcc/config/s390/2097.md
View File

@ -57,7 +57,8 @@
z10_int_fr_A3"
"z10_other_super, z10_other_super_c_E1, z10_other_super_E1, \
z10_int_super, z10_int_super_E1, \
z10_lr, z10_store_super")
z10_lr, z10_store_super"
" ! s390_agen_dep_p")
; Forwarding from z10_super to frz10_ and z10_rec.
@ -68,7 +69,8 @@
z10_store_super"
"z10_int_fr, z10_int_fr_E1, z10_int_fr_A3, \
z10_other_fr, z10_other_fr_A3, z10_lr_fr, z10_lr_fr_E1, \
z10_other_fr_E1, z10_store_rec")
z10_other_fr_E1, z10_store_rec"
" ! s390_agen_dep_p")
; Forwarding from z10_fwd and z10_fr to z10_rec and z10_fr.
@ -84,7 +86,8 @@
z10_int_fr_A3"
"z10_int_fr, z10_int_fr_E1, z10_int_fr_A3, \
z10_other_fr, z10_other_fr_A3, z10_lr_fr, z10_lr_fr_E1, \
z10_other_fr_E1, z10_store_rec")
z10_other_fr_E1, z10_store_rec"
" ! s390_agen_dep_p")
;
@ -205,15 +208,12 @@
(and (eq_attr "type" "lr")
(eq_attr "z10prop" "z10_fr")))
"z10_e1_ANY, z10_Gate_ANY")
; "z10_e1_ANY")
(define_insn_reservation "z10_lr_fr_E1" 6
(and (eq_attr "cpu" "z10")
(and (eq_attr "type" "lr")
(eq_attr "z10prop" "z10_fr_E1")))
"z10_e1_ANY, z10_Gate_ANY")
; "z10_e1_ANY")
(define_insn_reservation "z10_la" 6
(and (eq_attr "cpu" "z10")
@ -227,14 +227,12 @@
(and (eq_attr "type" "la")
(eq_attr "z10prop" "z10_fwd")))
"z10_e1_ANY, z10_Gate_ANY")
; "z10_e1_ANY")
(define_insn_reservation "z10_la_fwd_A1" 6
(and (eq_attr "cpu" "z10")
(and (eq_attr "type" "la")
(eq_attr "z10prop" "z10_fwd_A1")))
"z10_e1_ANY, z10_Gate_ANY")
; "z10_e1_ANY")
; larl-type instructions
@ -666,13 +664,14 @@
; Address-related bypasses
;
; Here is the cycle diagram for Address-related bypasses:
; Here is the cycle diagram for address-related bypasses:
; ... G1 G2 G3 A0 A1 A2 A3 E1 P1 P2 P3 R0 ...
; ^ ^ ^ ^ ^
; | | | | E1-type bypasses provide the new addr AFTER this cycle
; | | | A3-type bypasses provide the new addr AFTER this cycle
; | | A1-type bypasses provide the new addr AFTER this cycle
; | AGI resolution, actual USE of address is DURING this cycle
; ^ ^ ^ ^ ^ ^
; | | | | | without bypass, its available AFTER this cycle
; | | | | E1-type bypasses provide the new value AFTER this cycle
; | | | A3-type bypasses provide the new value AFTER this cycle
; | | A1-type bypasses provide the new value AFTER this cycle
; | AGI resolution, actual USE of new value is DURING this cycle
; AGI detection
(define_bypass 3 "z10_larl_A1, z10_la_fwd_A1, z10_other_fwd_A1, \
@ -682,7 +681,6 @@
z10_cs, z10_stm, z10_other"
"s390_agen_dep_p")
(define_bypass 5 "z10_larl_fwd_A3, z10_load_fwd_A3, z10_other_fwd_A3, \
z10_other_fr_A3, z10_int_fwd_A3, z10_int_fr_A3"
"z10_agen, z10_la, z10_branch, z10_call, z10_load, \
@ -699,6 +697,12 @@
z10_cs, z10_stm, z10_other"
"s390_agen_dep_p")
(define_bypass 9 "z10_int_super, z10_int_fwd, z10_int_fr"
"z10_agen, z10_la, z10_branch, z10_call, z10_load, \
z10_store, \
z10_cs, z10_stm, z10_other"
"s390_agen_dep_p")
;