i386.md (dummy_extendsfdf2): Support SSE2
* i386.md (dummy_extendsfdf2): Support SSE2 (extendsfdf2): Enable if 80387 or SSE2. (extendsfdf2_1): Support SSE2. Disable if SSE2 is avialble and no MIX_I387_SSE2 (extendsfdf2_1_sse_only): New pattern. (truncdfsf2): Enable if SSE2 or 80387; Always use SSE only version of SSE. (truncdfsf2_1): Support SSE. (truncdfsf2_2): Support SSE. (truncdfsf2_2_1_sse): New pattern. (fixtruncsfsi2): Always use SSE if available. (fix_truncsfsi_sse): New pattern. (fix_truncdfsi_sse): New pattern. (floatsis?f2): Support SSE. (floatsidf2_i387): New pattern. (floatsidf2_sse): Likewise. From-SVN: r39634
This commit is contained in:
parent
3b6bd11551
commit
42a0aa6ff6
@ -1,3 +1,22 @@
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Tue Feb 13 14:16:34 CET 2001 Jan Hubicka <jh@suse.cz>
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* i386.md (dummy_extendsfdf2): Support SSE2
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(extendsfdf2): Enable if 80387 or SSE2.
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(extendsfdf2_1): Support SSE2. Disable if SSE2 is avialble
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and no MIX_I387_SSE2
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(extendsfdf2_1_sse_only): New pattern.
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(truncdfsf2): Enable if SSE2 or 80387; Always use SSE only version
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of SSE.
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(truncdfsf2_1): Support SSE.
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(truncdfsf2_2): Support SSE.
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(truncdfsf2_2_1_sse): New pattern.
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(fixtruncsfsi2): Always use SSE if available.
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(fix_truncsfsi_sse): New pattern.
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(fix_truncdfsi_sse): New pattern.
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(floatsis?f2): Support SSE.
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(floatsidf2_i387): New pattern.
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(floatsidf2_sse): Likewise.
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Tue Feb 13 07:52:04 2001 Richard Kenner <kenner@vlsi1.ultra.nyu.edu>
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* configure.in: Use "have_gnat" variable, not "gnat".
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@ -3244,7 +3244,7 @@
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;; %%% Kill these when call knows how to work out a DFmode push earlier.
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(define_insn "*dummy_extendsfdf2"
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[(set (match_operand:DF 0 "push_operand" "=<")
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(float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "f")))]
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(float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "fY")))]
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"0"
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"#")
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@ -3310,7 +3310,7 @@
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(define_expand "extendsfdf2"
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[(set (match_operand:DF 0 "nonimmediate_operand" "")
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(float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "")))]
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"TARGET_80387"
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"TARGET_80387 || TARGET_SSE2"
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"
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{
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if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM)
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@ -3318,9 +3318,9 @@
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}")
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(define_insn "*extendsfdf2_1"
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[(set (match_operand:DF 0 "nonimmediate_operand" "=f,m")
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(float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "fm,f")))]
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"TARGET_80387
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[(set (match_operand:DF 0 "nonimmediate_operand" "=f#Y,mf#Y,Y#f,Ym#f")
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(float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "fm#Y,f#Y,mY#f,Y#f")))]
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"(TARGET_80387 || TARGET_SSE2)
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&& (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
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"*
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{
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@ -3341,13 +3341,25 @@
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else
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return \"fst%z0\\t%y0\";
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case 2:
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case 3:
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return \"cvtss2sd\\t{%1, %0|%0, %1}\";
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default:
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abort ();
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}
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}"
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[(set_attr "type" "fmov")
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(set_attr "mode" "SF,XF")])
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[(set_attr "type" "fmov,fmov,sse,sse")
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(set_attr "mode" "SF,XF,DF,DF")])
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(define_insn "*extendsfdf2_1_sse_only"
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[(set (match_operand:DF 0 "register_operand" "=Y")
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(float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "mY")))]
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"!TARGET_80387 && TARGET_SSE2
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&& (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
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"cvtss2sd\\t{%1, %0|%0, %1}"
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[(set_attr "type" "sse")
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(set_attr "mode" "DF")])
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(define_expand "extendsfxf2"
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[(set (match_operand:XF 0 "nonimmediate_operand" "")
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@ -3532,15 +3544,23 @@
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(float_truncate:SF
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(match_operand:DF 1 "register_operand" "")))
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(clobber (match_dup 2))])]
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"TARGET_80387"
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"operands[2] = assign_386_stack_local (SFmode, 0);")
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"TARGET_80387 || TARGET_SSE2"
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"
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if (TARGET_80387)
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operands[2] = assign_386_stack_local (SFmode, 0);
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else
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{
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emit_insn (gen_truncdfsf2_sse_only (operands[0], operands[1]));
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DONE;
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}
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")
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(define_insn "*truncdfsf2_1"
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[(set (match_operand:SF 0 "nonimmediate_operand" "=m,f")
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[(set (match_operand:SF 0 "nonimmediate_operand" "=m,?f")
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(float_truncate:SF
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(match_operand:DF 1 "register_operand" "f,0")))
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(clobber (match_operand:SF 2 "memory_operand" "=m,m"))]
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"TARGET_80387"
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(clobber (match_operand:SF 2 "memory_operand" "=X,m"))]
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"TARGET_80387 && !TARGET_SSE2"
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"*
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{
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switch (which_alternative)
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@ -3556,10 +3576,58 @@
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abort ();
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}"
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[(set_attr "type" "fmov,multi")
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(set_attr "mode" "SF")])
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(set_attr "mode" "SF,SF")])
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(define_insn "*truncdfsf2_1_sse"
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[(set (match_operand:SF 0 "nonimmediate_operand" "=m,?f,Y")
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(float_truncate:SF
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(match_operand:DF 1 "nonimmediate_operand" "f,0,mY")))
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(clobber (match_operand:SF 2 "memory_operand" "=X,m,X"))]
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"TARGET_80387 && TARGET_SSE2"
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"*
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{
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switch (which_alternative)
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{
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case 0:
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if (find_regno_note (insn, REG_DEAD, REGNO (operands[1])))
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return \"fstp%z0\\t%y0\";
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else
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return \"fst%z0\\t%y0\";
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case 1:
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return \"fstp%z2\\t%y2\;fld%z2\\t%y2\";
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case 2:
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case 3:
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return \"cvtsd2ss\\t{%1, %0|%0, %1}\";
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}
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abort ();
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}"
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[(set_attr "type" "fmov,multi,sse")
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(set_attr "mode" "SF,SF,DF")])
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(define_insn "*truncdfsf2_2"
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[(set (match_operand:SF 0 "memory_operand" "=m")
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[(set (match_operand:SF 0 "nonimmediate_operand" "=m,Y")
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(float_truncate:SF
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(match_operand:DF 1 "nonimmediate_operand" "f,mY")))]
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"TARGET_80387 && TARGET_SSE2"
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"*
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{
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switch (which_alternative)
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{
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case 0:
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if (find_regno_note (insn, REG_DEAD, REGNO (operands[1])))
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return \"fstp%z0\\t%y0\";
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else
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return \"fst%z0\\t%y0\";
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case 1:
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case 2:
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return \"cvtsd2ss\\t{%1, %0|%0, %1}\";
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}
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}"
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[(set_attr "type" "fmov,sse")
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(set_attr "mode" "SF,DF")])
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(define_insn "truncdfsf2_3"
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[(set (match_operand:SF 0 "nonimmediate_operand" "=m")
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(float_truncate:SF
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(match_operand:DF 1 "register_operand" "f")))]
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"TARGET_80387"
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@ -3573,6 +3641,15 @@
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[(set_attr "type" "fmov")
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(set_attr "mode" "SF")])
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(define_insn "truncdfsf2_sse_only"
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[(set (match_operand:SF 0 "register_operand" "=Y")
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(float_truncate:SF
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(match_operand:DF 1 "nonimmediate_operand" "mY")))]
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"!TARGET_80387 && TARGET_SSE2"
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"cvtsd2ss\\t{%1, %0|%0, %1}"
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[(set_attr "type" "sse")
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(set_attr "mode" "DF")])
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(define_split
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[(set (match_operand:SF 0 "memory_operand" "")
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(float_truncate:SF
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@ -3582,12 +3659,22 @@
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[(set (match_dup 0) (float_truncate:SF (match_dup 1)))]
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"")
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(define_split
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[(set (match_operand:SF 0 "nonimmediate_operand" "")
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(float_truncate:SF
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(match_operand:DF 1 "nonimmediate_operand" "")))
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(clobber (match_operand 2 "" ""))]
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"TARGET_80387 && !FP_REG_P (operands[0]) && !FP_REG_P (operands[1])"
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[(set (match_dup 0) (float_truncate:SF (match_dup 1)))]
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"")
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(define_split
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[(set (match_operand:SF 0 "register_operand" "")
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(float_truncate:SF
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(match_operand:DF 1 "register_operand" "")))
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(clobber (match_operand:SF 2 "memory_operand" ""))]
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"TARGET_80387 && reload_completed"
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"TARGET_80387 && reload_completed
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&& FP_REG_P (operands[0])"
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[(set (match_dup 2) (float_truncate:SF (match_dup 1)))
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(set (match_dup 0) (match_dup 2))]
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"")
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@ -3957,9 +4044,20 @@
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(clobber (match_dup 2))
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(clobber (match_dup 3))
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(clobber (match_scratch:SI 4 ""))])]
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"TARGET_80387"
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"operands[2] = assign_386_stack_local (SImode, 0);
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operands[3] = assign_386_stack_local (SImode, 1);")
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"TARGET_80387 || TARGET_SSE2"
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"
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{
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if (TARGET_SSE2)
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{
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emit_insn (gen_fix_truncdfsi_sse (operands[0], operands[1]));
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DONE;
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}
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else
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{
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operands[2] = assign_386_stack_local (SImode, 0);
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operands[3] = assign_386_stack_local (SImode, 1);
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}
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}")
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(define_expand "fix_truncsfsi2"
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[(parallel [(set (match_operand:SI 0 "nonimmediate_operand" "")
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@ -3967,9 +4065,20 @@
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(clobber (match_dup 2))
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(clobber (match_dup 3))
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(clobber (match_scratch:SI 4 ""))])]
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"TARGET_80387"
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"operands[2] = assign_386_stack_local (SImode, 0);
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operands[3] = assign_386_stack_local (SImode, 1);")
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"TARGET_80387 || TARGET_SSE"
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"
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{
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if (TARGET_SSE2)
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{
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emit_insn (gen_fix_truncsfsi_sse (operands[0], operands[1]));
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DONE;
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}
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else
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{
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operands[2] = assign_386_stack_local (SImode, 0);
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operands[3] = assign_386_stack_local (SImode, 1);
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}
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}")
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(define_insn "*fix_truncsi_1"
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[(set (match_operand:SI 0 "nonimmediate_operand" "=m,?r")
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@ -3977,10 +4086,26 @@
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(clobber (match_operand:SI 2 "memory_operand" "=o,o"))
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(clobber (match_operand:SI 3 "memory_operand" "=m,m"))
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(clobber (match_scratch:SI 4 "=&r,r"))]
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"TARGET_80387 && FLOAT_MODE_P (GET_MODE (operands[1]))"
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"TARGET_80387 && FLOAT_MODE_P (GET_MODE (operands[1]))
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&& (!TARGET_SSE2 || !SSE_FLOAT_MODE_P (GET_MODE (operands[1])))"
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"* return output_fix_trunc (insn, operands);"
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[(set_attr "type" "multi")])
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;; When SSE available, it is always faster to use it!
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(define_insn "fix_truncsfsi_sse"
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[(set (match_operand:SI 0 "register_operand" "=r")
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(fix:SI (match_operand:SF 1 "nonimmediate_operand" "xm")))]
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"TARGET_SSE"
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"cvttss2si\\t{%1, %0|%0, %1}"
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[(set_attr "type" "sse")])
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(define_insn "fix_truncdfsi_sse"
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[(set (match_operand:SI 0 "register_operand" "=r")
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(fix:SI (match_operand:DF 1 "nonimmediate_operand" "Ym")))]
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"TARGET_SSE2"
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"cvttsd2si\\t{%1, %0|%0, %1}"
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[(set_attr "type" "sse")])
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(define_split
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[(set (match_operand:SI 0 "register_operand" "")
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(fix:SI (match_operand 1 "register_operand" "")))
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@ -4023,7 +4148,7 @@
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(clobber (match_dup 2))
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(clobber (match_dup 3))
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(clobber (match_scratch:SI 4 ""))])]
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"TARGET_80387"
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"TARGET_80387 && !TARGET_SSE2"
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"operands[2] = assign_386_stack_local (SImode, 0);
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operands[3] = assign_386_stack_local (HImode, 1);")
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@ -4033,7 +4158,7 @@
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(clobber (match_dup 2))
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(clobber (match_dup 3))
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(clobber (match_scratch:SI 4 ""))])]
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"TARGET_80387"
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"TARGET_80387 && !TARGET_SSE"
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"operands[2] = assign_386_stack_local (SImode, 0);
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operands[3] = assign_386_stack_local (HImode, 1);")
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@ -4043,7 +4168,8 @@
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(clobber (match_operand:SI 2 "memory_operand" "=o,o"))
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(clobber (match_operand:HI 3 "memory_operand" "=m,m"))
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(clobber (match_scratch:SI 4 "=&r,r"))]
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"TARGET_80387 && FLOAT_MODE_P (GET_MODE (operands[1]))"
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"TARGET_80387 && FLOAT_MODE_P (GET_MODE (operands[1]))
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&& (TARGET_SSE2 || !SSE_FLOAT_MODE_P (GET_MODE (operands[1])))"
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"* return output_fix_trunc (insn, operands);"
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[(set_attr "type" "multi")])
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@ -4061,6 +4187,23 @@
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(set (match_dup 0) (match_dup 3))]
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"")
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;; %%% Kill these when reload knows how to do it.
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(define_split
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[(set (match_operand 0 "register_operand" "")
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(fix (match_operand 1 "register_operand" "")))]
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"reload_completed && FLOAT_MODE_P (GET_MODE (operands[1]))
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&& FP_REG_P (operands[1])"
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[(const_int 0)]
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"
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{
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operands[2] = ix86_force_to_memory (GET_MODE (operands[0]), operands[0]);
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operands[2] = gen_rtx_FIX (GET_MODE (operands[2]), operands[1]);
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emit_insn (gen_rtx_SET (VOIDmode, operands[2], operands[1]));
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emit_move_insn (operands[0], operands[2]);
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ix86_free_from_memory (GET_MODE (operands[0]));
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DONE;
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}")
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;; %% Not used yet.
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(define_insn "x86_fnstcw_1"
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[(set (match_operand:HI 0 "memory_operand" "=m")
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@ -4091,7 +4234,7 @@
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(define_insn "floathisf2"
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[(set (match_operand:SF 0 "register_operand" "=f,f")
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(float:SF (match_operand:HI 1 "nonimmediate_operand" "m,r")))]
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"TARGET_80387"
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"TARGET_80387 && !TARGET_SSE"
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"@
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fild%z1\\t%1
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#"
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@ -4099,14 +4242,30 @@
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(set_attr "mode" "SF")
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(set_attr "fp_int_src" "true")])
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(define_insn "floatsisf2"
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[(set (match_operand:SF 0 "register_operand" "=f,f")
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(float:SF (match_operand:SI 1 "nonimmediate_operand" "m,r")))]
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"TARGET_80387"
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(define_expand "floatsisf2"
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[(set (match_operand:SF 0 "register_operand" "")
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(float:SF (match_operand:SI 1 "nonimmediate_operand" "")))]
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"TARGET_SSE || TARGET_80387"
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"")
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(define_insn "*floatsisf2_i387"
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[(set (match_operand:SF 0 "register_operand" "=f,?f,x")
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(float:SF (match_operand:SI 1 "nonimmediate_operand" "m,r,mr")))]
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"TARGET_80387 && (!TARGET_SSE || TARGET_MIX_SSE_I387)"
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"@
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fild%z1\\t%1
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#"
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[(set_attr "type" "fmov,multi")
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#
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cvtsi2ss\\t{%1, %0|%0, %1}"
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[(set_attr "type" "fmov,multi,sse")
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(set_attr "mode" "SF")
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(set_attr "fp_int_src" "true")])
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(define_insn "*floatsisf2_sse"
|
||||
[(set (match_operand:SF 0 "register_operand" "=x")
|
||||
(float:SF (match_operand:SI 1 "nonimmediate_operand" "mr")))]
|
||||
"TARGET_80387 && TARGET_SSE"
|
||||
"cvtsi2ss\\t{%1, %0|%0, %1}"
|
||||
[(set_attr "type" "sse")
|
||||
(set_attr "mode" "SF")
|
||||
(set_attr "fp_int_src" "true")])
|
||||
|
||||
@ -4124,7 +4283,7 @@
|
||||
(define_insn "floathidf2"
|
||||
[(set (match_operand:DF 0 "register_operand" "=f,f")
|
||||
(float:DF (match_operand:HI 1 "nonimmediate_operand" "m,r")))]
|
||||
"TARGET_80387"
|
||||
"TARGET_80387 && !TARGET_SSE2"
|
||||
"@
|
||||
fild%z1\\t%1
|
||||
#"
|
||||
@ -4132,21 +4291,37 @@
|
||||
(set_attr "mode" "DF")
|
||||
(set_attr "fp_int_src" "true")])
|
||||
|
||||
(define_insn "floatsidf2"
|
||||
[(set (match_operand:DF 0 "register_operand" "=f,f")
|
||||
(float:DF (match_operand:SI 1 "nonimmediate_operand" "m,r")))]
|
||||
"TARGET_80387"
|
||||
(define_expand "floatsidf2"
|
||||
[(set (match_operand:DF 0 "register_operand" "")
|
||||
(float:DF (match_operand:SI 1 "nonimmediate_operand" "")))]
|
||||
""
|
||||
"")
|
||||
|
||||
(define_insn "*floatsidf2_i387"
|
||||
[(set (match_operand:DF 0 "register_operand" "=f,?f,Y")
|
||||
(float:DF (match_operand:SI 1 "nonimmediate_operand" "m,r,mr")))]
|
||||
"TARGET_80387 && (!TARGET_SSE2 || TARGET_MIX_SSE_I387)"
|
||||
"@
|
||||
fild%z1\\t%1
|
||||
#"
|
||||
[(set_attr "type" "fmov,multi")
|
||||
#
|
||||
cvtsi2sd\\t{%1, %0|%0, %1}"
|
||||
[(set_attr "type" "fmov,multi,sse")
|
||||
(set_attr "mode" "DF")
|
||||
(set_attr "fp_int_src" "true")])
|
||||
|
||||
(define_insn "*floatsidf2_sse"
|
||||
[(set (match_operand:DF 0 "register_operand" "=Y")
|
||||
(float:DF (match_operand:SI 1 "nonimmediate_operand" "mr")))]
|
||||
"TARGET_SSE2"
|
||||
"cvtsi2sd\\t{%1, %0|%0, %1}"
|
||||
[(set_attr "type" "sse")
|
||||
(set_attr "mode" "DF")
|
||||
(set_attr "fp_int_src" "true")])
|
||||
|
||||
(define_insn "floatdidf2"
|
||||
[(set (match_operand:DF 0 "register_operand" "=f,f")
|
||||
(float:DF (match_operand:DI 1 "nonimmediate_operand" "m,r")))]
|
||||
"TARGET_80387"
|
||||
"TARGET_80387 && TARGET_SSE2"
|
||||
"@
|
||||
fild%z1\\t%1
|
||||
#"
|
||||
|
Loading…
Reference in New Issue
Block a user