From 4470a3a30ed4ef41f4f35f52f7a10a71dc0bac29 Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Sun, 26 Sep 2010 20:28:48 +0200 Subject: [PATCH] i386.md (pro_epilogue_adjust_stack__add): Merge from pro_epilogue_adjust_stack__{1,2}. * config/i386/i386.md (pro_epilogue_adjust_stack__add): Merge from pro_epilogue_adjust_stack__{1,2}. (pro_epilogue_adjust_stack__add): Rename from pro_epilogue_adjust_stack__3. * config/i386/i386.c (pro_epilogue_adjust_stack): Update for renamed pro_epilogue_adjust_stack_{si,di}_add. (ix86_expand_prologue): Use indirect functions. Update for renamed pro_epilogue_adjust_stack_{si,di}_sub. From-SVN: r164635 --- gcc/ChangeLog | 11 +++++++++++ gcc/config/i386/i386.c | 23 +++++++++++++---------- gcc/config/i386/i386.md | 17 +++-------------- 3 files changed, 27 insertions(+), 24 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 9433f5a17cc..c80e26b9b1c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,14 @@ +2010-09-26 Uros Bizjak + + * config/i386/i386.md (pro_epilogue_adjust_stack__add): Merge + from pro_epilogue_adjust_stack__{1,2}. + (pro_epilogue_adjust_stack__add): Rename from + pro_epilogue_adjust_stack__3. + * config/i386/i386.c (pro_epilogue_adjust_stack): Update for + renamed pro_epilogue_adjust_stack_{si,di}_add. + (ix86_expand_prologue): Use indirect functions. Update for renamed + pro_epilogue_adjust_stack_{si,di}_sub. + 2010-09-26 Uros Bizjak * config/i386/i386.md (movmsk_df): New insn. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 788ea4e1ef1..af30e394067 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -8777,9 +8777,11 @@ pro_epilogue_adjust_stack (rtx dest, rtx src, rtx offset, rtx insn; if (! TARGET_64BIT) - insn = emit_insn (gen_pro_epilogue_adjust_stack_si_1 (dest, src, offset)); + insn = emit_insn (gen_pro_epilogue_adjust_stack_si_add (dest, + src, offset)); else if (x86_64_immediate_operand (offset, DImode)) - insn = emit_insn (gen_pro_epilogue_adjust_stack_di_1 (dest, src, offset)); + insn = emit_insn (gen_pro_epilogue_adjust_stack_di_add (dest, + src, offset)); else { rtx tmp; @@ -8796,7 +8798,7 @@ pro_epilogue_adjust_stack (rtx dest, rtx src, rtx offset, insn = emit_insn (gen_rtx_SET (DImode, tmp, offset)); if (style < 0) RTX_FRAME_RELATED_P (insn) = 1; - insn = emit_insn (gen_pro_epilogue_adjust_stack_di_2 (dest, src, tmp)); + insn = emit_insn (gen_pro_epilogue_adjust_stack_di_add (dest, src, tmp)); } if (style >= 0) @@ -9698,6 +9700,8 @@ ix86_expand_prologue (void) { rtx eax = gen_rtx_REG (Pmode, AX_REG); rtx r10 = NULL; + rtx (*adjust_stack_insn)(rtx, rtx, rtx); + bool eax_live = false; bool r10_live = false; @@ -9722,13 +9726,12 @@ ix86_expand_prologue (void) emit_insn (ix86_gen_allocate_stack_worker (eax, eax)); /* Use the fact that AX still contains ALLOCATE. */ - if (TARGET_64BIT) - insn = gen_pro_epilogue_adjust_stack_di_3 (stack_pointer_rtx, - stack_pointer_rtx, eax); - else - insn = gen_pro_epilogue_adjust_stack_si_3 (stack_pointer_rtx, - stack_pointer_rtx, eax); - insn = emit_insn (insn); + adjust_stack_insn = (TARGET_64BIT + ? gen_pro_epilogue_adjust_stack_di_sub + : gen_pro_epilogue_adjust_stack_si_sub); + + insn = emit_insn (adjust_stack_insn (stack_pointer_rtx, + stack_pointer_rtx, eax)); if (m->fs.cfa_reg == stack_pointer_rtx) { diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 0d76acb0ad5..c541c1485c4 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -16246,10 +16246,10 @@ ;; ;; in proper program order. -(define_insn "pro_epilogue_adjust_stack__1" +(define_insn "pro_epilogue_adjust_stack__add" [(set (match_operand:P 0 "register_operand" "=r,r") (plus:P (match_operand:P 1 "register_operand" "0,r") - (match_operand:P 2 "" ","))) + (match_operand:P 2 "" "r,l"))) (clobber (reg:CC FLAGS_REG)) (clobber (mem:BLK (scratch)))] "" @@ -16289,18 +16289,7 @@ (const_string "*"))) (set_attr "mode" "")]) -(define_insn "pro_epilogue_adjust_stack__2" - [(set (match_operand:P 0 "register_operand" "=r") - (plus:P (match_operand:DI 1 "register_operand" "0") - (match_operand:DI 2 "register_operand" "r"))) - (clobber (reg:CC FLAGS_REG)) - (clobber (mem:BLK (scratch)))] - "" - "add{}\t{%2, %0|%0, %2}" - [(set_attr "type" "alu") - (set_attr "mode" "")]) - -(define_insn "pro_epilogue_adjust_stack__3" +(define_insn "pro_epilogue_adjust_stack__sub" [(set (match_operand:P 0 "register_operand" "=r") (minus:P (match_operand:P 1 "register_operand" "0") (match_operand:P 2 "register_operand" "r")))