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From-SVN: r473
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@ -132,12 +132,10 @@
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;; Multiplication insns
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;; Note the '&' in the following insn which tells GCC that the second operand
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;; must be corruptable and hence not equal to the first. (Too strict in fact.)
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;; The `&' is too strict, but at least generates correct code.
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(define_insn "mulsi3"
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[(set (match_operand:SI 0 "register_operand" "=r")
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(mult:SI (match_operand:SI 1 "register_operand" "&r")
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[(set (match_operand:SI 0 "register_operand" "=&r")
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(mult:SI (match_operand:SI 1 "register_operand" "%r")
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(match_operand:SI 2 "register_operand" "r")))]
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""
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"*
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@ -150,9 +148,9 @@
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;; Unnamed templates to match MLA instruction.
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(define_insn ""
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[(set (match_operand:SI 0 "register_operand" "=r")
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[(set (match_operand:SI 0 "register_operand" "=&r")
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(plus:SI
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(mult:SI (match_operand:SI 1 "register_operand" "&r")
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(mult:SI (match_operand:SI 1 "register_operand" "%r")
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(match_operand:SI 2 "register_operand" "r"))
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(match_operand:SI 3 "register_operand" "r")))]
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""
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@ -164,10 +162,10 @@
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")
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(define_insn ""
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[(set (match_operand:SI 0 "register_operand" "=r")
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[(set (match_operand:SI 0 "register_operand" "=&r")
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(plus:SI
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(match_operand:SI 3 "register_operand" "r")
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(mult:SI (match_operand:SI 1 "register_operand" "&r")
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(mult:SI (match_operand:SI 1 "register_operand" "%r")
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(match_operand:SI 2 "register_operand" "r"))))]
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""
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"*
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@ -522,7 +520,7 @@
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return (arm_output_asm_insn (\"mvfs\\t%0, %1\", operands));
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")
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;; Zero extention instructions.
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;; Zero extension instructions.
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(define_expand "zero_extendhisi2"
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[(set (match_operand:SI 0 "register_operand" "")
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