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(seqdi_special_trunc, snedi_special_trunc, 

seqsi_special_extend, snesi_special_extend): Delete uses of SUBREG.
Make compare modes match modes of operands.
(snesi_zero_extend, snedi_zero_trunc_sp32, snedi_zero_trunc_sp64,
seqsi_zero_extend, seqdi_zero_trunc_sp32, seqdi_zero_trunc_sp64):
New patterns.

From-SVN: r10646
This commit is contained in:
Jim Wilson 1995-11-30 11:43:54 -08:00
parent 482cfaf8a5
commit 44965badd0
1 changed files with 82 additions and 22 deletions
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104
gcc/config/sparc/sparc.md
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@ -370,8 +370,8 @@
(xor:DI (match_operand:DI 1 "register_operand" "")
(match_operand:DI 2 "register_operand" "")))
(parallel [(set (match_operand:SI 0 "register_operand" "")
(eq:SI (subreg:SI (match_dup 3) 0) (const_int 0)))
(clobber (reg:CC 0))])]
(eq:DI (match_dup 3) (const_int 0)))
(clobber (reg:CCX 0))])]
""
"{ operands[3] = gen_reg_rtx (DImode); }")
@ -380,31 +380,31 @@
(xor:DI (match_operand:DI 1 "register_operand" "")
(match_operand:DI 2 "register_operand" "")))
(parallel [(set (match_operand:SI 0 "register_operand" "")
(ne:SI (subreg:SI (match_dup 3) 0) (const_int 0)))
(clobber (reg:CC 0))])]
""
"{ operands[3] = gen_reg_rtx (DImode); }")
(define_expand "seqsi_special_extend"
[(set (subreg:SI (match_dup 3) 0)
(xor:SI (match_operand:SI 1 "register_operand" "")
(match_operand:SI 2 "register_operand" "")))
(parallel [(set (match_operand:DI 0 "register_operand" "")
(eq:DI (match_dup 3) (const_int 0)))
(clobber (reg:CCX 0))])]
""
"{ operands[3] = gen_reg_rtx (DImode); }")
(define_expand "snesi_special_extend"
[(set (subreg:SI (match_dup 3) 0)
(xor:SI (match_operand:SI 1 "register_operand" "")
(match_operand:SI 2 "register_operand" "")))
(parallel [(set (match_operand:DI 0 "register_operand" "")
(ne:DI (match_dup 3) (const_int 0)))
(clobber (reg:CCX 0))])]
""
"{ operands[3] = gen_reg_rtx (DImode); }")
(define_expand "seqsi_special_extend"
[(set (match_dup 3)
(xor:SI (match_operand:SI 1 "register_operand" "")
(match_operand:SI 2 "register_operand" "")))
(parallel [(set (match_operand:DI 0 "register_operand" "")
(eq:SI (match_dup 3) (const_int 0)))
(clobber (reg:CC 0))])]
"TARGET_V9"
"{ operands[3] = gen_reg_rtx (SImode); }")
(define_expand "snesi_special_extend"
[(set (match_dup 3)
(xor:SI (match_operand:SI 1 "register_operand" "")
(match_operand:SI 2 "register_operand" "")))
(parallel [(set (match_operand:DI 0 "register_operand" "")
(ne:SI (match_dup 3) (const_int 0)))
(clobber (reg:CC 0))])]
"TARGET_V9"
"{ operands[3] = gen_reg_rtx (SImode); }")
;; ??? v9: Operand 0 needs a mode, so SImode was chosen.
;; However, the code handles both SImode and DImode.
(define_expand "seq"
@ -824,6 +824,16 @@
[(set_attr "type" "unary")
(set_attr "length" "2")])
(define_insn "*snesi_zero_extend"
[(set (match_operand:DI 0 "register_operand" "=r")
(ne:SI (match_operand:SI 1 "register_operand" "r")
(const_int 0)))
(clobber (reg:CC 0))]
"TARGET_V9"
"subcc %%g0,%1,%%g0\;addx %%g0,0,%0"
[(set_attr "type" "unary")
(set_attr "length" "2")])
(define_insn "*snedi_zero"
[(set (match_operand:DI 0 "register_operand" "=r")
(ne:DI (match_operand:DI 1 "register_operand" "r")
@ -844,6 +854,26 @@
[(set_attr "type" "unary")
(set_attr "length" "2")])
(define_insn "*snedi_zero_trunc_sp32"
[(set (match_operand:SI 0 "register_operand" "=r")
(ne:DI (match_operand:DI 1 "register_operand" "r")
(const_int 0)))
(clobber (reg:CCX 0))]
"! TARGET_V9"
"xor %1,%R1,%0\;subcc %%g0,%0,%%g0\;addx %%g0,0,%0"
[(set_attr "type" "unary")
(set_attr "length" "3")])
(define_insn "*snedi_zero_trunc_sp64"
[(set (match_operand:SI 0 "register_operand" "=r")
(ne:DI (match_operand:DI 1 "register_operand" "r")
(const_int 0)))
(clobber (reg:CCX 0))]
"TARGET_V9"
"mov 0,%0\;movrnz %1,1,%0"
[(set_attr "type" "unary")
(set_attr "length" "2")])
(define_insn "*seqsi_zero"
[(set (match_operand:SI 0 "register_operand" "=r")
(eq:SI (match_operand:SI 1 "register_operand" "r")
@ -864,6 +894,16 @@
[(set_attr "type" "unary")
(set_attr "length" "2")])
(define_insn "*seqsi_zero_extend"
[(set (match_operand:DI 0 "register_operand" "=r")
(eq:SI (match_operand:SI 1 "register_operand" "r")
(const_int 0)))
(clobber (reg:CC 0))]
"TARGET_V9"
"subcc %%g0,%1,%%g0\;subx %%g0,-1,%0"
[(set_attr "type" "unary")
(set_attr "length" "2")])
(define_insn "*seqdi_zero"
[(set (match_operand:DI 0 "register_operand" "=r")
(eq:DI (match_operand:DI 1 "register_operand" "r")
@ -884,6 +924,26 @@
[(set_attr "type" "unary")
(set_attr "length" "2")])
(define_insn "*seqdi_zero_trunc_sp32"
[(set (match_operand:SI 0 "register_operand" "=r")
(eq:DI (match_operand:DI 1 "register_operand" "r")
(const_int 0)))
(clobber (reg:CCX 0))]
"! TARGET_V9"
"xor %1,%R1,%0\;subcc %%g0,%0,%%g0\;subx %%g0,-1,%0"
[(set_attr "type" "unary")
(set_attr "length" "3")])
(define_insn "*seqdi_zero_trunc_sp64"
[(set (match_operand:SI 0 "register_operand" "=r")
(eq:DI (match_operand:DI 1 "register_operand" "r")
(const_int 0)))
(clobber (reg:CCX 0))]
"TARGET_V9"
"mov 0,%0\;movrz %1,1,%0"
[(set_attr "type" "unary")
(set_attr "length" "2")])
;; We can also do (x + (i == 0)) and related, so put them in.
;; ??? The addx/subx insns use the 32 bit carry flag so there are no DImode
;; versions for v9.