[AArch64] Add __extension__ and __always_inline__ to crypto intrinsics
* config/aarch64/arm_neon.h (vaeseq_u8): Add __extension__ and __always_inline__ attribute. (vaesdq_u8): Likewise. (vaesmcq_u8): Likewise. (vaesimcq_u8): Likewise. (vsha1cq_u32): Likewise. (vsha1mq_u32): Likewise. (vsha1pq_u32): Likewise. (vsha1h_u32): Likewise. (vsha1su0q_u32): Likewise. (vsha1su1q_u32): Likewise. (vsha256hq_u32): Likewise. (vsha256h2q_u32): Likewise. (vsha256su0q_u32): Likewise. (vsha256su1q_u32): Likewise. (vmull_p64): Likewise. (vmull_high_p64): Likewise. From-SVN: r223523
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@ -1,3 +1,23 @@
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2015-05-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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* config/aarch64/arm_neon.h (vaeseq_u8): Add __extension__ and
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__always_inline__ attribute.
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(vaesdq_u8): Likewise.
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(vaesmcq_u8): Likewise.
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(vaesimcq_u8): Likewise.
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(vsha1cq_u32): Likewise.
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(vsha1mq_u32): Likewise.
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(vsha1pq_u32): Likewise.
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(vsha1h_u32): Likewise.
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(vsha1su0q_u32): Likewise.
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(vsha1su1q_u32): Likewise.
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(vsha256hq_u32): Likewise.
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(vsha256h2q_u32): Likewise.
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(vsha256su0q_u32): Likewise.
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(vsha256su1q_u32): Likewise.
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(vmull_p64): Likewise.
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(vmull_high_p64): Likewise.
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2015-05-20 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
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* final.c (final_scan_insn): Don't check HAVE_peephole with the
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@ -11400,25 +11400,25 @@ vbslq_u64 (uint64x2_t __a, uint64x2_t __b, uint64x2_t __c)
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/* vaes */
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static __inline uint8x16_t
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__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
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vaeseq_u8 (uint8x16_t data, uint8x16_t key)
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{
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return __builtin_aarch64_crypto_aesev16qi_uuu (data, key);
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}
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static __inline uint8x16_t
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__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
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vaesdq_u8 (uint8x16_t data, uint8x16_t key)
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{
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return __builtin_aarch64_crypto_aesdv16qi_uuu (data, key);
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}
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static __inline uint8x16_t
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__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
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vaesmcq_u8 (uint8x16_t data)
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{
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return __builtin_aarch64_crypto_aesmcv16qi_uu (data);
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}
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static __inline uint8x16_t
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__extension__ static __inline uint8x16_t __attribute__ ((__always_inline__))
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vaesimcq_u8 (uint8x16_t data)
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{
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return __builtin_aarch64_crypto_aesimcv16qi_uu (data);
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@ -21053,72 +21053,74 @@ vrsrad_n_u64 (uint64_t __a, uint64_t __b, const int __c)
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/* vsha1 */
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static __inline uint32x4_t
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__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
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vsha1cq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk)
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{
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return __builtin_aarch64_crypto_sha1cv4si_uuuu (hash_abcd, hash_e, wk);
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}
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static __inline uint32x4_t
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__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
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vsha1mq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk)
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{
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return __builtin_aarch64_crypto_sha1mv4si_uuuu (hash_abcd, hash_e, wk);
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}
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static __inline uint32x4_t
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__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
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vsha1pq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk)
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{
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return __builtin_aarch64_crypto_sha1pv4si_uuuu (hash_abcd, hash_e, wk);
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}
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static __inline uint32_t
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__extension__ static __inline uint32_t __attribute__ ((__always_inline__))
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vsha1h_u32 (uint32_t hash_e)
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{
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return __builtin_aarch64_crypto_sha1hsi_uu (hash_e);
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}
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static __inline uint32x4_t
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__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
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vsha1su0q_u32 (uint32x4_t w0_3, uint32x4_t w4_7, uint32x4_t w8_11)
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{
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return __builtin_aarch64_crypto_sha1su0v4si_uuuu (w0_3, w4_7, w8_11);
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}
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static __inline uint32x4_t
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__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
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vsha1su1q_u32 (uint32x4_t tw0_3, uint32x4_t w12_15)
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{
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return __builtin_aarch64_crypto_sha1su1v4si_uuu (tw0_3, w12_15);
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}
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static __inline uint32x4_t
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__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
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vsha256hq_u32 (uint32x4_t hash_abcd, uint32x4_t hash_efgh, uint32x4_t wk)
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{
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return __builtin_aarch64_crypto_sha256hv4si_uuuu (hash_abcd, hash_efgh, wk);
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}
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static __inline uint32x4_t
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__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
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vsha256h2q_u32 (uint32x4_t hash_efgh, uint32x4_t hash_abcd, uint32x4_t wk)
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{
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return __builtin_aarch64_crypto_sha256h2v4si_uuuu (hash_efgh, hash_abcd, wk);
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}
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static __inline uint32x4_t
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__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
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vsha256su0q_u32 (uint32x4_t w0_3, uint32x4_t w4_7)
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{
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return __builtin_aarch64_crypto_sha256su0v4si_uuu (w0_3, w4_7);
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}
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static __inline uint32x4_t
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__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
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vsha256su1q_u32 (uint32x4_t tw0_3, uint32x4_t w8_11, uint32x4_t w12_15)
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{
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return __builtin_aarch64_crypto_sha256su1v4si_uuuu (tw0_3, w8_11, w12_15);
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}
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static __inline poly128_t
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__extension__ static __inline poly128_t __attribute__ ((__always_inline__))
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vmull_p64 (poly64_t a, poly64_t b)
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{
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return
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__builtin_aarch64_crypto_pmulldi_ppp (a, b);
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}
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static __inline poly128_t
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__extension__ static __inline poly128_t __attribute__ ((__always_inline__))
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vmull_high_p64 (poly64x2_t a, poly64x2_t b)
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{
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return __builtin_aarch64_crypto_pmullv2di_ppp (a, b);
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