Fix vec_cmp comparison mode
vec_cmps assign the result of a vector comparison to a mask. The optab was called with the destination having mode mask_mode but with the source (the comparison) having mode VOIDmode, which led to invalid rtl if the source operand was used directly. gcc/ 2016-11-15 Richard Sandiford <richard.sandiford@arm.com> Alan Hayward <alan.hayward@arm.com> David Sherwood <david.sherwood@arm.com> * optabs.c (vector_compare_rtx): Add a cmp_mode parameter and use it in the final call to gen_rtx_fmt_ee. (expand_vec_cond_expr): Update accordingly. (expand_vec_cmp_expr): Likewise. Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com> From-SVN: r242489
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@ -1,3 +1,12 @@
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2016-11-16 Richard Sandiford <richard.sandiford@arm.com>
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Alan Hayward <alan.hayward@arm.com>
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David Sherwood <david.sherwood@arm.com>
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* optabs.c (vector_compare_rtx): Add a cmp_mode parameter
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and use it in the final call to gen_rtx_fmt_ee.
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(expand_vec_cond_expr): Update accordingly.
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(expand_vec_cmp_expr): Likewise.
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2016-11-16 Richard Sandiford <richard.sandiford@arm.com>
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Alan Hayward <alan.hayward@arm.com>
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David Sherwood <david.sherwood@arm.com>
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21
gcc/optabs.c
21
gcc/optabs.c
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@ -5283,14 +5283,15 @@ get_rtx_code (enum tree_code tcode, bool unsignedp)
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return code;
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}
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/* Return comparison rtx for COND. Use UNSIGNEDP to select signed or
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unsigned operators. OPNO holds an index of the first comparison
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operand in insn with code ICODE. Do not generate compare instruction. */
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/* Return a comparison rtx of mode CMP_MODE for COND. Use UNSIGNEDP to
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select signed or unsigned operators. OPNO holds the index of the
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first comparison operand for insn ICODE. Do not generate the
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compare instruction itself. */
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static rtx
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vector_compare_rtx (enum tree_code tcode, tree t_op0, tree t_op1,
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bool unsignedp, enum insn_code icode,
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unsigned int opno)
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vector_compare_rtx (machine_mode cmp_mode, enum tree_code tcode,
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tree t_op0, tree t_op1, bool unsignedp,
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enum insn_code icode, unsigned int opno)
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{
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struct expand_operand ops[2];
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rtx rtx_op0, rtx_op1;
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@ -5318,7 +5319,7 @@ vector_compare_rtx (enum tree_code tcode, tree t_op0, tree t_op1,
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create_input_operand (&ops[1], rtx_op1, m1);
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if (!maybe_legitimize_operands (icode, opno, 2, ops))
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gcc_unreachable ();
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return gen_rtx_fmt_ee (rcode, VOIDmode, ops[0].value, ops[1].value);
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return gen_rtx_fmt_ee (rcode, cmp_mode, ops[0].value, ops[1].value);
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}
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/* Checks if vec_perm mask SEL is a constant equivalent to a shift of the first
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@ -5644,7 +5645,8 @@ expand_vec_cond_expr (tree vec_cond_type, tree op0, tree op1, tree op2,
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return 0;
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}
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comparison = vector_compare_rtx (tcode, op0a, op0b, unsignedp, icode, 4);
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comparison = vector_compare_rtx (VOIDmode, tcode, op0a, op0b, unsignedp,
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icode, 4);
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rtx_op1 = expand_normal (op1);
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rtx_op2 = expand_normal (op2);
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@ -5688,7 +5690,8 @@ expand_vec_cmp_expr (tree type, tree exp, rtx target)
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return 0;
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}
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comparison = vector_compare_rtx (tcode, op0a, op0b, unsignedp, icode, 2);
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comparison = vector_compare_rtx (mask_mode, tcode, op0a, op0b,
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unsignedp, icode, 2);
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create_output_operand (&ops[0], target, mask_mode);
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create_fixed_operand (&ops[1], comparison);
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create_fixed_operand (&ops[2], XEXP (comparison, 0));
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