diff --git a/gcc/ChangeLog b/gcc/ChangeLog index bee3813269f..e5d16f9d01e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2014-12-17 Oleg Endo + + PR target/55212 + * config/sh/sh.md (*addsi3_compact): Add parentheses around && + condition. Add comments. + 2014-12-20 Segher Boessenkool PR target/64358 diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md index a74e17f151f..7b68aa1b912 100644 --- a/gcc/config/sh/sh.md +++ b/gcc/config/sh/sh.md @@ -2056,14 +2056,20 @@ [(set_attr "type" "arith_media") (set_attr "highpart" "ignore")]) +;; The *addsi3_compact is made an insn_and_split and accepts actually +;; impossible constraints to make LRA's register elimination work well on SH. +;; The problem is that LRA expects something like +;; (set rA (plus rB (const_int N))) +;; to work. We can do that, but we have to split out an additional reg-reg +;; copy before the actual add insn. (define_insn_and_split "*addsi3_compact" [(set (match_operand:SI 0 "arith_reg_dest" "=r,&r") (plus:SI (match_operand:SI 1 "arith_operand" "%0,r") (match_operand:SI 2 "arith_or_int_operand" "rI08,rn")))] "TARGET_SH1 - && (rtx_equal_p (operands[0], operands[1]) - && arith_operand (operands[2], SImode)) - || ! reg_overlap_mentioned_p (operands[0], operands[1])" + && ((rtx_equal_p (operands[0], operands[1]) + && arith_operand (operands[2], SImode)) + || ! reg_overlap_mentioned_p (operands[0], operands[1]))" "@ add %2,%0 #"