testsuite/arm: Improve scan-assembler in pr96770.c

I'm seeing random scan-assembler-times failures in pr96770.c when LTO is used.

I suspect this is because the \\+4 string matches the LTO sections, sometimes.

This small patch avoids the issue, by matching arr\\+4 instead of \\+4.

2021-03-28  Christophe Lyon  <christophe.lyon@linaro.org>

	gcc/testsuite/
	PR target/96770
	* gcc.target/arm/pure-code/pr96770.c: Improve scan-assembler-times.
This commit is contained in:
Christophe Lyon 2021-03-28 18:59:06 +00:00
parent 297363774e
commit 46720db72c

View File

@ -5,17 +5,17 @@ int arr[1000];
int *f4 (void) { return &arr[1]; }
/* For cortex-m0 (thumb-1/v6m), we generate 4 movs with upper/lower:#arr+4. */
/* { dg-final { scan-assembler-times "\\+4" 4 { target { { ! arm_thumb1_movt_ok } && { ! arm_thumb2_ok } } } } } */
/* { dg-final { scan-assembler-times "arr\\+4" 4 { target { { ! arm_thumb1_movt_ok } && { ! arm_thumb2_ok } } } } } */
/* For cortex-m with movt/movw (thumb-1/v8m.base or thumb-2), we
generate a movt/movw pair with upper/lower:#arr+4. */
/* { dg-final { scan-assembler-times "\\+4" 2 { target { arm_thumb1_movt_ok || arm_thumb2_ok } } } } */
/* { dg-final { scan-assembler-times "arr\\+4" 2 { target { arm_thumb1_movt_ok || arm_thumb2_ok } } } } */
int *f5 (void) { return &arr[80]; }
/* For cortex-m0 (thumb-1/v6m), we generate 1 ldr from rodata pointer to arr+320. */
/* { dg-final { scan-assembler-times "\\+320" 1 { target { { ! arm_thumb1_movt_ok } && { ! arm_thumb2_ok } } } } } */
/* { dg-final { scan-assembler-times "arr\\+320" 1 { target { { ! arm_thumb1_movt_ok } && { ! arm_thumb2_ok } } } } } */
/* For cortex-m with movt/movw (thumb-1/v8m.base or thumb-2), we
generate a movt/movw pair with upper/lower:arr+320. */
/* { dg-final { scan-assembler-times "\\+320" 2 { target { arm_thumb1_movt_ok || arm_thumb2_ok } } } } */
/* { dg-final { scan-assembler-times "arr\\+320" 2 { target { arm_thumb1_movt_ok || arm_thumb2_ok } } } } */