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[multiple changes] 

2001-11-04  Alan Modra  <amodra@bigpond.net.au>

        * config/rs6000/rs6000.md (load_toc_aix_{si,di}): Mark r2 as used.

2001-11-04  David Edelsohn  <edelsohn@gnu.org>

        * config/rs6000/rs6000.c (rs6000_emit_move): Handle 64-bit
        mode as well.  Do not explicitly create intermediate regs.

From-SVN: r46777
This commit is contained in:
David Edelsohn 2001-11-04 18:30:02 -05:00
parent 5f37d07c6e
commit 46aaf10d1e
3 changed files with 29 additions and 12 deletions
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9
gcc/ChangeLog
View File

@ -1,3 +1,12 @@
2001-11-04 Alan Modra <amodra@bigpond.net.au>
* config/rs6000/rs6000.md (load_toc_aix_{si,di}): Mark r2 as used.
2001-11-04 David Edelsohn <edelsohn@gnu.org>
* config/rs6000/rs6000.c (rs6000_emit_move): Handle 64-bit
mode as well. Do not explicitly create intermediate regs.
2001-11-04 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
* arm/aof.h (aof_text_section, aof_data_section): Don't declare.

22
gcc/config/rs6000/rs6000.c
View File

@ -1811,17 +1811,23 @@ rs6000_emit_move (dest, source, mode)
if (GET_CODE (operands[0]) == MEM
&& GET_CODE (operands[1]) == MEM
&& mode == DImode
&& ! TARGET_POWERPC64
&& (SLOW_UNALIGNED_ACCESS(DImode, MEM_ALIGN(operands[0]))
|| SLOW_UNALIGNED_ACCESS(DImode, MEM_ALIGN(operands[1]))))
{
rtx reg1, reg2;
reg1 = gen_reg_rtx(SImode);
reg2 = gen_reg_rtx(SImode);
rs6000_emit_move (reg1, simplify_subreg (SImode, operands[1], DImode, 0), SImode);
rs6000_emit_move (reg2, simplify_subreg (SImode, operands[1], DImode, 4), SImode);
rs6000_emit_move (simplify_subreg (SImode, operands[0], DImode, 0), reg1, SImode);
rs6000_emit_move (simplify_subreg (SImode, operands[0], DImode, 4), reg2, SImode);
if (!TARGET_POWERPC64)
{
emit_move_insn (simplify_subreg (SImode, operands[0], DImode, 0),
simplify_subreg (SImode, operands[1], DImode, 0));
emit_move_insn (simplify_subreg (SImode, operands[0], DImode, 4),
simplify_subreg (SImode, operands[1], DImode, 4));
}
else
{
emit_move_insn (gen_lowpart (SImode, operands[0]),
gen_lowpart (SImode, operands[1]));
emit_move_insn (gen_highpart (SImode, operands[0]),
gen_highpart (SImode, operands[1]));
}
return;
}

10
gcc/config/rs6000/rs6000.md
View File

@ -9077,8 +9077,9 @@
;; Code to initialize the TOC register...
(define_insn "load_toc_aix_si"
[(set (match_operand:SI 0 "register_operand" "=r")
(unspec:SI [(const_int 0)] 7))]
[(parallel [(set (match_operand:SI 0 "register_operand" "=r")
(unspec:SI [(const_int 0)] 7))
(use (reg:SI 2))])]
"DEFAULT_ABI == ABI_AIX && TARGET_32BIT"
"*
{
@ -9091,8 +9092,9 @@
[(set_attr "type" "load")])
(define_insn "load_toc_aix_di"
[(set (match_operand:DI 0 "register_operand" "=r")
(unspec:DI [(const_int 0)] 7))]
[(parallel [(set (match_operand:DI 0 "register_operand" "=r")
(unspec:DI [(const_int 0)] 7))
(use (reg:DI 2))])]
"DEFAULT_ABI == ABI_AIX && TARGET_64BIT"
"*
{