i386.md (*movqi_internal): Calculate mode attribute of alternatives 7,8,9 depending on TARGET_AVX512DQ.

* gcc.target/config/i386.md (*movqi_internal): Calculate mode
	attribute of alternatives 7,8,9 depending on TARGET_AVX512DQ.
	<TYPE_MSKMOV>: Emit kmovw for MODE_HI insn mode attribute.
	(*k<logic><mode>): Calculate mode attribute depending on
	TARGET_AVX512DQ.  Emit k<logic>w for MODE_HI insn mode attribute.
	(*andqi_1): Calculate mode attribute of alternative 3 depending
	on TARGET_AVX512DQ.  Emit kandw for MODE_HI insn mode attribute.
	(kandn<mode>): Calculate mode attribute of alternative 2 depending
	on TARGET_AVX512DQ.  Emit kandnw for MODE_HI insn mode attribute.
	(kxnor<mode>): Merge insn patterns using SWI1248_AVX512BW mode
	iterator.  Calculate mode attribute of alternative 1 depending
	on TARGET_AVX512DQ.  Emit kxnorw for MODE_HI insn mode attribute.
	(*one_cmplqi2_1): Calculate mode attribute of alternative 2 depending
	on TARGET_AVX512DQ.  Emit knotw for MODE_HI insn mode attribute.

From-SVN: r242791
This commit is contained in:
Uros Bizjak 2016-11-23 20:05:53 +01:00
parent 25cb6b33f7
commit 46e89251c4
2 changed files with 145 additions and 85 deletions

View File

@ -1,3 +1,20 @@
2016-11-23 Uros Bizjak <ubizjak@gmail.com>
* gcc.target/config/i386.md (*movqi_internal): Calculate mode
attribute of alternatives 7,8,9 depending on TARGET_AVX512DQ.
<TYPE_MSKMOV>: Emit kmovw for MODE_HI insn mode attribute.
(*k<logic><mode>): Calculate mode attribute depending on
TARGET_AVX512DQ. Emit k<logic>w for MODE_HI insn mode attribute.
(*andqi_1): Calculate mode attribute of alternative 3 depending
on TARGET_AVX512DQ. Emit kandw for MODE_HI insn mode attribute.
(kandn<mode>): Calculate mode attribute of alternative 2 depending
on TARGET_AVX512DQ. Emit kandnw for MODE_HI insn mode attribute.
(kxnor<mode>): Merge insn patterns using SWI1248_AVX512BW mode
iterator. Calculate mode attribute of alternative 1 depending
on TARGET_AVX512DQ. Emit kxnorw for MODE_HI insn mode attribute.
(*one_cmplqi2_1): Calculate mode attribute of alternative 2 depending
on TARGET_AVX512DQ. Emit knotw for MODE_HI insn mode attribute.
2016-11-23 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
PR middle-end/78153
@ -159,8 +176,8 @@
(grid_call_permissible_in_distribute_p): Likewise.
(grid_handle_call_in_distribute): Likewise.
(grid_dist_follows_tiling_pattern): Likewise.
(grid_target_follows_gridifiable_pattern): Support standalone distribute
constructs.
(grid_target_follows_gridifiable_pattern): Support standalone
distribute constructs.
(grid_var_segment): New enum.
(grid_mark_variable_segment): New function.
(grid_copy_leading_local_assignments): Call grid_mark_variable_segment
@ -221,7 +238,7 @@
(get_in_type): Return this if it is a register of
matching size.
(hsa_get_declaration_name): Moved to...
* hsa-gen.c (hsa_get_declaration_name): ...here. Allocate
* hsa-gen.c (hsa_get_declaration_name): ...here. Allocate
temporary string on an obstack instead from ggc.
(query_hsa_grid): Renamed to query_hsa_grid_dim, reimplemented, cut
down to two overloads.
@ -450,15 +467,14 @@
(predicate_scalar_phi): Call fold_stmt using the new valueize func.
2016-11-23 Martin Liska <mliska@suse.cz>
Martin Jambor <mjambor@suse.cz>
Martin Jambor <mjambor@suse.cz>
* doc/install.texi: Remove entry about --with-hsa-kmt-lib.
2016-11-23 Aldy Hernandez <aldyh@redhat.com>
PR target/78213
* opts.c (finish_options): Set -fsyntax-only if running self
tests.
* opts.c (finish_options): Set -fsyntax-only if running self tests.
2016-11-23 Richard Biener <rguenther@suse.de>
@ -537,13 +553,14 @@
ior and xor operators.
* config/aarch64/constraints.md (UsO constraint): New SImode constraint
for constants in "and" operantions.
(UsP constraint): New DImode constraint for constants in "and" operations.
(UsP constraint): New DImode constraint for constants
in "and" operations.
* config/aarch64/iterators.md (lconst2): New mode iterator.
(LOGICAL2): New code iterator.
* config/aarch64/predicates.md (aarch64_logical_and_immediate): New
predicate
(aarch64_logical_and_operand): New predicate allowing extended constants
for "and" operations.
predicate.
(aarch64_logical_and_operand): New predicate allowing extended
constants for "and" operations.
2016-11-22 Walter Lee <walt@tilera.com>
@ -635,7 +652,7 @@
* sel-sched-ir.h: Remove trailing blank lines.
2016-11-22 Jakub Jelinek <jakub@redhat.com>
Alexander Monakov <amonakov@ispras.ru>
Alexander Monakov <amonakov@ispras.ru>
* internal-fn.c (expand_GOMP_USE_SIMT): New function.
* tree.c (omp_clause_num_ops): OMP_CLAUSE__SIMT_ has 0 operands.

View File

@ -970,6 +970,11 @@
(define_mode_iterator SWI1248_AVX512BWDQ
[(QI "TARGET_AVX512DQ") HI (SI "TARGET_AVX512BW") (DI "TARGET_AVX512BW")])
;; All integer modes with AVX512BW, where HImode operation
;; can be used instead of QImode.
(define_mode_iterator SWI1248_AVX512BW
[QI HI (SI "TARGET_AVX512BW") (DI "TARGET_AVX512BW")])
;; All integer modes without QImode.
(define_mode_iterator SWI248x [HI SI DI])
@ -2170,9 +2175,9 @@
(define_insn "*movdi_internal"
[(set (match_operand:DI 0 "nonimmediate_operand"
"=r ,o ,r,r ,r,m ,*y,*y,?*y,?m,?r ,?*Ym,*v,*v,*v,m ,m,?r ,?r,?*Yi,?*Ym,?*Yi,*k,*k ,*r ,*m")
"=r ,o ,r,r ,r,m ,*y,*y,?*y,?m,?r ,?*Ym,*v,*v,*v,m ,m,?r ,?r,?*Yi,?*Ym,?*Yi,*k,*k ,*r,*m")
(match_operand:DI 1 "general_operand"
"riFo,riF,Z,rem,i,re,C ,*y,m ,*y,*Yn,r ,C ,*v,m ,*v,v,*Yj,*v,r ,*Yj ,*Yn ,*r ,*km,*k,*k"))]
"riFo,riF,Z,rem,i,re,C ,*y,m ,*y,*Yn,r ,C ,*v,m ,*v,v,*Yj,*v,r ,*Yj ,*Yn ,*r,*km,*k,*k"))]
"!(MEM_P (operands[0]) && MEM_P (operands[1]))"
{
switch (get_attr_type (insn))
@ -2489,17 +2494,16 @@
(unspec:HI
[(match_operand:HI 1 "nonimmediate_operand" "r,km")]
UNSPEC_KMOV))]
"!(MEM_P (operands[0]) && MEM_P (operands[1])) && TARGET_AVX512F"
"TARGET_AVX512F && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
"@
kmovw\t{%k1, %0|%0, %k1}
kmovw\t{%1, %0|%0, %1}";
[(set_attr "mode" "HI")
(set_attr "type" "mskmov")
(set_attr "prefix" "vex")])
[(set_attr "type" "mskmov")
(set_attr "prefix" "vex")
(set_attr "mode" "HI")])
(define_insn "*movhi_internal"
[(set (match_operand:HI 0 "nonimmediate_operand" "=r,r ,r ,m ,k,k, r,m")
[(set (match_operand:HI 0 "nonimmediate_operand" "=r,r ,r ,m ,k,k ,r,m")
(match_operand:HI 1 "general_operand" "r ,rn,rm,rn,r,km,k,k"))]
"!(MEM_P (operands[0]) && MEM_P (operands[1]))"
{
@ -2512,19 +2516,23 @@
case TYPE_MSKMOV:
switch (which_alternative)
{
case 4: return "kmovw\t{%k1, %0|%0, %k1}";
case 5: /* FALLTHRU */
case 7: return "kmovw\t{%1, %0|%0, %1}";
case 6: return "kmovw\t{%1, %k0|%k0, %1}";
default: gcc_unreachable ();
{
case 4:
return "kmovw\t{%k1, %0|%0, %k1}";
case 6:
return "kmovw\t{%1, %k0|%k0, %1}";
case 5:
case 7:
return "kmovw\t{%1, %0|%0, %1}";
default:
gcc_unreachable ();
}
default:
if (get_attr_mode (insn) == MODE_SI)
return "mov{l}\t{%k1, %k0|%k0, %k1}";
return "mov{l}\t{%k1, %k0|%k0, %k1}";
else
return "mov{w}\t{%1, %0|%0, %1}";
return "mov{w}\t{%1, %0|%0, %1}";
}
}
[(set (attr "type")
@ -2574,11 +2582,15 @@
(define_insn "*movqi_internal"
[(set (match_operand:QI 0 "nonimmediate_operand"
"=q,q ,q ,r,r ,?r,m ,k,k,r ,m,k")
"=q,q ,q ,r,r ,?r,m ,k,k,r,m,k")
(match_operand:QI 1 "general_operand"
"q ,qn,qm,q,rn,qm,qn,r ,k,k,k,m"))]
"q ,qn,qm,q,rn,qm,qn,r,k,k,k,m"))]
"!(MEM_P (operands[0]) && MEM_P (operands[1]))"
{
static char buf[128];
const char *ops;
const char *suffix;
switch (get_attr_type (insn))
{
case TYPE_IMOVX:
@ -2588,24 +2600,33 @@
case TYPE_MSKMOV:
switch (which_alternative)
{
case 7: return TARGET_AVX512DQ ? "kmovb\t{%k1, %0|%0, %k1}"
: "kmovw\t{%k1, %0|%0, %k1}";
case 8: return TARGET_AVX512DQ ? "kmovb\t{%1, %0|%0, %1}"
: "kmovw\t{%1, %0|%0, %1}";
case 9: return TARGET_AVX512DQ ? "kmovb\t{%1, %k0|%k0, %1}"
: "kmovw\t{%1, %k0|%k0, %1}";
case 7:
ops = "kmov%s\t{%%k1, %%0|%%0, %%k1}";
break;
case 9:
ops = "kmov%s\t{%%1, %%k0|%%k0, %%1}";
break;
case 10:
case 11:
gcc_assert (TARGET_AVX512DQ);
return "kmovb\t{%1, %0|%0, %1}";
default: gcc_unreachable ();
/* FALLTHRU */
case 8:
ops = "kmov%s\t{%%1, %%0|%%0, %%1}";
break;
default:
gcc_unreachable ();
}
suffix = (get_attr_mode (insn) == MODE_HI) ? "w" : "b";
snprintf (buf, sizeof (buf), ops, suffix);
return buf;
default:
if (get_attr_mode (insn) == MODE_SI)
return "mov{l}\t{%k1, %k0|%k0, %k1}";
return "mov{l}\t{%k1, %k0|%k0, %k1}";
else
return "mov{b}\t{%1, %0|%0, %1}";
return "mov{b}\t{%1, %0|%0, %1}";
}
}
[(set (attr "isa")
@ -2640,6 +2661,9 @@
(const_string "SI")
(eq_attr "alternative" "6")
(const_string "QI")
(and (eq_attr "alternative" "7,8,9")
(not (match_test "TARGET_AVX512DQ")))
(const_string "HI")
(eq_attr "type" "imovx")
(const_string "SI")
(and (eq_attr "type" "imov")
@ -3822,7 +3846,7 @@
kmov<mskmodesuffix>\t{%1, %k0|%k0, %1}"
[(set_attr "isa" "*,<kmov_isa>")
(set_attr "type" "imovx,mskmov")
(set_attr "mode" "SI")])
(set_attr "mode" "SI,<MODE>")])
(define_expand "zero_extend<mode>si2"
[(set (match_operand:SI 0 "register_operand")
@ -3923,8 +3947,8 @@
"@
movz{bl|x}\t{%1, %k0|%k0, %1}
kmovb\t{%1, %k0|%k0, %1}"
[(set_attr "type" "imovx,mskmov")
(set_attr "isa" "*,avx512dq")
[(set_attr "isa" "*,avx512dq")
(set_attr "type" "imovx,mskmov")
(set_attr "mode" "SI,QI")])
(define_insn_and_split "*zext<mode>_doubleword_and"
@ -8055,23 +8079,26 @@
(any_logic:SWI1248x (match_dup 1)
(match_dup 2)))])
(define_mode_iterator SWI1248_AVX512BW
[QI HI (SI "TARGET_AVX512BW") (DI "TARGET_AVX512BW")])
(define_insn "*k<logic><mode>"
[(set (match_operand:SWI1248_AVX512BW 0 "mask_reg_operand" "=k")
(any_logic:SWI1248_AVX512BW (match_operand:SWI1248_AVX512BW 1 "mask_reg_operand" "k")
(match_operand:SWI1248_AVX512BW 2 "mask_reg_operand" "k")))]
(any_logic:SWI1248_AVX512BW
(match_operand:SWI1248_AVX512BW 1 "mask_reg_operand" "k")
(match_operand:SWI1248_AVX512BW 2 "mask_reg_operand" "k")))]
"TARGET_AVX512F"
{
if (!TARGET_AVX512DQ && <MODE>mode == QImode)
if (get_attr_mode (insn) == MODE_HI)
return "k<logic>w\t{%2, %1, %0|%0, %1, %2}";
else
return "k<logic><mskmodesuffix>\t{%2, %1, %0|%0, %1, %2}";
}
[(set_attr "mode" "<MODE>")
(set_attr "type" "msklog")
(set_attr "prefix" "vex")])
[(set_attr "type" "msklog")
(set_attr "prefix" "vex")
(set (attr "mode")
(cond [(and (match_test "<MODE>mode == QImode")
(not (match_test "TARGET_AVX512DQ")))
(const_string "HI")
]
(const_string "<MODE>")))])
;; %%% This used to optimize known byte-wide and operations to memory,
;; and sometimes to QImode registers. If this is considered useful,
@ -8278,14 +8305,22 @@
case 2:
return "and{l}\t{%k2, %k0|%k0, %k2}";
case 3:
return TARGET_AVX512DQ ? "kandb\t{%2, %1, %0|%0, %1, %2}"
: "kandw\t{%2, %1, %0|%0, %1, %2}";
if (get_attr_mode (insn) == MODE_HI)
return "kandw\t{%2, %1, %0|%0, %1, %2}";
else
return "kandb\t{%2, %1, %0|%0, %1, %2}";
default:
gcc_unreachable ();
}
}
[(set_attr "type" "alu,alu,alu,msklog")
(set_attr "mode" "QI,QI,SI,HI")
(set (attr "mode")
(cond [(eq_attr "alternative" "2")
(const_string "SI")
(and (eq_attr "alternative" "3")
(not (match_test "TARGET_AVX512DQ")))
(const_string "HI")]
(const_string "QI")))
;; Potential partial reg stall on alternative 2.
(set (attr "preferred_for_speed")
(cond [(eq_attr "alternative" "2")
@ -8319,10 +8354,10 @@
case 1:
return "#";
case 2:
if (TARGET_AVX512DQ && <MODE>mode == QImode)
return "kandnb\t{%2, %1, %0|%0, %1, %2}";
else
if (get_attr_mode (insn) == MODE_HI)
return "kandnw\t{%2, %1, %0|%0, %1, %2}";
else
return "kandn<mskmodesuffix>\t{%2, %1, %0|%0, %1, %2}";
default:
gcc_unreachable ();
}
@ -8331,7 +8366,13 @@
(set_attr "type" "bitmanip,*,msklog")
(set_attr "prefix" "*,*,vex")
(set_attr "btver2_decode" "direct,*,*")
(set_attr "mode" "<MODE>")])
(set (attr "mode")
(cond [(and (eq_attr "alternative" "2")
(and (match_test "<MODE>mode == QImode")
(not (match_test "TARGET_AVX512DQ"))))
(const_string "HI")
]
(const_string "<MODE>")))])
(define_split
[(set (match_operand:SWI12 0 "general_reg_operand")
@ -8843,36 +8884,31 @@
(set_attr "mode" "<MODE>")])
(define_insn "kxnor<mode>"
[(set (match_operand:SWI12 0 "register_operand" "=r,!k")
(not:SWI12
(xor:SWI12
(match_operand:SWI12 1 "register_operand" "0,k")
(match_operand:SWI12 2 "register_operand" "r,k"))))
[(set (match_operand:SWI1248_AVX512BW 0 "register_operand" "=r,!k")
(not:SWI1248_AVX512BW
(xor:SWI1248_AVX512BW
(match_operand:SWI1248_AVX512BW 1 "register_operand" "0,k")
(match_operand:SWI1248_AVX512BW 2 "register_operand" "r,k"))))
(clobber (reg:CC FLAGS_REG))]
"TARGET_AVX512F"
{
if (which_alternative == 1 && <MODE>mode == QImode && TARGET_AVX512DQ)
return "kxnorb\t{%2, %1, %0|%0, %1, %2}";
return "kxnorw\t{%2, %1, %0|%0, %1, %2}";
if (which_alternative == 0)
return "#";
if (get_attr_mode (insn) == MODE_HI)
return "kxnorw\t{%2, %1, %0|%0, %1, %2}";
else
return "kxnor<mskmodesuffix>\t{%2, %1, %0|%0, %1, %2}";
}
[(set_attr "type" "*,msklog")
(set_attr "prefix" "*,vex")
(set_attr "mode" "<MODE>")])
(define_insn "kxnor<mode>"
[(set (match_operand:SWI48x 0 "register_operand" "=r,!k")
(not:SWI48x
(xor:SWI48x
(match_operand:SWI48x 1 "register_operand" "0,k")
(match_operand:SWI48x 2 "register_operand" "r,k"))))
(clobber (reg:CC FLAGS_REG))]
"TARGET_AVX512BW"
"@
#
kxnor<mskmodesuffix>\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "type" "*,msklog")
(set_attr "prefix" "*,vex")
(set_attr "mode" "<MODE>")])
(set (attr "mode")
(cond [(and (eq_attr "alternative" "1")
(and (match_test "<MODE>mode == QImode")
(not (match_test "TARGET_AVX512DQ"))))
(const_string "HI")
]
(const_string "<MODE>")))])
(define_split
[(set (match_operand:SWI1248x 0 "general_reg_operand")
@ -9583,9 +9619,10 @@
case 1:
return "not{l}\t%k0";
case 2:
if (TARGET_AVX512DQ)
if (get_attr_mode (insn) == MODE_HI)
return "knotw\t{%1, %0|%0, %1}";
else
return "knotb\t{%1, %0|%0, %1}";
return "knotw\t{%1, %0|%0, %1}";
default:
gcc_unreachable ();
}
@ -9593,7 +9630,13 @@
[(set_attr "isa" "*,*,avx512f")
(set_attr "type" "negnot,negnot,msklog")
(set_attr "prefix" "*,*,vex")
(set_attr "mode" "QI,SI,QI")
(set (attr "mode")
(cond [(eq_attr "alternative" "1")
(const_string "SI")
(and (eq_attr "alternative" "2")
(not (match_test "TARGET_AVX512DQ")))
(const_string "HI")]
(const_string "QI")))
;; Potential partial reg stall on alternative 1.
(set (attr "preferred_for_speed")
(cond [(eq_attr "alternative" "1")