h8300.c (output_logical_op): Optimize or.l when ORing with 0xffff??00 with the highest bit of the ?? part set.
* config/h8300/h8300.c (output_logical_op): Optimize or.l when ORing with 0xffff??00 with the highest bit of the ?? part set. (compute_logical_op_length): Update. (compute_logical_op_cc): Likewise. From-SVN: r63131
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@ -1,3 +1,10 @@
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2003-02-19 Kazu Hirata <kazu@cs.umass.edu>
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* config/h8300/h8300.c (output_logical_op): Optimize or.l when
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ORing with 0xffff??00 with the highest bit of the ?? part set.
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(compute_logical_op_length): Update.
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(compute_logical_op_cc): Likewise.
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2003-02-19 Josef Zlomek <zlomekj@suse.cz>
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* bb-reorder.c (find_traces_1_round): Fixed condition for small
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@ -2206,7 +2206,9 @@ output_logical_op (mode, operands)
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using multiple insns. */
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if ((TARGET_H8300H || TARGET_H8300S)
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&& w0 != 0 && w1 != 0
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&& !(lower_half_easy_p && upper_half_easy_p))
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&& !(lower_half_easy_p && upper_half_easy_p)
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&& !(code == IOR && w1 == 0xffff
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&& (w0 & 0x8000) != 0 && lower_half_easy_p))
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{
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sprintf (insn_buf, "%s.l\t%%S2,%%S0", opname);
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output_asm_insn (insn_buf, operands);
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@ -2250,6 +2252,13 @@ output_logical_op (mode, operands)
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output_asm_insn ((code == AND)
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? "sub.w\t%e0,%e0" : "not.w\t%e0",
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operands);
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else if ((TARGET_H8300H || TARGET_H8300S)
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&& code == IOR
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&& w1 == 0xffff
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&& (w0 & 0x8000) != 0)
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{
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output_asm_insn ("exts.l\t%S0", operands);
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}
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else if ((TARGET_H8300H || TARGET_H8300S)
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&& code == AND
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&& w1 == 0xff00)
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@ -2354,7 +2363,9 @@ compute_logical_op_length (mode, operands)
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using multiple insns. */
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if ((TARGET_H8300H || TARGET_H8300S)
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&& w0 != 0 && w1 != 0
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&& !(lower_half_easy_p && upper_half_easy_p))
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&& !(lower_half_easy_p && upper_half_easy_p)
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&& !(code == IOR && w1 == 0xffff
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&& (w0 & 0x8000) != 0 && lower_half_easy_p))
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{
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if (REG_P (operands[2]))
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length += 4;
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@ -2394,6 +2405,13 @@ compute_logical_op_length (mode, operands)
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{
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length += 2;
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}
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else if ((TARGET_H8300H || TARGET_H8300S)
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&& code == IOR
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&& w1 == 0xffff
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&& (w0 & 0x8000) != 0)
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{
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length += 2;
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}
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else if ((TARGET_H8300H || TARGET_H8300S)
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&& code == AND
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&& w1 == 0xff00)
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@ -2475,10 +2493,22 @@ compute_logical_op_cc (mode, operands)
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using multiple insns. */
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if ((TARGET_H8300H || TARGET_H8300S)
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&& w0 != 0 && w1 != 0
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&& !(lower_half_easy_p && upper_half_easy_p))
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&& !(lower_half_easy_p && upper_half_easy_p)
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&& !(code == IOR && w1 == 0xffff
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&& (w0 & 0x8000) != 0 && lower_half_easy_p))
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{
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cc = CC_SET_ZNV;
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}
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else
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{
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if ((TARGET_H8300H || TARGET_H8300S)
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&& code == IOR
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&& w1 == 0xffff
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&& (w0 & 0x8000) != 0)
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{
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cc = CC_SET_ZNV;
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}
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}
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break;
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default:
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abort ();
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