re PR rtl-optimization/60651 (Mode switching instructions are sometimes emitted in the wrong order)
gcc: PR rtl-optimization/60651 * mode-switching.c (optimize_mode_switching): Make sure to emit sets of a lower numbered entity before sets of a higher numbered entity to a mode of the same or lower priority. When creating a seginfo for a basic block that starts with a code label, move the insertion point past the code label. (new_seginfo): Document and enforce requirement that NOTE_INSN_BASIC_BLOCK only appears for empty blocks. * doc/tm.texi.in: Document ordering constraint for emitted mode sets. * doc/tm.texi: Regenerate. gcc/testsuite: PR rtl-optimization/60651 * gcc.target/epiphany/mode-switch.c: New test. From-SVN: r209312
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@ -1,3 +1,16 @@
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2014-04-11 Joern Rennecke <joern.rennecke@embecosm.com>
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PR rtl-optimization/60651
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* mode-switching.c (optimize_mode_switching): Make sure to emit
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sets of a lower numbered entity before sets of a higher numbered
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entity to a mode of the same or lower priority.
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When creating a seginfo for a basic block that starts with a code
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label, move the insertion point past the code label.
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(new_seginfo): Document and enforce requirement that
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NOTE_INSN_BASIC_BLOCK only appears for empty blocks.
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* doc/tm.texi.in: Document ordering constraint for emitted mode sets.
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* doc/tm.texi: Regenerate.
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2014-01-11 Joern Rennecke <joern.rennecke@embecosm.com>
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PR target/60811
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@ -9778,6 +9778,8 @@ for @var{entity}. For any fixed @var{entity}, @code{mode_priority_to_mode}
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Generate one or more insns to set @var{entity} to @var{mode}.
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@var{hard_reg_live} is the set of hard registers live at the point where
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the insn(s) are to be inserted.
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Sets of a lower numbered entity will be emitted before sets of a higher
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numbered entity to a mode of the same or lower priority.
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@end defmac
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@node Target Attributes
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@ -7447,6 +7447,8 @@ for @var{entity}. For any fixed @var{entity}, @code{mode_priority_to_mode}
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Generate one or more insns to set @var{entity} to @var{mode}.
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@var{hard_reg_live} is the set of hard registers live at the point where
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the insn(s) are to be inserted.
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Sets of a lower numbered entity will be emitted before sets of a higher
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numbered entity to a mode of the same or lower priority.
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@end defmac
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@node Target Attributes
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@ -96,12 +96,18 @@ static void make_preds_opaque (basic_block, int);
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/* This function will allocate a new BBINFO structure, initialized
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with the MODE, INSN, and basic block BB parameters. */
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with the MODE, INSN, and basic block BB parameters.
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INSN may not be a NOTE_INSN_BASIC_BLOCK, unless it is an empty
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basic block; that allows us later to insert instructions in a FIFO-like
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manner. */
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static struct seginfo *
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new_seginfo (int mode, rtx insn, int bb, HARD_REG_SET regs_live)
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{
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struct seginfo *ptr;
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gcc_assert (!NOTE_INSN_BASIC_BLOCK_P (insn)
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|| insn == BB_END (NOTE_BASIC_BLOCK (insn)));
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ptr = XNEW (struct seginfo);
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ptr->mode = mode;
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ptr->insn_ptr = insn;
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@ -534,7 +540,13 @@ optimize_mode_switching (void)
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break;
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if (e)
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{
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ptr = new_seginfo (no_mode, BB_HEAD (bb), bb->index, live_now);
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rtx ins_pos = BB_HEAD (bb);
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if (LABEL_P (ins_pos))
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ins_pos = NEXT_INSN (ins_pos);
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gcc_assert (NOTE_INSN_BASIC_BLOCK_P (ins_pos));
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if (ins_pos != BB_END (bb))
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ins_pos = NEXT_INSN (ins_pos);
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ptr = new_seginfo (no_mode, ins_pos, bb->index, live_now);
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add_seginfo (info + bb->index, ptr);
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bitmap_clear_bit (transp[bb->index], j);
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}
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@ -733,7 +745,15 @@ optimize_mode_switching (void)
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{
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emitted = true;
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if (NOTE_INSN_BASIC_BLOCK_P (ptr->insn_ptr))
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emit_insn_after (mode_set, ptr->insn_ptr);
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/* We need to emit the insns in a FIFO-like manner,
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i.e. the first to be emitted at our insertion
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point ends up first in the instruction steam.
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Because we made sure that NOTE_INSN_BASIC_BLOCK is
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only used for initially empty basic blocks, we
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can archive this by appending at the end of
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the block. */
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emit_insn_after
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(mode_set, BB_END (NOTE_BASIC_BLOCK (ptr->insn_ptr)));
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else
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emit_insn_before (mode_set, ptr->insn_ptr);
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}
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@ -1,3 +1,8 @@
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2014-04-11 Joern Rennecke <joern.rennecke@embecosm.com>
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PR rtl-optimization/60651
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* gcc.target/epiphany/mode-switch.c: New test.
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2014-04-11 Paolo Carlini <paolo.carlini@oracle.com>
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PR c++/58600
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