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This patch updates ldm_stm_operation_p to check for loads that if SP is in the register list... 

This patch updates ldm_stm_operation_p to check for loads that if SP is in
the register list, then the base register is SP. It guarantees that SP is
reset correctly when an LDM instruction is interrupted. Otherwise, we might
end up with a corrupt stack. 

gcc/

2012-06-18  Greta Yorsh  <greta.yorsh@arm.com>

	* config/arm/arm.c (ldm_stm_operation_p): Require SP
        as base register for loads if SP is in the register list.

From-SVN: r188738
This commit is contained in:
Greta Yorsh 2012-06-18 18:06:35 +01:00 committed by Greta Yorsh
parent 9ef7adc086
commit 474038cda9
2 changed files with 15 additions and 0 deletions
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5
gcc/ChangeLog
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@ -1,3 +1,8 @@
2012-06-18 Greta Yorsh <Greta.Yorsh@arm.com>
* config/arm/arm.c (ldm_stm_operation_p): Require SP
as base register for loads if SP is in the register list.
2012-06-18 Richard Guenther <rguenther@suse.de>
PR tree-optimization/53693

10
gcc/config/arm/arm.c
View File

@ -10080,6 +10080,12 @@ ldm_stm_operation_p (rtx op, bool load, enum machine_mode mode,
if (!REG_P (addr))
return false;
/* Don't allow SP to be loaded unless it is also the base register. It
guarantees that SP is reset correctly when an LDM instruction
is interruptted. Otherwise, we might end up with a corrupt stack. */
if (load && (REGNO (reg) == SP_REGNUM) && (REGNO (addr) != SP_REGNUM))
return false;
for (; i < count; i++)
{
elt = XVECEXP (op, 0, i);
@ -10103,6 +10109,10 @@ ldm_stm_operation_p (rtx op, bool load, enum machine_mode mode,
|| (consecutive
&& (REGNO (reg) !=
(unsigned int) (first_regno + regs_per_val * (i - base))))
/* Don't allow SP to be loaded unless it is also the base register. It
guarantees that SP is reset correctly when an LDM instruction
is interrupted. Otherwise, we might end up with a corrupt stack. */
|| (load && (REGNO (reg) == SP_REGNUM) && (REGNO (addr) != SP_REGNUM))
|| !MEM_P (mem)
|| GET_MODE (mem) != mode
|| ((GET_CODE (XEXP (mem, 0)) != PLUS