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m68k.c (m68k_initial_elimination_offset): Use gcc_assert and gcc_unreachable as appropriate. 

* config/m68k/m68k.c (m68k_initial_elimination_offset): Use
	gcc_assert and gcc_unreachable as appropriate.
	(output_dbcc_and_branch, output_scc_di, legitimize_pic_address,
	const_int_cost, output_move_const_into_data_reg,
	output_move_qimode, output_move_double, find_addr_reg,
	print_operand, print_operand_address): Likewise.
	* config/m68k/m68k.md (adddi3, subdi3, negsf2, negdf2, abssf2,
	absdf2, sordered, sunordered, suneq, sunge, sungt, sunle, sunlt,
	sltgt, bordered, bunordered, buneq, bunge, bungt, bunle, bunlt,
	bltgt, *bordered_rev, *bunordered_rev, *buneq_rev, *bunge_rev,
	*bunle_rev, *bunlt_rev, *bltgt_rev, negxf2, absxf2,
	conditional_trap): Likewise.
	* config/m68k/m68kelf.h (ASM_OUTPUT_ALIGN): Remove unreachable code.

From-SVN: r98981
This commit is contained in:
Nathan Sidwell 2005-04-29 10:01:52 +00:00 committed by Nathan Sidwell
parent 4c1f4f52ed
commit 4761e3882f
4 changed files with 103 additions and 134 deletions
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16
gcc/ChangeLog
View File

@ -1,3 +1,19 @@
2005-04-29 Nathan Sidwell <nathan@codesourcery.com>
* config/m68k/m68k.c (m68k_initial_elimination_offset): Use
gcc_assert and gcc_unreachable as appropriate.
(output_dbcc_and_branch, output_scc_di, legitimize_pic_address,
const_int_cost, output_move_const_into_data_reg,
output_move_qimode, output_move_double, find_addr_reg,
print_operand, print_operand_address): Likewise.
* config/m68k/m68k.md (adddi3, subdi3, negsf2, negdf2, abssf2,
absdf2, sordered, sunordered, suneq, sunge, sungt, sunle, sunlt,
sltgt, bordered, bunordered, buneq, bunge, bungt, bunle, bunlt,
bltgt, *bordered_rev, *bunordered_rev, *buneq_rev, *bunge_rev,
*bunle_rev, *bunlt_rev, *bltgt_rev, negxf2, absxf2,
conditional_trap): Likewise.
* config/m68k/m68kelf.h (ASM_OUTPUT_ALIGN): Remove unreachable code.
2005-04-29 Nathan Sidwell <nathan@codesourcery.com> 2005-04-29 Nathan Sidwell <nathan@codesourcery.com>
* config/xtensa/xtensa.c (gen_int_relational): Use gcc_assert and * config/xtensa/xtensa.c (gen_int_relational): Use gcc_assert and

118
gcc/config/m68k/m68k.c
View File

@ -442,12 +442,17 @@ m68k_initial_elimination_offset (int from, int to)
m68k_compute_frame_layout (); m68k_compute_frame_layout ();
if (from == ARG_POINTER_REGNUM && to == STACK_POINTER_REGNUM) gcc_assert (to == STACK_POINTER_REGNUM);
return current_frame.offset + current_frame.size + (frame_pointer_needed ? -UNITS_PER_WORD * 2 : -UNITS_PER_WORD); switch (from)
else if (from == FRAME_POINTER_REGNUM && to == STACK_POINTER_REGNUM) {
return current_frame.offset + current_frame.size; case ARG_POINTER_REGNUM:
return current_frame.offset + current_frame.size
abort(); + (frame_pointer_needed ? -UNITS_PER_WORD * 2 : -UNITS_PER_WORD);
case FRAME_POINTER_REGNUM:
return current_frame.offset + current_frame.size;
default:
gcc_unreachable ();
}
} }
/* Refer to the array `regs_ever_live' to determine which registers /* Refer to the array `regs_ever_live' to determine which registers
@ -1147,7 +1152,7 @@ output_dbcc_and_branch (rtx *operands)
break; break;
default: default:
abort (); gcc_unreachable ();
} }
/* If the decrement is to be done in SImode, then we have /* If the decrement is to be done in SImode, then we have
@ -1165,12 +1170,12 @@ output_dbcc_and_branch (rtx *operands)
break; break;
default: default:
abort (); gcc_unreachable ();
} }
} }
const char * const char *
output_scc_di(rtx op, rtx operand1, rtx operand2, rtx dest) output_scc_di (rtx op, rtx operand1, rtx operand2, rtx dest)
{ {
rtx loperands[7]; rtx loperands[7];
enum rtx_code op_code = GET_CODE (op); enum rtx_code op_code = GET_CODE (op);
@ -1320,7 +1325,7 @@ output_scc_di(rtx op, rtx operand1, rtx operand2, rtx dest)
break; break;
default: default:
abort (); gcc_unreachable ();
} }
return ""; return "";
} }
@ -1413,8 +1418,7 @@ legitimize_pic_address (rtx orig, enum machine_mode mode ATTRIBUTE_UNUSED,
/* First handle a simple SYMBOL_REF or LABEL_REF */ /* First handle a simple SYMBOL_REF or LABEL_REF */
if (GET_CODE (orig) == SYMBOL_REF || GET_CODE (orig) == LABEL_REF) if (GET_CODE (orig) == SYMBOL_REF || GET_CODE (orig) == LABEL_REF)
{ {
if (reg == 0) gcc_assert (reg);
abort ();
pic_ref = gen_rtx_MEM (Pmode, pic_ref = gen_rtx_MEM (Pmode,
gen_rtx_PLUS (Pmode, gen_rtx_PLUS (Pmode,
@ -1433,17 +1437,14 @@ legitimize_pic_address (rtx orig, enum machine_mode mode ATTRIBUTE_UNUSED,
&& XEXP (XEXP (orig, 0), 0) == pic_offset_table_rtx) && XEXP (XEXP (orig, 0), 0) == pic_offset_table_rtx)
return orig; return orig;
if (reg == 0) gcc_assert (reg);
abort ();
/* legitimize both operands of the PLUS */ /* legitimize both operands of the PLUS */
if (GET_CODE (XEXP (orig, 0)) == PLUS) gcc_assert (GET_CODE (XEXP (orig, 0)) == PLUS);
{
base = legitimize_pic_address (XEXP (XEXP (orig, 0), 0), Pmode, reg); base = legitimize_pic_address (XEXP (XEXP (orig, 0), 0), Pmode, reg);
orig = legitimize_pic_address (XEXP (XEXP (orig, 0), 1), Pmode, orig = legitimize_pic_address (XEXP (XEXP (orig, 0), 1), Pmode,
base == reg ? 0 : reg); base == reg ? 0 : reg);
}
else abort ();
if (GET_CODE (orig) == CONST_INT) if (GET_CODE (orig) == CONST_INT)
return plus_constant (base, INTVAL (orig)); return plus_constant (base, INTVAL (orig));
@ -1523,7 +1524,7 @@ const_int_cost (rtx constant)
case MOVL : case MOVL :
return 2; return 2;
default : default :
abort (); gcc_unreachable ();
} }
} }
@ -1685,7 +1686,7 @@ output_move_const_into_data_reg (rtx *operands)
case MOVL : case MOVL :
return "move%.l %1,%0"; return "move%.l %1,%0";
default : default :
abort (); gcc_unreachable ();
} }
} }
@ -1819,13 +1820,13 @@ output_move_qimode (rtx *operands)
{ {
/* 68k family always modifies the stack pointer by at least 2, even for /* 68k family always modifies the stack pointer by at least 2, even for
byte pushes. The 5200 (ColdFire) does not do this. */ byte pushes. The 5200 (ColdFire) does not do this. */
if (GET_CODE (operands[0]) == MEM
&& GET_CODE (XEXP (operands[0], 0)) == PRE_DEC /* This case is generated by pushqi1 pattern now */
&& XEXP (XEXP (operands[0], 0), 0) == stack_pointer_rtx gcc_assert (!(GET_CODE (operands[0]) == MEM
&& ! ADDRESS_REG_P (operands[1]) && GET_CODE (XEXP (operands[0], 0)) == PRE_DEC
&& ! TARGET_COLDFIRE) && XEXP (XEXP (operands[0], 0), 0) == stack_pointer_rtx
/* generated by pushqi1 pattern now */ && ! ADDRESS_REG_P (operands[1])
abort (); && ! TARGET_COLDFIRE));
/* clr and st insns on 68000 read before writing. /* clr and st insns on 68000 read before writing.
This isn't so on the 68010, but we have no TARGET_68010. */ This isn't so on the 68010, but we have no TARGET_68010. */
@ -1947,12 +1948,10 @@ output_move_double (rtx *operands)
else else
optype1 = RNDOP; optype1 = RNDOP;
/* Check for the cases that the operand constraints are not /* Check for the cases that the operand constraints are not supposed
supposed to allow to happen. Abort if we get one, to allow to happen. Generating code for these cases is
because generating code for these cases is painful. */ painful. */
gcc_assert (optype0 != RNDOP && optype1 != RNDOP);
if (optype0 == RNDOP || optype1 == RNDOP)
abort ();
/* If one operand is decrementing and one is incrementing /* If one operand is decrementing and one is incrementing
decrement the former register explicitly decrement the former register explicitly
@ -2048,15 +2047,11 @@ output_move_double (rtx *operands)
middlehalf[1] = GEN_INT (l[1]); middlehalf[1] = GEN_INT (l[1]);
latehalf[1] = GEN_INT (l[2]); latehalf[1] = GEN_INT (l[2]);
} }
else if (CONSTANT_P (operands[1])) else
{ {
/* actually, no non-CONST_DOUBLE constant should ever /* No non-CONST_DOUBLE constant should ever appear
appear here. */ here. */
abort (); gcc_assert (!CONSTANT_P (operands[1]));
if (GET_CODE (operands[1]) == CONST_INT && INTVAL (operands[1]) < 0)
latehalf[1] = constm1_rtx;
else
latehalf[1] = const0_rtx;
} }
} }
else else
@ -2109,7 +2104,7 @@ output_move_double (rtx *operands)
/* If both halves of dest are used in the src memory address, /* If both halves of dest are used in the src memory address,
compute the address into latehalf of dest. compute the address into latehalf of dest.
Note that this can't happen if the dest is two data regs. */ Note that this can't happen if the dest is two data regs. */
compadr: compadr:
xops[0] = latehalf[0]; xops[0] = latehalf[0];
xops[1] = XEXP (operands[1], 0); xops[1] = XEXP (operands[1], 0);
output_asm_insn ("lea %a1,%0", xops); output_asm_insn ("lea %a1,%0", xops);
@ -2140,8 +2135,7 @@ compadr:
goto compadr; goto compadr;
/* JRV says this can't happen: */ /* JRV says this can't happen: */
if (addreg0 || addreg1) gcc_assert (!addreg0 && !addreg1);
abort ();
/* Only the middle reg conflicts; simply put it last. */ /* Only the middle reg conflicts; simply put it last. */
output_asm_insn (singlemove_string (operands), operands); output_asm_insn (singlemove_string (operands), operands);
@ -2267,11 +2261,10 @@ find_addr_reg (rtx addr)
else if (CONSTANT_P (XEXP (addr, 1))) else if (CONSTANT_P (XEXP (addr, 1)))
addr = XEXP (addr, 0); addr = XEXP (addr, 0);
else else
abort (); gcc_unreachable ();
} }
if (GET_CODE (addr) == REG) gcc_assert (GET_CODE (addr) == REG);
return addr; return addr;
abort ();
} }
/* Output assembler code to perform a 32-bit 3-operand add. */ /* Output assembler code to perform a 32-bit 3-operand add. */
@ -2667,9 +2660,9 @@ print_operand (FILE *file, rtx op, int letter)
else if (letter == 'o') else if (letter == 'o')
{ {
/* This is only for direct addresses with TARGET_PCREL */ /* This is only for direct addresses with TARGET_PCREL */
if (GET_CODE (op) != MEM || GET_CODE (XEXP (op, 0)) != SYMBOL_REF gcc_assert (GET_CODE (op) == MEM
|| !TARGET_PCREL) && GET_CODE (XEXP (op, 0)) == SYMBOL_REF
abort (); && TARGET_PCREL);
output_addr_const (file, XEXP (op, 0)); output_addr_const (file, XEXP (op, 0));
} }
else if (GET_CODE (op) == REG) else if (GET_CODE (op) == REG)
@ -2856,10 +2849,7 @@ print_operand_address (FILE *file, rtx addr)
#endif #endif
if (offset != 0) if (offset != 0)
{ {
if (addr != 0) gcc_assert (!addr);
{
abort ();
}
addr = offset; addr = offset;
} }
if ((reg1 && (GET_CODE (reg1) == SIGN_EXTEND if ((reg1 && (GET_CODE (reg1) == SIGN_EXTEND
@ -2914,14 +2904,10 @@ print_operand_address (FILE *file, rtx addr)
if (ireg != 0 || breg != 0) if (ireg != 0 || breg != 0)
{ {
int scale = 1; int scale = 1;
if (breg == 0)
{ gcc_assert (breg);
abort (); gcc_assert (flag_pic || !addr || GET_CODE (addr) != LABEL_REF);
}
if (! flag_pic && addr && GET_CODE (addr) == LABEL_REF)
{
abort ();
}
if (MOTOROLA) if (MOTOROLA)
{ {
if (addr != 0) if (addr != 0)

101
gcc/config/m68k/m68k.md
View File

@ -715,7 +715,7 @@
"!TARGET_COLDFIRE" "!TARGET_COLDFIRE"
"* return output_move_himode (operands);") "* return output_move_himode (operands);")
(define_insn "" (define_insn ""
[(set (match_operand:HI 0 "nonimmediate_operand" "=r<Q>,g,U") [(set (match_operand:HI 0 "nonimmediate_operand" "=r<Q>,g,U")
(match_operand:HI 1 "general_operand" "g,r<Q>,U"))] (match_operand:HI 1 "general_operand" "g,r<Q>,U"))]
"TARGET_COLDFIRE" "TARGET_COLDFIRE"
@ -1778,8 +1778,9 @@
return "add%.l %1,%R0\;addx%.l %3,%0"; return "add%.l %1,%R0\;addx%.l %3,%0";
} }
} }
else if (GET_CODE (operands[0]) == MEM) else
{ {
gcc_assert (GET_CODE (operands[0]) == MEM);
if (GET_CODE (operands[2]) == MEM if (GET_CODE (operands[2]) == MEM
&& GET_CODE (XEXP (operands[2], 0)) == PRE_DEC) && GET_CODE (XEXP (operands[2], 0)) == PRE_DEC)
return "add%.l %2,%0\;addx%.l %2,%0"; return "add%.l %2,%0\;addx%.l %2,%0";
@ -1801,8 +1802,6 @@
return "add%.l %R2,%1\;move%.l %0,%3\;addx%.l %2,%3\;move%.l %3,%0"; return "add%.l %R2,%1\;move%.l %0,%3\;addx%.l %2,%3\;move%.l %3,%0";
} }
} }
else
abort ();
}) })
(define_insn "addsi_lshrsi_31" (define_insn "addsi_lshrsi_31"
@ -2254,8 +2253,9 @@
return "sub%.l %1,%R0\;subx%.l %3,%0"; return "sub%.l %1,%R0\;subx%.l %3,%0";
} }
} }
else if (GET_CODE (operands[0]) == MEM) else
{ {
gcc_assert (GET_CODE (operands[0]) == MEM);
if (GET_CODE (operands[2]) == MEM if (GET_CODE (operands[2]) == MEM
&& GET_CODE (XEXP (operands[2], 0)) == PRE_DEC) && GET_CODE (XEXP (operands[2], 0)) == PRE_DEC)
return "sub%.l %2,%0\;subx%.l %2,%0"; return "sub%.l %2,%0\;subx%.l %2,%0";
@ -2277,8 +2277,6 @@
return "sub%.l %R2,%1\;move%.l %0,%3\;subx%.l %2,%3\;move%.l %3,%0"; return "sub%.l %R2,%1\;move%.l %0,%3\;subx%.l %2,%3\;move%.l %3,%0";
} }
} }
else
abort ();
}) })
(define_insn "subsi3" (define_insn "subsi3"
@ -3577,8 +3575,7 @@
result = expand_binop (SImode, xor_optab, result = expand_binop (SImode, xor_optab,
operand_subword_force (operands[1], 0, SFmode), operand_subword_force (operands[1], 0, SFmode),
GEN_INT (0x80000000), target, 0, OPTAB_WIDEN); GEN_INT (0x80000000), target, 0, OPTAB_WIDEN);
if (result == 0) gcc_assert (result);
abort ();
if (result != target) if (result != target)
emit_move_insn (result, target); emit_move_insn (result, target);
@ -3620,8 +3617,7 @@
result = expand_binop (SImode, xor_optab, result = expand_binop (SImode, xor_optab,
operand_subword_force (operands[1], 0, DFmode), operand_subword_force (operands[1], 0, DFmode),
GEN_INT (0x80000000), target, 0, OPTAB_WIDEN); GEN_INT (0x80000000), target, 0, OPTAB_WIDEN);
if (result == 0) gcc_assert (result);
abort ();
if (result != target) if (result != target)
emit_move_insn (result, target); emit_move_insn (result, target);
@ -3693,8 +3689,7 @@
result = expand_binop (SImode, and_optab, result = expand_binop (SImode, and_optab,
operand_subword_force (operands[1], 0, SFmode), operand_subword_force (operands[1], 0, SFmode),
GEN_INT (0x7fffffff), target, 0, OPTAB_WIDEN); GEN_INT (0x7fffffff), target, 0, OPTAB_WIDEN);
if (result == 0) gcc_assert (result);
abort ();
if (result != target) if (result != target)
emit_move_insn (result, target); emit_move_insn (result, target);
@ -3731,8 +3726,7 @@
result = expand_binop (SImode, and_optab, result = expand_binop (SImode, and_optab,
operand_subword_force (operands[1], 0, DFmode), operand_subword_force (operands[1], 0, DFmode),
GEN_INT (0x7fffffff), target, 0, OPTAB_WIDEN); GEN_INT (0x7fffffff), target, 0, OPTAB_WIDEN);
if (result == 0) gcc_assert (result);
abort ();
if (result != target) if (result != target)
emit_move_insn (result, target); emit_move_insn (result, target);
@ -5165,8 +5159,7 @@
(ordered:QI (cc0) (const_int 0)))] (ordered:QI (cc0) (const_int 0)))]
"TARGET_68881 && !TARGET_68060" "TARGET_68881 && !TARGET_68060"
{ {
if (! m68k_last_compare_had_fp_operands) gcc_assert (m68k_last_compare_had_fp_operands);
abort ();
m68k_last_compare_had_fp_operands = 0; m68k_last_compare_had_fp_operands = 0;
}) })
@ -5184,8 +5177,7 @@
(unordered:QI (cc0) (const_int 0)))] (unordered:QI (cc0) (const_int 0)))]
"TARGET_68881 && !TARGET_68060" "TARGET_68881 && !TARGET_68060"
{ {
if (! m68k_last_compare_had_fp_operands) gcc_assert (m68k_last_compare_had_fp_operands);
abort ();
m68k_last_compare_had_fp_operands = 0; m68k_last_compare_had_fp_operands = 0;
}) })
@ -5203,8 +5195,7 @@
(uneq:QI (cc0) (const_int 0)))] (uneq:QI (cc0) (const_int 0)))]
"TARGET_68881 && !TARGET_68060" "TARGET_68881 && !TARGET_68060"
{ {
if (! m68k_last_compare_had_fp_operands) gcc_assert (m68k_last_compare_had_fp_operands);
abort ();
m68k_last_compare_had_fp_operands = 0; m68k_last_compare_had_fp_operands = 0;
}) })
@ -5222,8 +5213,7 @@
(unge:QI (cc0) (const_int 0)))] (unge:QI (cc0) (const_int 0)))]
"TARGET_68881 && !TARGET_68060" "TARGET_68881 && !TARGET_68060"
{ {
if (! m68k_last_compare_had_fp_operands) gcc_assert (m68k_last_compare_had_fp_operands);
abort ();
m68k_last_compare_had_fp_operands = 0; m68k_last_compare_had_fp_operands = 0;
}) })
@ -5241,8 +5231,7 @@
(ungt:QI (cc0) (const_int 0)))] (ungt:QI (cc0) (const_int 0)))]
"TARGET_68881 && !TARGET_68060" "TARGET_68881 && !TARGET_68060"
{ {
if (! m68k_last_compare_had_fp_operands) gcc_assert (m68k_last_compare_had_fp_operands);
abort ();
m68k_last_compare_had_fp_operands = 0; m68k_last_compare_had_fp_operands = 0;
}) })
@ -5260,8 +5249,7 @@
(unle:QI (cc0) (const_int 0)))] (unle:QI (cc0) (const_int 0)))]
"TARGET_68881 && !TARGET_68060" "TARGET_68881 && !TARGET_68060"
{ {
if (! m68k_last_compare_had_fp_operands) gcc_assert (m68k_last_compare_had_fp_operands);
abort ();
m68k_last_compare_had_fp_operands = 0; m68k_last_compare_had_fp_operands = 0;
}) })
@ -5279,8 +5267,7 @@
(unlt:QI (cc0) (const_int 0)))] (unlt:QI (cc0) (const_int 0)))]
"TARGET_68881 && !TARGET_68060" "TARGET_68881 && !TARGET_68060"
{ {
if (! m68k_last_compare_had_fp_operands) gcc_assert (m68k_last_compare_had_fp_operands);
abort ();
m68k_last_compare_had_fp_operands = 0; m68k_last_compare_had_fp_operands = 0;
}) })
@ -5298,8 +5285,7 @@
(ltgt:QI (cc0) (const_int 0)))] (ltgt:QI (cc0) (const_int 0)))]
"TARGET_68881 && !TARGET_68060" "TARGET_68881 && !TARGET_68060"
{ {
if (! m68k_last_compare_had_fp_operands) gcc_assert (m68k_last_compare_had_fp_operands);
abort ();
m68k_last_compare_had_fp_operands = 0; m68k_last_compare_had_fp_operands = 0;
}) })
@ -5689,8 +5675,7 @@
(pc)))] (pc)))]
"TARGET_68881" "TARGET_68881"
{ {
if (!(cc_prev_status.flags & CC_IN_68881)) gcc_assert (cc_prev_status.flags & CC_IN_68881);
abort ();
return MOTOROLA ? "fbor %l0" : "fjor %l0"; return MOTOROLA ? "fbor %l0" : "fjor %l0";
}) })
@ -5701,8 +5686,7 @@
(pc)))] (pc)))]
"TARGET_68881" "TARGET_68881"
{ {
if (!(cc_prev_status.flags & CC_IN_68881)) gcc_assert (cc_prev_status.flags & CC_IN_68881);
abort ();
return MOTOROLA ? "fbun %l0" : "fjun %l0"; return MOTOROLA ? "fbun %l0" : "fjun %l0";
}) })
@ -5713,8 +5697,7 @@
(pc)))] (pc)))]
"TARGET_68881" "TARGET_68881"
{ {
if (!(cc_prev_status.flags & CC_IN_68881)) gcc_assert (cc_prev_status.flags & CC_IN_68881);
abort ();
return MOTOROLA ? "fbueq %l0" : "fjueq %l0"; return MOTOROLA ? "fbueq %l0" : "fjueq %l0";
}) })
@ -5725,8 +5708,7 @@
(pc)))] (pc)))]
"TARGET_68881" "TARGET_68881"
{ {
if (!(cc_prev_status.flags & CC_IN_68881)) gcc_assert (cc_prev_status.flags & CC_IN_68881);
abort ();
return MOTOROLA ? "fbuge %l0" : "fjuge %l0"; return MOTOROLA ? "fbuge %l0" : "fjuge %l0";
}) })
@ -5737,8 +5719,7 @@
(pc)))] (pc)))]
"TARGET_68881" "TARGET_68881"
{ {
if (!(cc_prev_status.flags & CC_IN_68881)) gcc_assert (cc_prev_status.flags & CC_IN_68881);
abort ();
return MOTOROLA ? "fbugt %l0" : "fjugt %l0"; return MOTOROLA ? "fbugt %l0" : "fjugt %l0";
}) })
@ -5749,8 +5730,7 @@
(pc)))] (pc)))]
"TARGET_68881" "TARGET_68881"
{ {
if (!(cc_prev_status.flags & CC_IN_68881)) gcc_assert (cc_prev_status.flags & CC_IN_68881);
abort ();
return MOTOROLA ? "fbule %l0" : "fjule %l0"; return MOTOROLA ? "fbule %l0" : "fjule %l0";
}) })
@ -5761,8 +5741,7 @@
(pc)))] (pc)))]
"TARGET_68881" "TARGET_68881"
{ {
if (!(cc_prev_status.flags & CC_IN_68881)) gcc_assert (cc_prev_status.flags & CC_IN_68881);
abort ();
return MOTOROLA ? "fbult %l0" : "fjult %l0"; return MOTOROLA ? "fbult %l0" : "fjult %l0";
}) })
@ -5773,8 +5752,7 @@
(pc)))] (pc)))]
"TARGET_68881" "TARGET_68881"
{ {
if (!(cc_prev_status.flags & CC_IN_68881)) gcc_assert (cc_prev_status.flags & CC_IN_68881);
abort ();
return MOTOROLA ? "fbogl %l0" : "fjogl %l0"; return MOTOROLA ? "fbogl %l0" : "fjogl %l0";
}) })
@ -5915,8 +5893,7 @@
(label_ref (match_operand 0 "" ""))))] (label_ref (match_operand 0 "" ""))))]
"TARGET_68881" "TARGET_68881"
{ {
if (!(cc_prev_status.flags & CC_IN_68881)) gcc_assert (cc_prev_status.flags & CC_IN_68881);
abort ();
return MOTOROLA ? "fbun %l0" : "fjun %l0"; return MOTOROLA ? "fbun %l0" : "fjun %l0";
}) })
@ -5927,8 +5904,7 @@
(label_ref (match_operand 0 "" ""))))] (label_ref (match_operand 0 "" ""))))]
"TARGET_68881" "TARGET_68881"
{ {
if (!(cc_prev_status.flags & CC_IN_68881)) gcc_assert (cc_prev_status.flags & CC_IN_68881);
abort ();
return MOTOROLA ? "fbor %l0" : "fjor %l0"; return MOTOROLA ? "fbor %l0" : "fjor %l0";
}) })
@ -5939,8 +5915,7 @@
(label_ref (match_operand 0 "" ""))))] (label_ref (match_operand 0 "" ""))))]
"TARGET_68881" "TARGET_68881"
{ {
if (!(cc_prev_status.flags & CC_IN_68881)) gcc_assert (cc_prev_status.flags & CC_IN_68881);
abort ();
return MOTOROLA ? "fbogl %l0" : "fjogl %l0"; return MOTOROLA ? "fbogl %l0" : "fjogl %l0";
}) })
@ -5951,8 +5926,7 @@
(label_ref (match_operand 0 "" ""))))] (label_ref (match_operand 0 "" ""))))]
"TARGET_68881" "TARGET_68881"
{ {
if (!(cc_prev_status.flags & CC_IN_68881)) gcc_assert (cc_prev_status.flags & CC_IN_68881);
abort ();
return MOTOROLA ? "fbolt %l0" : "fjolt %l0"; return MOTOROLA ? "fbolt %l0" : "fjolt %l0";
}) })
@ -5963,8 +5937,7 @@
(label_ref (match_operand 0 "" ""))))] (label_ref (match_operand 0 "" ""))))]
"TARGET_68881" "TARGET_68881"
{ {
if (!(cc_prev_status.flags & CC_IN_68881)) gcc_assert (cc_prev_status.flags & CC_IN_68881);
abort ();
return MOTOROLA ? "fbogt %l0" : "fjogt %l0"; return MOTOROLA ? "fbogt %l0" : "fjogt %l0";
}) })
@ -5975,8 +5948,7 @@
(label_ref (match_operand 0 "" ""))))] (label_ref (match_operand 0 "" ""))))]
"TARGET_68881" "TARGET_68881"
{ {
if (!(cc_prev_status.flags & CC_IN_68881)) gcc_assert (cc_prev_status.flags & CC_IN_68881);
abort ();
return MOTOROLA ? "fboge %l0" : "fjoge %l0"; return MOTOROLA ? "fboge %l0" : "fjoge %l0";
}) })
@ -5987,8 +5959,7 @@
(label_ref (match_operand 0 "" ""))))] (label_ref (match_operand 0 "" ""))))]
"TARGET_68881" "TARGET_68881"
{ {
if (!(cc_prev_status.flags & CC_IN_68881)) gcc_assert (cc_prev_status.flags & CC_IN_68881);
abort ();
return MOTOROLA ? "fbueq %l0" : "fjueq %l0"; return MOTOROLA ? "fbueq %l0" : "fjueq %l0";
}) })
@ -6947,8 +6918,7 @@
result = expand_binop (SImode, xor_optab, result = expand_binop (SImode, xor_optab,
operand_subword_force (operands[1], 0, XFmode), operand_subword_force (operands[1], 0, XFmode),
GEN_INT (0x80000000), target, 0, OPTAB_WIDEN); GEN_INT (0x80000000), target, 0, OPTAB_WIDEN);
if (result == 0) gcc_assert (result);
abort ();
if (result != target) if (result != target)
emit_move_insn (result, target); emit_move_insn (result, target);
@ -6992,8 +6962,7 @@
result = expand_binop (SImode, and_optab, result = expand_binop (SImode, and_optab,
operand_subword_force (operands[1], 0, XFmode), operand_subword_force (operands[1], 0, XFmode),
GEN_INT (0x7fffffff), target, 0, OPTAB_WIDEN); GEN_INT (0x7fffffff), target, 0, OPTAB_WIDEN);
if (result == 0) gcc_assert (result);
abort ();
if (result != target) if (result != target)
emit_move_insn (result, target); emit_move_insn (result, target);
@ -7106,6 +7075,6 @@
case GEU: return "trapcc"; case GEU: return "trapcc";
case LE: return "traple"; case LE: return "traple";
case LEU: return "trapls"; case LEU: return "trapls";
default: abort(); default: gcc_unreachable ();
} }
}) })

2
gcc/config/m68k/m68kelf.h
View File

@ -86,8 +86,6 @@ Boston, MA 02111-1307, USA. */
do { \ do { \
if ((LOG) > 0) \ if ((LOG) > 0) \
fprintf ((FILE), "%s%u\n", ALIGN_ASM_OP, 1 << (LOG)); \ fprintf ((FILE), "%s%u\n", ALIGN_ASM_OP, 1 << (LOG)); \
else if ((LOG) > 31) \
abort (); \
} while (0) } while (0)
/* Use proper assembler syntax for these macros. */ /* Use proper assembler syntax for these macros. */