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sh.h (FIRST_GENERAL_REG, [...]): New. 

* config/sh/sh.h (FIRST_GENERAL_REG, LAST_GENERAL_REG): New.
Moved most register-number #defines...
* config/sh/sh.md (define_constants): ... here.  Use macros to
refer to registers and unspecs.
* config/sh/sh.c: Likewise.

From-SVN: r37683
This commit is contained in:
Alexandre Oliva 2000-11-23 04:22:48 +00:00 committed by Alexandre Oliva
parent 27ddcd48c1
commit 4773afa487
4 changed files with 574 additions and 442 deletions
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8
gcc/ChangeLog
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@ -1,3 +1,11 @@
Thu Nov 23 02:09:09 2000 Alexandre Oliva <aoliva@redhat.com>
* config/sh/sh.h (FIRST_GENERAL_REG, LAST_GENERAL_REG): New.
Moved most register-number #defines...
* config/sh/sh.md (define_constants): ... here. Use macros to
refer to registers and unspecs.
* config/sh/sh.c: Likewise.
Thu Nov 23 01:01:32 2000 J"orn Rennecke <amylaar@redhat.com>
* Makefile.in (HOST_CFLAGS): Add -DGENERATOR_FILE.

20
gcc/config/sh/sh.c
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@ -598,7 +598,7 @@ from_compare (operands, code)
}
else
insn = gen_rtx_SET (VOIDmode,
gen_rtx_REG (SImode, 18),
gen_rtx_REG (SImode, T_REG),
gen_rtx (code, SImode, sh_compare_op0,
sh_compare_op1));
if (TARGET_SH4 && GET_MODE_CLASS (mode) == MODE_FLOAT)
@ -1596,7 +1596,7 @@ gen_shl_and (dest, left_rtx, mask_rtx, source)
(match_operand:SI 2 "const_int_operand" "n")
(match_operand:SI 3 "const_int_operand" "n")
(const_int 0)))
(clobber (reg:SI 18))]
(clobber (reg:SI T_REG))]
LEFT_RTX is operand 2 in the above pattern, and SIZE_RTX is operand 3.
return 0 for simple left / right shift combination.
return 1 for left shift / 8 bit sign extend / left shift.
@ -2097,7 +2097,7 @@ mova_p (insn)
return (GET_CODE (insn) == INSN
&& GET_CODE (PATTERN (insn)) == SET
&& GET_CODE (SET_SRC (PATTERN (insn))) == UNSPEC
&& XINT (SET_SRC (PATTERN (insn)), 1) == 1);
&& XINT (SET_SRC (PATTERN (insn)), 1) == UNSPEC_MOVA);
}
/* Find the last barrier from insn FROM which is close enough to hold the
@ -2786,7 +2786,7 @@ barrier_align (barrier_or_label)
if (GET_CODE (pat) == ADDR_DIFF_VEC)
return 2;
if (GET_CODE (pat) == UNSPEC_VOLATILE && XINT (pat, 1) == 1)
if (GET_CODE (pat) == UNSPEC_VOLATILE && XINT (pat, 1) == UNSPECV_ALIGN)
/* This is a barrier in front of a constant table. */
return 0;
@ -3282,7 +3282,7 @@ machine_dependent_reorg (first)
/* This is a mova needing a label. Create it. */
else if (GET_CODE (src) == CONST
&& GET_CODE (XEXP (src, 0)) == UNSPEC
&& XINT (XEXP (src, 0), 1) == 1
&& XINT (XEXP (src, 0), 1) == UNSPEC_MOVA
&& GET_CODE (XVECEXP (XEXP (src, 0),
0, 0)) == CONST)
{
@ -3290,7 +3290,8 @@ machine_dependent_reorg (first)
0, 0), mode, 0);
newsrc = gen_rtx_LABEL_REF (VOIDmode, lab);
newsrc = gen_rtx_UNSPEC (VOIDmode,
gen_rtvec (1, newsrc), 1);
gen_rtvec (1, newsrc),
UNSPEC_MOVA);
}
else
{
@ -5000,7 +5001,7 @@ get_fpscr_rtx ()
if (! fpscr_rtx)
{
fpscr_rtx = gen_rtx (REG, PSImode, 48);
fpscr_rtx = gen_rtx (REG, PSImode, FPSCR_REG);
REG_USERVAR_P (fpscr_rtx) = 1;
ggc_add_rtx_root (&fpscr_rtx, 1);
mark_user_reg (fpscr_rtx);
@ -5276,7 +5277,10 @@ nonpic_symbol_mentioned_p (x)
return 1;
if (GET_CODE (x) == UNSPEC
&& (XINT (x, 1) >= 6 && XINT (x, 1) <= 9))
&& (XINT (x, 1) == UNSPEC_PIC
|| XINT (x, 1) == UNSPEC_GOT
|| XINT (x, 1) == UNSPEC_GOTOFF
|| XINT (x, 1) == UNSPEC_PLT))
return 0;
fmt = GET_RTX_FORMAT (GET_CODE (x));

48
gcc/config/sh/sh.h
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@ -432,20 +432,18 @@ do { \
All registers that the compiler knows about must be given numbers,
even those that are not normally considered general registers. */
#define AP_REG 16
#define PR_REG 17
#define T_REG 18
#define GBR_REG 19
#define MACH_REG 20
#define MACL_REG 21
#define SPECIAL_REG(REGNO) ((REGNO) >= 18 && (REGNO) <= 21)
#define FPUL_REG 22
#define RAP_REG 23
#define FIRST_FP_REG 24
#define LAST_FP_REG 39
#define FIRST_XD_REG 40
#define LAST_XD_REG 47
#define FPSCR_REG 48
/* There are many other relevant definitions in sh.md's md_constants. */
#define FIRST_GENERAL_REG R0_REG
#define LAST_GENERAL_REG (FIRST_GENERAL_REG + 15)
#define FIRST_FP_REG DR0_REG
#define LAST_FP_REG (FIRST_FP_REG + 15)
#define FIRST_XD_REG XD0_REG
#define LAST_XD_REG (FIRST_XD_REG + 7)
#define SPECIAL_REG(REGNO) \
((REGNO) == GBR_REG || (REGNO) == T_REG \
|| (REGNO) == MACH_REG || (REGNO) == MACL_REG)
#define FIRST_PSEUDO_REGISTER 49
@ -554,18 +552,18 @@ do { \
/* #define PC_REGNUM 15*/
/* Register to use for pushing function arguments. */
#define STACK_POINTER_REGNUM 15
#define STACK_POINTER_REGNUM SP_REG
/* Base register for access to local variables of the function. */
#define FRAME_POINTER_REGNUM 14
#define FRAME_POINTER_REGNUM FP_REG
/* Fake register that holds the address on the stack of the
current function's return address. */
#define RETURN_ADDRESS_POINTER_REGNUM 23
#define RETURN_ADDRESS_POINTER_REGNUM RAP_REG
/* Register to hold the addressing base for position independent
code access to data items. */
#define PIC_OFFSET_TABLE_REGNUM 12
#define PIC_OFFSET_TABLE_REGNUM PIC_REG
#define GOT_SYMBOL_NAME "*_GLOBAL_OFFSET_TABLE_"
@ -831,7 +829,7 @@ extern enum reg_class reg_class_from_letter[];
|| system_reg_operand (X, VOIDmode))))) \
? GENERAL_REGS \
: (((CLASS) == MAC_REGS || (CLASS) == PR_REGS) \
&& GET_CODE (X) == REG && REGNO (X) > 15 \
&& GET_CODE (X) == REG && REGNO (X) > SP_REG \
&& (CLASS) != REGNO_REG_CLASS (REGNO (X))) \
? GENERAL_REGS : NO_REGS)
@ -886,8 +884,8 @@ extern enum reg_class reg_class_from_letter[];
? 8 \
: 4)
#define FIRST_PARM_REG 4
#define FIRST_RET_REG 0
#define FIRST_PARM_REG (FIRST_GENERAL_REG + 4)
#define FIRST_RET_REG FIRST_GENERAL_REG
#define FIRST_FP_PARM_REG (FIRST_FP_REG + 4)
#define FIRST_FP_RET_REG FIRST_FP_REG
@ -1269,7 +1267,7 @@ extern int current_function_anonymous_args;
#define REGNO_OK_FOR_BASE_P(REGNO) \
((REGNO) < PR_REG || (unsigned) reg_renumber[(REGNO)] < PR_REG)
#define REGNO_OK_FOR_INDEX_P(REGNO) \
((REGNO) == 0 || (unsigned) reg_renumber[(REGNO)] == 0)
((REGNO) == R0_REG || (unsigned) reg_renumber[(REGNO)] == R0_REG)
/* Maximum number of registers that can appear in a valid memory
address. */
@ -1299,17 +1297,17 @@ extern int current_function_anonymous_args;
/* Nonzero if X is a hard reg that can be used as a base reg
or if it is a pseudo reg. */
#define REG_OK_FOR_BASE_P(X) \
(REGNO (X) <= 16 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
(REGNO (X) <= AP_REG || REGNO (X) >= FIRST_PSEUDO_REGISTER)
/* Nonzero if X is a hard reg that can be used as an index
or if it is a pseudo reg. */
#define REG_OK_FOR_INDEX_P(X) \
(REGNO (X) == 0 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
(REGNO (X) == R0_REG || REGNO (X) >= FIRST_PSEUDO_REGISTER)
/* Nonzero if X/OFFSET is a hard reg that can be used as an index
or if X is a pseudo reg. */
#define SUBREG_OK_FOR_INDEX_P(X, OFFSET) \
((REGNO (X) == 0 && OFFSET == 0) || REGNO (X) >= FIRST_PSEUDO_REGISTER)
((REGNO (X) == R0_REG && OFFSET == 0) || REGNO (X) >= FIRST_PSEUDO_REGISTER)
#else

940
gcc/config/sh/sh.md
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