From 48bd780ee327c9ae6ffc0641e73cc1f4939fb204 Mon Sep 17 00:00:00 2001 From: Bill Schmidt Date: Wed, 2 Feb 2022 21:30:27 -0600 Subject: [PATCH] rs6000: Remove -m[no-]fold-gimple flag [PR103686] The -m[no-]fold-gimple flag was really intended primarily for internal testing while implementing GIMPLE folding for rs6000 vector built-in functions. It ended up leaking into other places, causing problems such as PR103686 identifies. Let's remove it. There are a number of tests in the testsuite that require adjustment. Some specify -mfold-gimple directly, which is the default, so that is handled by removing the option. Others unnecessarily specify -mno-fold-gimple, as the tests work fine without this. Again that is handled by removing the option. There are a couple of extra variants of tests specifically for -mno-fold-gimple; for those, we can just remove the whole test. gcc.target/powerpc/builtins-1.c was more problematic. It was written in such a way as to be extremely fragile. For this one, I rewrote the whole test in a different style, using individual functions to test each built-in function. These same tests are also largely covered by builtins-1-be-folded.c and builtins-1-le-folded.c, so I chose to explicitly make this test -mbig for simplicity, and use -O2 for clean code generation. I made some slight modifications to the expected instruction counts as a result, and tested on both 32- and 64-bit. 2022-02-02 Bill Schmidt gcc/ PR target/103686 * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Remove test for !rs6000_fold_gimple. * config/rs6000/rs6000.cc (rs6000_option_override_internal): Likewise. * config/rs6000/rs6000.opt (mfold-gimple): Remove. gcc/testsuite/ PR target/103686 * gcc.target/powerpc/builtins-1-be-folded.c: Remove -mfold-gimple option. * gcc.target/powerpc/builtins-1-le-folded.c: Likewise. * gcc.target/powerpc/builtins-1.c: Rewrite to use small functions and restrict to -O2 -mbig for predictability. Adjust instruction counts. * gcc.target/powerpc/builtins-5.c: Remove -mno-fold-gimple option. * gcc.target/powerpc/p8-vec-xl-xst.c: Likewise. * gcc.target/powerpc/pr83926.c: Likewise. * gcc.target/powerpc/pr86731-nogimplefold-longlong.c: Delete. * gcc.target/powerpc/pr86731-nogimplefold.c: Delete. * gcc.target/powerpc/swaps-p8-17.c: Remove -mno-fold-gimple option. --- gcc/config/rs6000/rs6000-builtin.cc | 3 - gcc/config/rs6000/rs6000.cc | 4 - gcc/config/rs6000/rs6000.opt | 4 - .../gcc.target/powerpc/builtins-1-be-folded.c | 2 +- .../gcc.target/powerpc/builtins-1-le-folded.c | 2 +- gcc/testsuite/gcc.target/powerpc/builtins-1.c | 1210 +++++++++++++---- gcc/testsuite/gcc.target/powerpc/builtins-5.c | 3 +- .../gcc.target/powerpc/p8-vec-xl-xst.c | 3 +- gcc/testsuite/gcc.target/powerpc/pr83926.c | 3 +- .../powerpc/pr86731-nogimplefold-longlong.c | 32 - .../gcc.target/powerpc/pr86731-nogimplefold.c | 63 - .../gcc.target/powerpc/swaps-p8-17.c | 3 +- 12 files changed, 951 insertions(+), 381 deletions(-) delete mode 100644 gcc/testsuite/gcc.target/powerpc/pr86731-nogimplefold-longlong.c delete mode 100644 gcc/testsuite/gcc.target/powerpc/pr86731-nogimplefold.c diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc index 69f8cee5b28..5d34c1bcfc9 100644 --- a/gcc/config/rs6000/rs6000-builtin.cc +++ b/gcc/config/rs6000/rs6000-builtin.cc @@ -1299,9 +1299,6 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi) fprintf (stderr, "rs6000_gimple_fold_builtin %d %s %s\n", fn_code, fn_name1, fn_name2); - if (!rs6000_fold_gimple) - return false; - /* Prevent gimple folding for code that does not have a LHS, unless it is allowed per the rs6000_builtin_valid_without_lhs helper function. */ if (!gimple_call_lhs (stmt) diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc index ac6dd19cd64..b6f2309adfb 100644 --- a/gcc/config/rs6000/rs6000.cc +++ b/gcc/config/rs6000/rs6000.cc @@ -3833,10 +3833,6 @@ rs6000_option_override_internal (bool global_init_p) & OPTION_MASK_DIRECT_MOVE)) rs6000_isa_flags |= ~rs6000_isa_flags_explicit & OPTION_MASK_STRICT_ALIGN; - if (!rs6000_fold_gimple) - fprintf (stderr, - "gimple folding of rs6000 builtins has been disabled.\n"); - /* Add some warnings for VSX. */ if (TARGET_VSX) { diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt index c2a77182a9e..68c0cae6e63 100644 --- a/gcc/config/rs6000/rs6000.opt +++ b/gcc/config/rs6000/rs6000.opt @@ -155,10 +155,6 @@ maltivec Target Mask(ALTIVEC) Var(rs6000_isa_flags) Use AltiVec instructions. -mfold-gimple -Target Var(rs6000_fold_gimple) Init(1) -Enable early gimple folding of builtins. - mhard-dfp Target Mask(DFP) Var(rs6000_isa_flags) Use decimal floating point instructions. diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-1-be-folded.c b/gcc/testsuite/gcc.target/powerpc/builtins-1-be-folded.c index 26d10a726e5..3cc487de2ff 100644 --- a/gcc/testsuite/gcc.target/powerpc/builtins-1-be-folded.c +++ b/gcc/testsuite/gcc.target/powerpc/builtins-1-be-folded.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc-*-* } } } */ -/* { dg-options "-mdejagnu-cpu=power8 -O2 -mfold-gimple" } */ +/* { dg-options "-mdejagnu-cpu=power8 -O2" } */ /* Based on builtins-1-le.c ; ensure that the power8 builtins are accepted by the compiler, at O2 with gimple folding enabled. */ diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-1-le-folded.c b/gcc/testsuite/gcc.target/powerpc/builtins-1-le-folded.c index 55a0c30ac6d..7193cd570b7 100644 --- a/gcc/testsuite/gcc.target/powerpc/builtins-1-le-folded.c +++ b/gcc/testsuite/gcc.target/powerpc/builtins-1-le-folded.c @@ -1,5 +1,5 @@ /* { dg-do compile { target { powerpc64le-*-* } } } */ -/* { dg-options "-mdejagnu-cpu=power8 -O2 -mfold-gimple" } */ +/* { dg-options "-mdejagnu-cpu=power8 -O2" } */ /* Based on builtins-1-le.c ; ensure that the power8 builtins are accepted by the compiler, at O2 with gimple folding enabled. */ diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-1.c b/gcc/testsuite/gcc.target/powerpc/builtins-1.c index 63fbd2e3be1..ffa95eda575 100644 --- a/gcc/testsuite/gcc.target/powerpc/builtins-1.c +++ b/gcc/testsuite/gcc.target/powerpc/builtins-1.c @@ -1,265 +1,953 @@ /* { dg-do compile } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ -/* { dg-options "-mdejagnu-cpu=power8 -O0 -mno-fold-gimple -dp" } */ -/* { dg-prune-output "gimple folding of rs6000 builtins has been disabled." } */ +/* { dg-options "-mdejagnu-cpu=power8 -O2 -mbig" } */ #include -vector double y = { 2.0, 4.0 }; -vector double z; - -int main () +vector float +foo0 (vector float fa, vector float fb) { - vector float fa = {1.0, 2.0, 3.0, -4.0}; - vector float fb = {-2.0, -3.0, -4.0, -5.0}; - vector float fd = vec_and (fa, fb); - vector float fc = vec_cpsgn (fa, fb); - vector float fe = vec_mergeh (fa, fb); - vector float ff = vec_mergel (fa, fb); + return vec_and (fa, fb); +} - vector double da = {1.0, 2.0}; - vector double db = {-2.0, -3.0}; - vector double dz = vec_and (da, db); +vector float +foo1 (vector float fa, vector float fb) +{ + return vec_cpsgn (fa, fb); +} - vector signed int si_a = {1, 2, 3, 4}; - vector unsigned int ui_a = {1, 2, 3, 4}; +vector float +foo2 (vector float fa, vector float fb) +{ + return vec_mergeh (fa, fb); +} - vector long long la = {5L, 14L}; - vector long long lb = {3L, 86L}; - vector long long lc = vec_and (la, lb); - vector bool long long ld = {0, -1}; - vector long long le = vec_and (la, ld); - vector long long lf = vec_and (ld, lb); +vector float +foo3 (vector float fa, vector float fb) +{ + return vec_mergel (fa, fb); +} - vector unsigned long long ua = {5L, 14L}; - vector unsigned long long ub = {3L, 86L}; - vector unsigned long long uc = vec_and (ua, ub); - vector bool long long ud = {0, -1}; - vector unsigned long long ue = vec_and (ua, ud); - vector unsigned long long uf = vec_and (ud, ub); +vector double +foo4 (vector double da, vector double db) +{ + return vec_and (da, db); +} - vector long long lg = vec_andc (la, lb); - vector long long lh = vec_andc (la, ld); - vector long long li = vec_andc (ld, lb); +vector long long +foo5 (vector long long la, vector long long lb) +{ + return vec_and (la, lb); +} - vector unsigned long long ug = vec_andc (ua, ub); - vector unsigned long long uh = vec_andc (ua, ud); - vector unsigned long long ui = vec_andc (ud, ub); +vector long long +foo6 (vector long long la, vector bool long long ld) +{ + return vec_and (la, ld); +} - vector double de = {1.0, -4.0}; - vector double df = {-2.0, 5.0}; - vector double dg = vec_cpsgn (de, df); - vector double dzw = vec_mergeh (de, df); - vector double dze = vec_mergel (de, df); +vector long long +foo7 (vector bool long long ld, vector long long lb) +{ + return vec_and (ld, lb); +} - vector long long lj = vec_mergeh (la, lb); - vector long long lk = vec_mergeh (la, ld); - vector long long ll = vec_mergeh (ld, la); +vector unsigned long long +foo8 (vector unsigned long long ua, vector unsigned long long ub) +{ + return vec_and (ua, ub); +} - vector unsigned long long uj = vec_mergeh (ua, ub); - vector unsigned long long uk = vec_mergeh (ua, ud); - vector unsigned long long ul = vec_mergeh (ud, ua); +vector unsigned long long +foo9 (vector unsigned long long ua, vector bool long long ud) +{ + return vec_and (ua, ud); +} - vector pixel pa = {9, 16, 25, 36, 1, 2, 3, 4}; - vector pixel pb = {25, 36, 1, 2, 45, 3, 4, 99}; - vector pixel pc = vec_mergeh (pa, pb); - vector pixel pd = vec_mergel (pa, pb); +vector unsigned long long +foo10 (vector bool long long ud, vector unsigned long long ub) +{ + return vec_and (ud, ub); +} - vector long long lm = vec_mergel (la, lb); - vector long long ln = vec_mergel (la, ld); - vector long long lo = vec_mergel (ld, la); +vector long long +foo11 (vector long long la, vector long long lb) +{ + return vec_andc (la, lb); +} - vector unsigned long long um = vec_mergel (ua, ub); - vector unsigned long long un = vec_mergel (ua, ud); - vector unsigned long long uo = vec_mergel (ud, ua); +vector long long +foo12 (vector long long la, vector bool long long ld) +{ + return vec_andc (la, ld); +} - vector long long lp = vec_nor (la, lb); - vector long long lq = vec_nor (la, ld); - vector long long lr = vec_nor (ld, la); +vector long long +foo13 (vector bool long long ld, vector long long lb) +{ + return vec_andc (ld, lb); +} - vector unsigned long long up = vec_nor (ua, ub); - vector unsigned long long uq = vec_nor (ua, ud); - vector unsigned long long ur = vec_nor (ud, ua); +vector unsigned long long +foo14 (vector unsigned long long ua, vector unsigned long long ub) +{ + return vec_andc (ua, ub); +} - vector unsigned char ca = {0,4,8,1,5,9,2,6,10,3,7,11,15,12,14,13}; - vector unsigned char cbb = {5,4,8,3,1,9,2,6,10,3,7,11,15,12,14,13}; +vector unsigned long long +foo15 (vector unsigned long long ua, vector bool long long ud) +{ + return vec_andc (ua, ud); +} - vector unsigned char ucba = {5,4,8,3,1,9,2,6,10,3,7,11,15,12,14,13}; - vector unsigned char ucbb = {5,4,8,3,1,9,2,6,10,3,7,11,15,12,14,13}; - vector unsigned char ucbc = {5,4,8,3,1,9,2,6,10,3,7,11,15,12,14,13}; +vector unsigned long long +foo16 (vector bool long long ud, vector unsigned long long ub) +{ + return vec_andc (ud, ub); +} - vector long long lv = vec_perm (la, lb, ca); +vector double +foo17 (vector double de, vector double df) +{ + return vec_cpsgn (de, df); +} - vector unsigned char ucm = vec_and (ca, cbb); - vector unsigned char ucn = vec_andc (ca, cbb); - vector unsigned char uco = vec_mergel (ca, cbb); +vector double +foo18 (vector double de, vector double df) +{ + return vec_mergeh (de, df); +} - vector unsigned long long uv = vec_perm (ua, ub, ca); +vector double +foo19 (vector double de, vector double df) +{ + return vec_mergel (de, df); +} - vector long long lx = vec_sel (la, lb, uc); - vector long long ly = vec_sel (la, lb, ld); +vector long long +foo20 (vector long long la, vector long long lb) +{ + return vec_mergeh (la, lb); +} - vector unsigned long long uw = vec_sel (ua, ub, lc); - vector unsigned long long ux = vec_sel (ua, ub, uc); - vector unsigned long long uy = vec_sel (ua, ub, ld); +vector long long +foo21 (vector long long la, vector bool long long ld) +{ + return vec_mergeh (la, ld); +} - vector long long lz = vec_xor (la, lb); - vector long long l0 = vec_xor (la, ld); - vector long long l1 = vec_xor (ld, la); +vector long long +foo22 (vector bool long long ld, vector long long lb) +{ + return vec_mergeh (ld, lb); +} - vector unsigned long long uz = vec_xor (ua, ub); - vector unsigned long long u0 = vec_xor (ua, ud); - vector unsigned long long u1 = vec_xor (ud, ua); +vector unsigned long long +foo23 (vector unsigned long long ua, vector unsigned long long ub) +{ + return vec_mergeh (ua, ub); +} - int ia = vec_all_eq (ua, ub); - int ib = vec_all_ge (ua, ub); - int ic = vec_all_gt (ua, ub); - int id = vec_all_le (ua, ub); - int ie = vec_all_lt (ua, ub); - int ig = vec_all_ne (ua, ub); +vector unsigned long long +foo24 (vector unsigned long long ua, vector bool long long ud) +{ + return vec_mergeh (ua, ud); +} - int ih = vec_any_eq (ua, ub); - int ii = vec_any_ge (ua, ub); - int ij = vec_any_gt (ua, ub); - int ik = vec_any_le (ua, ub); - int il = vec_any_lt (ua, ub); - int im = vec_any_ne (ua, ub); +vector unsigned long long +foo25 (vector bool long long ud, vector unsigned long long ub) +{ + return vec_mergeh (ud, ub); +} - vector short ssa = {9, 16, 25, 36, 1, 2, 3, 4}; - vector short ssb = {-8, -27, -64, -125, 2, 3, 5, 3}; - vector short sscc = vec_and (ssa, ssb); - vector short sscd = vec_mergeh (ssa, ssb); - vector short ssce = vec_mergel (ssa, ssb); +vector pixel +foo26 (vector pixel pa, vector pixel pb) +{ + return vec_mergeh (pa, pb); +} - vector int sia = {9, 16, 25, 36}; - vector int sib = {-8, -27, -64, -125}; - vector int sicc = vec_and (sia, sib); - vector int sicd = vec_andc (sia, sib); - vector int sig = vec_mergel (sia, sib); +vector pixel +foo27 (vector pixel pa, vector pixel pb) +{ + return vec_mergel (pa, pb); +} - vector unsigned int uia = {9, 16, 25, 36}; - vector unsigned int uib = {8, 27, 64, 125}; - vector unsigned int uicc = vec_and (uia, uib); - vector unsigned int uidd = vec_andc (uia, uib); - vector unsigned int uig = vec_mergel (uia, uib); +vector long long +foo28 (vector long long la, vector long long lb) +{ + return vec_mergel (la, lb); +} - vector bool char bca = {0, 1, 4, 7}; - vector bool char bcb = {-8, 9, 2, 9}; - vector bool char bcc = vec_and (bca, bcb); - vector bool char bcd = vec_andc (bca, bcb); - vector bool char bce = vec_mergel (bca, bcb); +vector long long +foo29 (vector long long la, vector bool long long ld) +{ + return vec_mergel (la, ld); +} - vector bool short bsa = {0, -1, -1, 0, 3, 4, 6, 7}; - vector bool short bsb = {-1, -1, 0, -1, 0, 0, 0, 0}; - vector bool short bscc = vec_and (bsa, bsb); - vector bool short bscd = vec_andc (bsa, bsb); - vector bool short bsce = vec_mergel (bsa, bsb); +vector long long +foo30 (vector bool long long ld, vector long long lb) +{ + return vec_mergel (ld, lb); +} - vector bool int bia = {0, -1, -1, 0}; - vector bool int bib = {-1, -1, 0, -1}; - vector bool int bicc = vec_and (bia, bib); - vector bool int bicd = vec_andc (bia, bib); - vector bool int bide = vec_mergel (bia, bib); +vector unsigned long long +foo31 (vector unsigned long long ua, vector unsigned long long ub) +{ + return vec_mergel (ua, ub); +} - vector unsigned int uie = vec_packsu (ua, ub); +vector unsigned long long +foo32 (vector unsigned long long ua, vector bool long long ud) +{ + return vec_mergel (ua, ud); +} - vector long long l2 = vec_cntlz (la); - vector unsigned long long u2 = vec_cntlz (ua); - vector int sie = vec_cntlz (sia); - vector unsigned int uif = vec_cntlz (uia); - vector short sszz = vec_cntlz (ssa); +vector unsigned long long +foo33 (vector bool long long ud, vector unsigned long long ub) +{ + return vec_mergel (ud, ub); +} - vector unsigned short usa = {81, 72, 63, 54, 45, 36, 27, 18}; - vector unsigned short usb = {81, 72, 63, 54, 45, 36, 27, 18}; - vector unsigned short usd = vec_and (usa, usb); - vector unsigned short use = vec_andc (usa, usb); - vector unsigned short usc = vec_cntlz (usa); - vector unsigned short uscd = vec_mergeh (usa, usb); - vector unsigned short usce = vec_mergel (usa, usb); +vector long long +foo34 (vector long long la, vector long long lb) +{ + return vec_nor (la, lb); +} - vector signed char sca = {-4, 3, -9, 15, -31, 31, 0, 0, - 1, 117, -36, 99, 98, 97, 96, 95}; - vector signed char scb = vec_cntlz (sca); - vector signed char scc = vec_mergel (sca, scb); +vector long long +foo35 (vector long long la, vector bool long long ld) +{ + return vec_nor (la, ld); +} - vector unsigned char uca = {4, 3, 9, 15, 30, 31, 0, 0, - 1, 117, 36, 99, 98, 97, 96, 95}; - vector unsigned char cb = vec_cntlz (ca); +vector long long +foo36 (vector bool long long ld, vector long long lb) +{ + return vec_nor (ld, lb); +} - vector double dd = vec_xl (0, &y); - vec_xst (dd, 0, &z); +vector unsigned long long +foo37 (vector unsigned long long ua, vector unsigned long long ub) +{ + return vec_nor (ua, ub); +} - vector double dzz = vec_round (dd); - vector double dzz1 = vec_rsqrt (dd); - vector double dzz2 = vec_rsqrte (dd); +vector unsigned long long +foo38 (vector unsigned long long ua, vector bool long long ud) +{ + return vec_nor (ua, ud); +} - vector float ff1 = vec_round (fa); - vector float ff2 = vec_rsqrt (fa); - vector float ff3 = vec_rsqrte (fa); +vector unsigned long long +foo39 (vector bool long long ud, vector unsigned long long ub) +{ + return vec_nor (ud, ub); +} - vector double dff = vec_splat (de, 0); - vector double dgg = vec_splat (de, 1); - vector long long l3 = vec_splat (l2, 0); - vector long long l4 = vec_splat (l2, 1); - vector unsigned long long u3 = vec_splat (u2, 0); - vector unsigned long long u4 = vec_splat (u2, 1); - vector bool long long l5 = vec_splat (ld, 0); - vector bool long long l6 = vec_splat (ld, 1); - vector bool long long l10 = vec_mergee (ld, ld); - vector bool long long l11 = vec_mergeo (ld, ld); - vector bool long long l15 = vec_and (ld, ld); - - vector long long l7 = vec_div (l3, l4); - vector unsigned long long u5 = vec_div (u3, u4); - vector long long l12 = vec_mergee (la, lb); - vector long long l13 = vec_mergeo (la, lb); - vector unsigned long long u8 = vec_mergee (u3, u4); - vector unsigned long long u9 = vec_mergeo (u3, u4); +vector long long +foo40 (vector long long la, vector long long lb, vector unsigned char ca) +{ + return vec_perm (la, lb, ca); +} - vector long long l8 = vec_mul (l3, l4); - vector unsigned long long u6 = vec_mul (u3, u4); +vector unsigned char +foo41 (vector unsigned char ca, vector unsigned char cbb) +{ + return vec_and (ca, cbb); +} - vector int sz = vec_cts (fa, 0x1F); - vector unsigned int usz = vec_ctu (fa, 0x1F); +vector unsigned char +foo42 (vector unsigned char ca, vector unsigned char cbb) +{ + return vec_andc (ca, cbb); +} - vector float f1 = vec_mergee (fa, fb); - vector float f2 = vec_mergeo (fa, fb); +vector unsigned char +foo43 (vector unsigned char ca, vector unsigned char cbb) +{ + return vec_mergel (ca, cbb); +} - vector double d1 = vec_mergee (da, db); - vector double d2 = vec_mergeo (da, db); +vector unsigned long long +foo44 (vector unsigned long long ua, vector unsigned long long ub, + vector unsigned char ca) +{ + return vec_perm (ua, ub, ca); +} - vector float f3 = vec_ctf (si_a, 1); - vector float f4 = vec_ctf (ui_a, 2); +vector long long +foo45 (vector long long la, vector long long lb, vector unsigned long long uc) +{ + return vec_sel (la, lb, uc); +} - vector bool char z_vbc2 = vec_splat (bca, 0); - vector signed char z_vsc1 = vec_splat (sca, 1); - vector unsigned char z_vuc1 = vec_splat (ucbc, 2); +vector long long +foo46 (vector long long la, vector long long lb, vector bool long long ld) +{ + return vec_sel (la, lb, ld); +} - vector bool int z_vbi1 = vec_splat (bia, 3); - vector signed int z_vsi1 = vec_splat (sia, 1); - vector unsigned int z_vui1 = vec_splat (uia, 2); +vector unsigned long long +foo47 (vector unsigned long long ua, vector unsigned long long ub, + vector long long lc) +{ + return vec_sel (ua, ub, lc); +} - vector bool int z_bi2 = vec_mergee (bia, bib); - vector signed int z_si2 = vec_mergee (sia, sib); - vector unsigned int z_ui2 = vec_mergee (uia, uib); - - vector bool char z_bc2 = vec_mergeh (bca, bcb); - vector signed char z_sc2 = vec_mergeh (sca, scb); - vector bool int z_bi3 = vec_mergeh (bia, bib); - vector signed int z_si3 = vec_mergeh (sia, sib); - vector unsigned int z_ui3 = vec_mergeh (uia, uib); - vector bool short z_bs1 = vec_mergeh (bsa, bsb); +vector unsigned long long +foo48 (vector unsigned long long ua, vector unsigned long long ub, + vector unsigned long long uc) +{ + return vec_sel (ua, ub, uc); +} - vector bool int z_bi4 = vec_mergeo (bia, bib); - vector signed int z_si4 = vec_mergeo (sia, sib); - vector unsigned int z_ui4 = vec_mergeo (uia, uib); - - vector pixel int z_vp1 = vec_splat (pa, 1); - vector bool short z_bs2 = vec_splat (bsa, 0); - vector short signed int z_vss1 = vec_splat (ssa, 2); - vector unsigned short int z_vuss1 = vec_splat (usa, 1); +vector unsigned long long +foo49 (vector unsigned long long ua, vector unsigned long long ub, + vector bool long long ld) +{ + return vec_sel (ua, ub, ld); +} - return 0; +vector long long +foo50 (vector long long la, vector long long lb) +{ + return vec_xor (la, lb); +} + +vector long long +foo51 (vector long long la, vector bool long long ld) +{ + return vec_xor (la, ld); +} + +vector long long +foo52 (vector bool long long ld, vector long long la) +{ + return vec_xor (ld, la); +} + +vector unsigned long long +foo53 (vector unsigned long long ua, vector unsigned long long ub) +{ + return vec_xor (ua, ub); +} + +vector unsigned long long +foo54 (vector unsigned long long ua, vector bool long long ud) +{ + return vec_xor (ua, ud); +} + +vector unsigned long long +foo55 (vector bool long long ud, vector unsigned long long ua) +{ + return vec_xor (ud, ua); +} + +int +foo56 (vector unsigned long long ua, vector unsigned long long ub) +{ + return vec_all_eq (ua, ub); +} + +int +foo57 (vector unsigned long long ua, vector unsigned long long ub) +{ + return vec_all_ge (ua, ub); +} + +int +foo58 (vector unsigned long long ua, vector unsigned long long ub) +{ + return vec_all_gt (ua, ub); +} + +int +foo59 (vector unsigned long long ua, vector unsigned long long ub) +{ + return vec_all_le (ua, ub); +} + +int +foo60 (vector unsigned long long ua, vector unsigned long long ub) +{ + return vec_all_lt (ua, ub); +} + +int +foo61 (vector unsigned long long ua, vector unsigned long long ub) +{ + return vec_all_ne (ua, ub); +} + +int +foo62 (vector unsigned long long ua, vector unsigned long long ub) +{ + return vec_any_eq (ua, ub); +} + +int +foo63 (vector unsigned long long ua, vector unsigned long long ub) +{ + return vec_any_ge (ua, ub); +} + +int +foo64 (vector unsigned long long ua, vector unsigned long long ub) +{ + return vec_any_gt (ua, ub); +} + +int +foo65 (vector unsigned long long ua, vector unsigned long long ub) +{ + return vec_any_le (ua, ub); +} + +int +foo66 (vector unsigned long long ua, vector unsigned long long ub) +{ + return vec_any_lt (ua, ub); +} + +int +foo67 (vector unsigned long long ua, vector unsigned long long ub) +{ + return vec_any_ne (ua, ub); +} + +vector short +foo68 (vector short ssa, vector short ssb) +{ + return vec_and (ssa, ssb); +} + +vector short +foo69 (vector short ssa, vector short ssb) +{ + return vec_mergeh (ssa, ssb); +} + +vector short +foo70 (vector short ssa, vector short ssb) +{ + return vec_mergel (ssa, ssb); +} + +vector int +foo71 (vector int sia, vector int sib) +{ + return vec_and (sia, sib); +} + +vector int +foo72 (vector int sia, vector int sib) +{ + return vec_andc (sia, sib); +} + +vector int +foo73 (vector int sia, vector int sib) +{ + return vec_mergel (sia, sib); +} + +vector unsigned int +foo74 (vector unsigned int uia, vector unsigned int uib) +{ + return vec_and (uia, uib); +} + +vector unsigned int +foo75 (vector unsigned int uia, vector unsigned int uib) +{ + return vec_andc (uia, uib); +} + +vector unsigned int +foo76 (vector unsigned int uia, vector unsigned int uib) +{ + return vec_mergel (uia, uib); +} + +vector bool char +foo77 (vector bool char bca, vector bool char bcb) +{ + return vec_and (bca, bcb); +} + +vector bool char +foo78 (vector bool char bca, vector bool char bcb) +{ + return vec_andc (bca, bcb); +} + +vector bool char +foo79 (vector bool char bca, vector bool char bcb) +{ + return vec_mergel (bca, bcb); +} + +vector bool short +foo80 (vector bool short bsa, vector bool short bsb) +{ + return vec_and (bsa, bsb); +} + +vector bool short +foo81 (vector bool short bsa, vector bool short bsb) +{ + return vec_andc (bsa, bsb); +} + +vector bool short +foo82 (vector bool short bsa, vector bool short bsb) +{ + return vec_mergel (bsa, bsb); +} + +vector bool int +foo83 (vector bool int bia, vector bool int bib) +{ + return vec_and (bia, bib); +} + +vector bool int +foo84 (vector bool int bia, vector bool int bib) +{ + return vec_andc (bia, bib); +} + +vector bool int +foo85 (vector bool int bia, vector bool int bib) +{ + return vec_mergel (bia, bib); +} + +vector unsigned int +foo86 (vector unsigned long long ua, vector unsigned long long ub) +{ + return vec_packsu (ua, ub); +} + +vector long long +foo87 (vector long long la) +{ + return vec_cntlz (la); +} + +vector unsigned long long +foo88 (vector unsigned long long ua) +{ + return vec_cntlz (ua); +} + +vector int +foo89 (vector int sia) +{ + return vec_cntlz (sia); +} + +vector unsigned int +foo90 (vector unsigned int uia) +{ + return vec_cntlz (uia); +} + +vector short +foo91 (vector short ssa) +{ + return vec_cntlz (ssa); +} + +vector unsigned short +foo92 (vector unsigned short usa, vector unsigned short usb) +{ + return vec_and (usa, usb); +} + +vector unsigned short +foo93 (vector unsigned short usa, vector unsigned short usb) +{ + return vec_andc (usa, usb); +} + +vector unsigned short +foo94 (vector unsigned short usa) +{ + return vec_cntlz (usa); +} + +vector unsigned short +foo95 (vector unsigned short usa, vector unsigned short usb) +{ + return vec_mergeh (usa, usb); +} + +vector unsigned short +foo96 (vector unsigned short usa, vector unsigned short usb) +{ + return vec_mergel (usa, usb); +} + +vector signed char +foo97 (vector signed char sca) +{ + return vec_cntlz (sca); +} + +vector signed char +foo98 (vector signed char sca, vector signed char scb) +{ + return vec_mergel (sca, scb); +} + +vector unsigned char +foo99 (vector unsigned char ca) +{ + return vec_cntlz (ca); +} + +vector double +foo100 (vector double *y) +{ + return vec_xl (0, y); +} + +void +foo101 (vector double dd, vector double *z) +{ + vec_xst (dd, 0, z); +} + +vector double +foo102 (vector double dd) +{ + return vec_round (dd); +} + +vector double +foo103 (vector double dd) +{ + return vec_rsqrt (dd); +} + +vector double +foo104 (vector double dd) +{ + return vec_rsqrte (dd); +} + +vector float +foo105 (vector float fa) +{ + return vec_round (fa); +} + +vector float +foo106 (vector float fa) +{ + return vec_rsqrt (fa); +} + +vector float +foo107 (vector float fa) +{ + return vec_rsqrte (fa); +} + +vector double +foo108 (vector double de) +{ + return vec_splat (de, 0); +} + +vector double +foo109 (vector double de) +{ + return vec_splat (de, 1); +} + +vector long long +foo110 (vector long long l2) +{ + return vec_splat (l2, 0); +} + +vector long long +foo111 (vector long long l2) +{ + return vec_splat (l2, 1); +} + +vector unsigned long long +foo112 (vector unsigned long long u2) +{ + return vec_splat (u2, 0); +} + +vector unsigned long long +foo113 (vector unsigned long long u2) +{ + return vec_splat (u2, 1); +} + +vector bool long long +foo114 (vector bool long long ld) +{ + return vec_splat (ld, 0); +} + +vector bool long long +foo115 (vector bool long long ld) +{ + return vec_splat (ld, 1); +} + +vector bool long long +foo116 (vector bool long long la, vector bool long long lb) +{ + return vec_mergee (la, lb); +} + +vector bool long long +foo117 (vector bool long long la, vector bool long long lb) +{ + return vec_mergeo (la, lb); +} + +vector bool long long +foo118 (vector bool long long la, vector bool long long lb) +{ + return vec_and (la, lb); +} + +vector long long +foo119 (vector long long l3, vector long long l4) +{ + return vec_div (l3, l4); +} + +vector unsigned long long +foo120 (vector unsigned long long u3, vector unsigned long long u4) +{ + return vec_div (u3, u4); +} + +vector long long +foo121 (vector long long la, vector long long lb) +{ + return vec_mergee (la, lb); +} + +vector long long +foo122 (vector long long la, vector long long lb) +{ + return vec_mergeo (la, lb); +} + +vector unsigned long long +foo123 (vector unsigned long long u3, vector unsigned long long u4) +{ + return vec_mergee (u3, u4); +} + +vector unsigned long long +foo124 (vector unsigned long long u3, vector unsigned long long u4) +{ + return vec_mergeo (u3, u4); +} + +vector long long +foo125 (vector long long l3, vector long long l4) +{ + return vec_mul (l3, l4); +} + +vector unsigned long long +foo126 (vector unsigned long long u3, vector unsigned long long u4) +{ + return vec_mul (u3, u4); +} + +vector int +foo127 (vector float fa) +{ + return vec_cts (fa, 0x1F); +} + +vector unsigned int +foo128 (vector float fa) +{ + return vec_ctu (fa, 0x1F); +} + +vector float +foo129 (vector float fa, vector float fb) +{ + return vec_mergee (fa, fb); +} + +vector float +foo130 (vector float fa, vector float fb) +{ + return vec_mergeo (fa, fb); +} + +vector double +foo131 (vector double da, vector double db) +{ + return vec_mergee (da, db); +} + +vector double +foo132 (vector double da, vector double db) +{ + return vec_mergeo (da, db); +} + +vector float +foo133 (vector signed int si_a) +{ + return vec_ctf (si_a, 1); +} + +vector float +foo134 (vector unsigned int ui_a) +{ + return vec_ctf (ui_a, 2); +} + +vector bool char +foo135 (vector bool char bca) +{ + return vec_splat (bca, 0); +} + +vector signed char +foo136 (vector signed char sca) +{ + return vec_splat (sca, 1); +} + +vector unsigned char +foo137 (vector unsigned char ucbc) +{ + return vec_splat (ucbc, 2); +} + +vector bool int +foo138 (vector bool int bia) +{ + return vec_splat (bia, 3); +} + +vector signed int +foo139 (vector signed int sia) +{ + return vec_splat (sia, 1); +} + +vector unsigned int +foo140 (vector unsigned int uia) +{ + return vec_splat (uia, 2); +} + +vector bool int +foo141 (vector bool int bia, vector bool int bib) +{ + return vec_mergee (bia, bib); +} + +vector signed int +foo142 (vector signed int sia, vector signed int sib) +{ + return vec_mergee (sia, sib); +} + +vector unsigned int +foo143 (vector unsigned int uia, vector unsigned int uib) +{ + return vec_mergee (uia, uib); +} + +vector bool char +foo144 (vector bool char bca, vector bool char bcb) +{ + return vec_mergeh (bca, bcb); +} + +vector signed char +foo145 (vector signed char sca, vector signed char scb) +{ + return vec_mergeh (sca, scb); +} + +vector bool int +foo146 (vector bool int bia, vector bool int bib) +{ + return vec_mergeh (bia, bib); +} + +vector signed int +foo147 (vector signed int sia, vector signed int sib) +{ + return vec_mergeh (sia, sib); +} + +vector unsigned int +foo148 (vector unsigned int uia, vector unsigned int uib) +{ + return vec_mergeh (uia, uib); +} + +vector bool short +foo149 (vector bool short bsa, vector bool short bsb) +{ + return vec_mergeh (bsa, bsb); +} + +vector bool int +foo150 (vector bool int bia, vector bool int bib) +{ + return vec_mergeo (bia, bib); +} + +vector signed int +foo151 (vector signed int sia, vector signed int sib) +{ + return vec_mergeo (sia, sib); +} + +vector unsigned int +foo152 (vector unsigned int uia, vector unsigned int uib) +{ + return vec_mergeo (uia, uib); +} + +vector pixel +foo153 (vector pixel pa) +{ + return vec_splat (pa, 1); +} + +vector bool short +foo154 (vector bool short bsa) +{ + return vec_splat (bsa, 0); +} + +vector signed short +foo155 (vector signed short ssa) +{ + return vec_splat (ssa, 2); +} + +vector unsigned short +foo156 (vector unsigned short usa) +{ + return vec_splat (usa, 1); } /* Expected results: @@ -278,13 +966,13 @@ int main () vec_and xxland vec_andc xxlandc vec_cntlz vclzd, vclzb, vclzw, vclzh - vec_cpsgn xvcpsgnsp - vec_ctf xvmuldp + vec_cpsgn xvcpsgnsp, xvcpsgndp + vec_ctf vcfux, vcfsx vec_cts vctsxs vec_ctu vctuxs - vec_div divd, divdu | __divdi3(), __udivdi3() - vec_mergel vmrghb, vmrghh, xxmrghw - vec_mergeh xxmrglw, vmrglh, vmrglb + vec_div divd, divdu | __divdi3, __udivdi3 + vec_mergel vmrglb, vmrglh, xxmrglw, xxpermdi + vec_mergeh xxmrghw, vmrghh, vmrghb, xxpermdi vec_mul mulld | mullw, mulhwu vec_nor xxlnor vec_packsu vpkudus @@ -292,66 +980,58 @@ int main () vec_round xvrdpi vec_sel xxsel vec_xor xxlxor - vec_rsqrt xvrsqrtesp - vec_rsqrte xvrsqrtesp + vec_rsqrt xvrsqrtesp, xvrsqrtedp + vec_rsqrte xvrsqrtesp, xvrsqrtedp vec_xl lxvd2x vec_xst stxvd2x - vec_splat xxspltb, xxspltw, vsplth - vec_mergee xxmrgld, vmrgow - vec_mergeo xxmrghd, vmrgew */ + vec_splat xxspltb | vspltb, xxspltw | vspltw, xxsplth | vsplth, + xxpermdi + vec_mergee xxpermdi, vmrgew + vec_mergeo xxpermdi, vmrgow */ -/* { dg-final { scan-assembler-times "vcmpequd" 8 } } */ -/* { dg-final { scan-assembler-times "vcmpgtud" 16 } } */ -/* { dg-final { scan-assembler-times "xxland" 30 } } */ -/* { dg-final { scan-assembler-times "xxlandc" 13 } } */ -/* { dg-final { scan-assembler-times "vclzb" 2 } } */ -/* { dg-final { scan-assembler-times "vclzd" 2 } } */ -/* { dg-final { scan-assembler-times "vclzw" 2 } } */ -/* { dg-final { scan-assembler-times "vclzh" 2 } } */ -/* { dg-final { scan-assembler-times "xvcpsgnsp" 1 } } */ -/* { dg-final { scan-assembler-times "xvcpsgndp" 1 } } */ -/* { dg-final { scan-assembler-times "xvmuldp" 2 } } */ -/* { dg-final { scan-assembler-times "xvcvdpsxds" 0 } } */ -/* { dg-final { scan-assembler-times "vctsxs" 2 } } */ -/* { dg-final { scan-assembler-times "xvcvdpuxds" 0 } } */ -/* { dg-final { scan-assembler-times "vctuxs" 2 } } */ +/* { dg-final { scan-assembler-times {\mvcmpequd\.} 4 } } */ +/* { dg-final { scan-assembler-times {\mvcmpgtud\.} 8 } } */ +/* { dg-final { scan-assembler-times {\mxxland\M} 17 } } */ +/* { dg-final { scan-assembler-times {\mxxlandc\M} 13 } } */ +/* { dg-final { scan-assembler-times {\mvclzb\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mvclzd\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mvclzw\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mvclzh\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mxvcpsgnsp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mxvcpsgndp\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mvcfsx\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mvcfux\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mvctsxs\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mvctuxs\M} 1 } } */ -/* { dg-final { scan-assembler-times "vmrghb" 4 { target be } } } */ -/* { dg-final { scan-assembler-times "vmrghb" 6 { target le } } } */ -/* { dg-final { scan-assembler-times "vmrghh" 8 } } */ -/* { dg-final { scan-assembler-times "xxmrghw" 4 } } */ -/* { dg-final { scan-assembler-times "xxmrglw" 4 } } */ -/* { dg-final { scan-assembler-times "vmrglh" 8 } } */ -/* { dg-final { scan-assembler-times "xxlnor" 6 } } */ +/* { dg-final { scan-assembler-times {\mvmrghb\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mvmrghh\M} 4 } } */ +/* { dg-final { scan-assembler-times {\mxxmrghw\M} 4 } } */ +/* { dg-final { scan-assembler-times {\mxxmrglw\M} 4 } } */ +/* { dg-final { scan-assembler-times {\mvmrglh\M} 4 } } */ +/* { dg-final { scan-assembler-times {\mxxlnor\M} 6 } } */ /* { dg-final { scan-assembler-times {\mvpkudus\M} 1 } } */ -/* { dg-final { scan-assembler-times "vperm" 4 } } */ -/* { dg-final { scan-assembler-times "xvrdpi" 2 } } */ -/* { dg-final { scan-assembler-times "xxsel" 5 } } */ -/* { dg-final { scan-assembler-times "xxlxor" 6 } } */ -/* { dg-final { scan-assembler-times "divd" 8 { target lp64 } } } */ -/* { dg-final { scan-assembler-times "divdu" 2 { target lp64 } } } */ -/* { dg-final { scan-assembler-times "mulld" 4 { target lp64 } } } */ +/* { dg-final { scan-assembler-times {\mvperm\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mxvrdpi\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mvrfin\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mxxsel\M} 5 } } */ +/* { dg-final { scan-assembler-times {\mxxlxor\M} 6 } } */ +/* { dg-final { scan-assembler-times {\mdivd\M} 2 { target lp64 } } } */ +/* { dg-final { scan-assembler-times {\mdivdu\M} 2 { target lp64 } } } */ +/* { dg-final { scan-assembler-times {\mmulld\M} 4 { target lp64 } } } */ /* check for .__divdi3 (AIX), __divdi3 (Linux) and ___divdi3 (Darwin) */ /* { dg-final { scan-assembler-times {\mbl \.?_?__divdi3\M} 2 { target { ilp32 } } } } */ /* check for both .__udivdi3 (AIX), __udivdi3 (Linux) and ___udivdi3 (Darwin) */ /* { dg-final { scan-assembler-times {\mbl \.?_?__udivdi3\M} 2 { target { ilp32 } } } } */ -/* { dg-final { scan-assembler-times "mullw" 12 { target ilp32 } } } */ -/* { dg-final { scan-assembler-times "mulhwu" 4 { target ilp32 } } } */ -/* { dg-final { scan-assembler-times "xxmrgld" 0 } } */ -/* { dg-final { scan-assembler-times "xxmrghd" 0 } } */ -/* { dg-final { scan-assembler-times "xvrsqrtesp" 2 } } */ -/* { dg-final { scan-assembler-times "xvrsqrtedp" 2 } } */ -/* { dg-final { scan-assembler-times "xxspltd" 8 } } */ -/* { dg-final { scan-assembler-times "vcfsx" 2 } } */ -/* { dg-final { scan-assembler-times "vcfux" 2 } } */ -/* { dg-final { scan-assembler-times "vspltb" 6 } } */ -/* { dg-final { scan-assembler-times "vspltw" 0 } } */ -/* { dg-final { scan-assembler-times "vmrgow" 8 } } */ -/* { dg-final { scan-assembler-times "vmrglb" 4 { target le } } } */ -/* { dg-final { scan-assembler-times "vmrglb" 6 { target be } } } */ -/* { dg-final { scan-assembler-times "vmrgew" 8 } } */ -/* { dg-final { scan-assembler-times "vsplth" 8 } } */ -/* { dg-final { scan-assembler-times "vcmpequd." 8 } } */ -/* { dg-final { scan-assembler-times "vcmpgtud." 16 } } */ -/* { dg-final { scan-assembler-times "vrfin" 2 } } */ - +/* { dg-final { scan-assembler-times {\mmullw\M} 12 { target ilp32 } } } */ +/* { dg-final { scan-assembler-times {\mxvrsqrtesp\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mxvrsqrtedp\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mvcfsx\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mvcfux\M} 1 } } */ +/* { dg-final { scan-assembler-times {\mvspltb|xxspltb\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mvspltw|xxspltw\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mvmrgow\M} 4 } } */ +/* { dg-final { scan-assembler-times {\mvmrglb\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mvmrgew\M} 4 } } */ +/* { dg-final { scan-assembler-times {\mvsplth|xxsplth\M} 4 } } */ +/* { dg-final { scan-assembler-times {\mxxpermdi\M} 44 } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/builtins-5.c b/gcc/testsuite/gcc.target/powerpc/builtins-5.c index 9c25329fb1e..c6c7ebf3aef 100644 --- a/gcc/testsuite/gcc.target/powerpc/builtins-5.c +++ b/gcc/testsuite/gcc.target/powerpc/builtins-5.c @@ -1,7 +1,6 @@ /* { dg-do compile } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ -/* { dg-options "-mdejagnu-cpu=power8 -O0 -mno-fold-gimple -dp" } */ -/* { dg-prune-output "gimple folding of rs6000 builtins has been disabled." } */ +/* { dg-options "-mdejagnu-cpu=power8 -O0 -dp" } */ #include diff --git a/gcc/testsuite/gcc.target/powerpc/p8-vec-xl-xst.c b/gcc/testsuite/gcc.target/powerpc/p8-vec-xl-xst.c index 75340b09afc..ed31e608296 100644 --- a/gcc/testsuite/gcc.target/powerpc/p8-vec-xl-xst.c +++ b/gcc/testsuite/gcc.target/powerpc/p8-vec-xl-xst.c @@ -1,8 +1,7 @@ /* { dg-do compile { target { le } } } */ /* { dg-skip-if "" { powerpc*-*-darwin* } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ -/* { dg-options "-mdejagnu-cpu=power8 -O2 -mno-fold-gimple" } */ -/* { dg-prune-output "gimple folding of rs6000 builtins has been disabled." } */ +/* { dg-options "-mdejagnu-cpu=power8 -O2" } */ /* Verify fix for problem where vec_xl and vec_xst are not recognized for the vector char and vector short cases on P8 only. */ diff --git a/gcc/testsuite/gcc.target/powerpc/pr83926.c b/gcc/testsuite/gcc.target/powerpc/pr83926.c index 2490e1d48ba..038238d13cf 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr83926.c +++ b/gcc/testsuite/gcc.target/powerpc/pr83926.c @@ -1,6 +1,5 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ -/* { dg-options "-O2 -mdejagnu-cpu=power8 -mno-fold-gimple" } */ -/* { dg-prune-output "gimple folding of rs6000 builtins has been disabled." } */ +/* { dg-options "-O2 -mdejagnu-cpu=power8" } */ __attribute__ ((altivec(vector__))) long long sdiv (__attribute__ ((altivec(vector__))) long long a, diff --git a/gcc/testsuite/gcc.target/powerpc/pr86731-nogimplefold-longlong.c b/gcc/testsuite/gcc.target/powerpc/pr86731-nogimplefold-longlong.c deleted file mode 100644 index 2c463120676..00000000000 --- a/gcc/testsuite/gcc.target/powerpc/pr86731-nogimplefold-longlong.c +++ /dev/null @@ -1,32 +0,0 @@ -/* PR86731. Verify that the rs6000 gimple-folding code handles the - left shift operation properly. This is a testcase variation that - explicitly disables gimple folding. */ - -/* { dg-do compile } */ -/* { dg-require-effective-target powerpc_p8vector_ok } */ -/* { dg-require-effective-target lp64 } */ -/* { dg-options "-maltivec -O3 -fwrapv -mno-fold-gimple -mpower8-vector " } */ -/* { dg-prune-output "gimple folding of rs6000 builtins has been disabled." } */ - - -#include - -vector unsigned long long splatu4(void) -{ - vector unsigned long long mzero = {-1,-1}; - return (vector unsigned long long) vec_sl(mzero, mzero); -} - -vector signed long long splats4(void) -{ - vector unsigned long long mzero = {-1,-1}; - return (vector signed long long) vec_sl(mzero, mzero); -} - -/* Codegen will consist of splat and shift instructions for most types. - Noted variations: if gimple folding is disabled, or if -fwrapv is not specified, the - long long tests will generate a vspltisw+vsld pair, versus generating a lvx. */ -/* { dg-final { scan-assembler-times {\mvspltis[bhw]\M|\mxxspltib\M} 2 } } */ -/* { dg-final { scan-assembler-times {\mvsl[bhwd]\M} 2 } } */ -/* { dg-final { scan-assembler-times {\mlvx\M} 0 } } */ - diff --git a/gcc/testsuite/gcc.target/powerpc/pr86731-nogimplefold.c b/gcc/testsuite/gcc.target/powerpc/pr86731-nogimplefold.c deleted file mode 100644 index d424b0c488e..00000000000 --- a/gcc/testsuite/gcc.target/powerpc/pr86731-nogimplefold.c +++ /dev/null @@ -1,63 +0,0 @@ -/* PR86731. Verify that the rs6000 gimple-folding code handles the - left shift operation properly. This is a testcase variation that - explicitly disables gimple folding. */ - -/* { dg-do compile } */ -/* { dg-require-effective-target powerpc_altivec_ok } */ -/* { dg-require-effective-target lp64 } */ -/* { dg-options "-maltivec -O3 -fwrapv -mno-fold-gimple" } */ -/* { dg-prune-output "gimple folding of rs6000 builtins has been disabled." } */ - - -#include -/* original test as reported. */ -vector unsigned int splat(void) -{ - vector unsigned int mzero = vec_splat_u32(-1); - return (vector unsigned int) vec_sl(mzero, mzero); -} - -/* more testcase variations. */ -vector unsigned char splatu1(void) -{ - vector unsigned char mzero = vec_splat_u8(-1); - return (vector unsigned char) vec_sl(mzero, mzero); -} - -vector unsigned short splatu2(void) -{ - vector unsigned short mzero = vec_splat_u16(-1); - return (vector unsigned short) vec_sl(mzero, mzero); -} - -vector unsigned int splatu3(void) -{ - vector unsigned int mzero = vec_splat_u32(-1); - return (vector unsigned int) vec_sl(mzero, mzero); -} - -vector signed char splats1(void) -{ - vector unsigned char mzero = vec_splat_u8(-1); - return (vector signed char) vec_sl(mzero, mzero); -} - -vector signed short splats2(void) -{ - vector unsigned short mzero = vec_splat_u16(-1); - return (vector signed short) vec_sl(mzero, mzero); -} - -vector signed int splats3(void) -{ - vector unsigned int mzero = vec_splat_u32(-1); - return (vector signed int) vec_sl(mzero, mzero); -} - -/* Codegen will consist of splat and shift instructions for most types. - Noted variations: if gimple folding is disabled, or if -fwrapv is not specified, the - long long tests will generate a vspltisw+vsld pair, versus generating a lvx. */ -/* { dg-final { scan-assembler-times {\mvspltis[bhw]\M|\mxxspltib\M} 7 } } */ -/* { dg-final { scan-assembler-times {\mvsl[bhwd]\M} 7 } } */ -/* { dg-final { scan-assembler-times {\mlvx\M} 0 } } */ - diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-17.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-17.c index 5edbca46f9f..342ccd64a04 100644 --- a/gcc/testsuite/gcc.target/powerpc/swaps-p8-17.c +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-17.c @@ -1,7 +1,6 @@ /* { dg-do compile { target { le } } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ -/* { dg-options "-mdejagnu-cpu=power8 -O1 -mno-fold-gimple" } */ -/* { dg-prune-output "gimple folding of rs6000 builtins has been disabled." } */ +/* { dg-options "-mdejagnu-cpu=power8 -O1" } */ /* { dg-final { scan-assembler "lxvd2x" } } */ /* { dg-final { scan-assembler "xxpermdi" } } */