c-pch.c (get_ident): Avoid C++ keywords.
* c-pch.c (get_ident): Avoid C++ keywords. * combine-stack-adj.c (single_set_for_csa): Likewise. * final.c (asm_insn_count, final_scan_insn, alter_subreg, output_asm_insn): Likewise. * reload.c (push_secondary_reload, find_reusable_reload, push_reload, combine_reloads, find_reloads, debug_reload_to_stream): Likewise. * reload.h (struct reload): Likewise. * reload1.c (reload_reg_class_lower, find_reg, find_reload_regs, allocate_reload_reg, choose_reload_regs, emit_input_reload_insns, emit_output_reload_insns): Likewise. * targhooks.c (default_secondary_reload): Likewise. * varasm.c (section_entry_eq, object_block_entry_eq): Likewise. From-SVN: r137895
This commit is contained in:
Kaveh R. Ghazi
Kaveh Ghazi
parent
55d796dacb
commit
48c5422943
@ -1,3 +1,19 @@
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2008-07-16 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
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* c-pch.c (get_ident): Avoid C++ keywords.
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* combine-stack-adj.c (single_set_for_csa): Likewise.
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* final.c (asm_insn_count, final_scan_insn, alter_subreg,
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output_asm_insn): Likewise.
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* reload.c (push_secondary_reload, find_reusable_reload,
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push_reload, combine_reloads, find_reloads,
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debug_reload_to_stream): Likewise.
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* reload.h (struct reload): Likewise.
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* reload1.c (reload_reg_class_lower, find_reg, find_reload_regs,
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allocate_reload_reg, choose_reload_regs, emit_input_reload_insns,
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emit_output_reload_insns): Likewise.
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* targhooks.c (default_secondary_reload): Likewise.
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* varasm.c (section_entry_eq, object_block_entry_eq): Likewise.
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2008-07-16 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
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* recog.c (validate_change_1, validate_change,
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@ -93,10 +93,10 @@ static const char *
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get_ident (void)
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{
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static char result[IDENT_LENGTH];
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static const char template[IDENT_LENGTH] = "gpch.013";
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static const char templ[IDENT_LENGTH] = "gpch.013";
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static const char c_language_chars[] = "Co+O";
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memcpy (result, template, IDENT_LENGTH);
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memcpy (result, templ, IDENT_LENGTH);
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result[4] = c_language_chars[c_language];
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return result;
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@ -143,14 +143,14 @@ single_set_for_csa (rtx insn)
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for (i = 1; i < XVECLEN (tmp, 0); ++i)
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{
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rtx this = XVECEXP (tmp, 0, i);
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rtx this_rtx = XVECEXP (tmp, 0, i);
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/* The special case is allowing a no-op set. */
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if (GET_CODE (this) == SET
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&& SET_SRC (this) == SET_DEST (this))
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if (GET_CODE (this_rtx) == SET
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&& SET_SRC (this_rtx) == SET_DEST (this_rtx))
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;
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else if (GET_CODE (this) != CLOBBER
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&& GET_CODE (this) != USE)
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else if (GET_CODE (this_rtx) != CLOBBER
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&& GET_CODE (this_rtx) != USE)
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return NULL_RTX;
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}
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42
gcc/final.c
42
gcc/final.c
@ -1377,20 +1377,20 @@ shorten_branches (rtx first ATTRIBUTE_UNUSED)
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static int
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asm_insn_count (rtx body)
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{
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const char *template;
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const char *templ;
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int count = 1;
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if (GET_CODE (body) == ASM_INPUT)
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template = XSTR (body, 0);
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templ = XSTR (body, 0);
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else
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template = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
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templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL);
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if (!*template)
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if (!*templ)
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return 0;
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for (; *template; template++)
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if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template, template)
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|| *template == '\n')
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for (; *templ; templ++)
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if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ)
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|| *templ == '\n')
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count++;
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return count;
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@ -2039,7 +2039,7 @@ final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED,
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{
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rtx body = PATTERN (insn);
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int insn_code_number;
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const char *template;
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const char *templ;
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#ifdef HAVE_conditional_execution
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/* Reset this early so it is correct for ASM statements. */
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@ -2556,12 +2556,12 @@ final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED,
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#endif
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/* Find the proper template for this insn. */
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template = get_insn_template (insn_code_number, insn);
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templ = get_insn_template (insn_code_number, insn);
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/* If the C code returns 0, it means that it is a jump insn
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which follows a deleted test insn, and that test insn
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needs to be reinserted. */
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if (template == 0)
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if (templ == 0)
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{
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rtx prev;
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@ -2584,12 +2584,12 @@ final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED,
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/* If the template is the string "#", it means that this insn must
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be split. */
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if (template[0] == '#' && template[1] == '\0')
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if (templ[0] == '#' && templ[1] == '\0')
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{
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rtx new = try_split (body, insn, 0);
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rtx new_rtx = try_split (body, insn, 0);
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/* If we didn't split the insn, go away. */
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if (new == insn && PATTERN (new) == body)
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if (new_rtx == insn && PATTERN (new_rtx) == body)
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fatal_insn ("could not split insn", insn);
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#ifdef HAVE_ATTR_length
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@ -2599,7 +2599,7 @@ final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED,
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gcc_unreachable ();
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#endif
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return new;
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return new_rtx;
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}
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#ifdef TARGET_UNWIND_INFO
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@ -2610,7 +2610,7 @@ final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED,
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#endif
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/* Output assembler code from the template. */
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output_asm_insn (template, recog_data.operand);
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output_asm_insn (templ, recog_data.operand);
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/* If necessary, report the effect that the instruction has on
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the unwind info. We've already done this for delay slots
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@ -2739,11 +2739,11 @@ alter_subreg (rtx *xp)
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}
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else
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{
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rtx new = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
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rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
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SUBREG_BYTE (x));
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if (new != 0)
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*xp = new;
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if (new_rtx != 0)
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*xp = new_rtx;
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else if (REG_P (y))
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{
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/* Simplify_subreg can't handle some REG cases, but we have to. */
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@ -3097,7 +3097,7 @@ output_asm_operand_names (rtx *operands, int *oporder, int nops)
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of the operand, with no other punctuation. */
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void
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output_asm_insn (const char *template, rtx *operands)
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output_asm_insn (const char *templ, rtx *operands)
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{
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const char *p;
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int c;
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@ -3110,11 +3110,11 @@ output_asm_insn (const char *template, rtx *operands)
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/* An insn may return a null string template
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in a case where no assembler code is needed. */
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if (*template == 0)
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if (*templ == 0)
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return;
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memset (opoutput, 0, sizeof opoutput);
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p = template;
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p = templ;
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putc ('\t', asm_out_file);
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#ifdef ASM_OUTPUT_OPCODE
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66
gcc/reload.c
66
gcc/reload.c
@ -428,8 +428,8 @@ push_secondary_reload (int in_p, rtx x, int opnum, int optional,
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/* See if we can reuse an existing secondary reload. */
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for (s_reload = 0; s_reload < n_reloads; s_reload++)
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if (rld[s_reload].secondary_p
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&& (reg_class_subset_p (rclass, rld[s_reload].class)
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|| reg_class_subset_p (rld[s_reload].class, rclass))
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&& (reg_class_subset_p (rclass, rld[s_reload].rclass)
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|| reg_class_subset_p (rld[s_reload].rclass, rclass))
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&& ((in_p && rld[s_reload].inmode == mode)
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|| (! in_p && rld[s_reload].outmode == mode))
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&& ((in_p && rld[s_reload].secondary_in_reload == t_reload)
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@ -445,8 +445,8 @@ push_secondary_reload (int in_p, rtx x, int opnum, int optional,
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if (! in_p)
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rld[s_reload].outmode = mode;
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if (reg_class_subset_p (rclass, rld[s_reload].class))
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rld[s_reload].class = rclass;
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if (reg_class_subset_p (rclass, rld[s_reload].rclass))
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rld[s_reload].rclass = rclass;
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rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
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rld[s_reload].optional &= optional;
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@ -479,7 +479,7 @@ push_secondary_reload (int in_p, rtx x, int opnum, int optional,
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/* We need to make a new secondary reload for this register class. */
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rld[s_reload].in = rld[s_reload].out = 0;
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rld[s_reload].class = rclass;
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rld[s_reload].rclass = rclass;
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rld[s_reload].inmode = in_p ? mode : VOIDmode;
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rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
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@ -732,8 +732,8 @@ find_reusable_reload (rtx *p_in, rtx out, enum reg_class rclass,
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than we otherwise would. */
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for (i = 0; i < n_reloads; i++)
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if ((reg_class_subset_p (rclass, rld[i].class)
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|| reg_class_subset_p (rld[i].class, rclass))
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if ((reg_class_subset_p (rclass, rld[i].rclass)
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|| reg_class_subset_p (rld[i].rclass, rclass))
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/* If the existing reload has a register, it must fit our class. */
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&& (rld[i].reg_rtx == 0
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|| TEST_HARD_REG_BIT (reg_class_contents[(int) rclass],
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@ -753,8 +753,8 @@ find_reusable_reload (rtx *p_in, rtx out, enum reg_class rclass,
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the preincrementation as happening before any ref in this insn
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to that register. */
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for (i = 0; i < n_reloads; i++)
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if ((reg_class_subset_p (rclass, rld[i].class)
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|| reg_class_subset_p (rld[i].class, rclass))
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if ((reg_class_subset_p (rclass, rld[i].rclass)
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|| reg_class_subset_p (rld[i].rclass, rclass))
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/* If the existing reload has a register, it must fit our
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class. */
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&& (rld[i].reg_rtx == 0
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@ -1327,7 +1327,7 @@ push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
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i = n_reloads;
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rld[i].in = in;
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rld[i].out = out;
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rld[i].class = rclass;
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rld[i].rclass = rclass;
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rld[i].inmode = inmode;
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rld[i].outmode = outmode;
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rld[i].reg_rtx = 0;
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@ -1411,8 +1411,8 @@ push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
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rld[i].out = out;
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rld[i].out_reg = outloc ? *outloc : 0;
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}
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if (reg_class_subset_p (rclass, rld[i].class))
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rld[i].class = rclass;
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if (reg_class_subset_p (rclass, rld[i].rclass))
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rld[i].rclass = rclass;
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rld[i].optional &= optional;
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if (MERGE_TO_OTHER (type, rld[i].when_needed,
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opnum, rld[i].opnum))
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@ -1484,7 +1484,7 @@ push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
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{
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rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
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inmode, outmode,
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rld[i].class, i,
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rld[i].rclass, i,
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earlyclobber_operand_p (out));
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/* If the outgoing register already contains the same value
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@ -1730,8 +1730,8 @@ combine_reloads (void)
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&& rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
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&& rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
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&& rld[i].when_needed != RELOAD_OTHER
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&& (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode)
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== CLASS_MAX_NREGS (rld[output_reload].class,
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&& (CLASS_MAX_NREGS (rld[i].rclass, rld[i].inmode)
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== CLASS_MAX_NREGS (rld[output_reload].rclass,
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rld[output_reload].outmode))
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&& rld[i].inc == 0
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&& rld[i].reg_rtx == 0
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@ -1744,11 +1744,11 @@ combine_reloads (void)
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secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
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#endif
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&& (SMALL_REGISTER_CLASSES
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? (rld[i].class == rld[output_reload].class)
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: (reg_class_subset_p (rld[i].class,
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rld[output_reload].class)
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|| reg_class_subset_p (rld[output_reload].class,
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rld[i].class)))
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? (rld[i].rclass == rld[output_reload].rclass)
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: (reg_class_subset_p (rld[i].rclass,
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rld[output_reload].rclass)
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|| reg_class_subset_p (rld[output_reload].rclass,
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rld[i].rclass)))
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&& (MATCHES (rld[i].in, rld[output_reload].out)
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/* Args reversed because the first arg seems to be
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the one that we imagine being modified
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@ -1766,7 +1766,7 @@ combine_reloads (void)
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rld[output_reload].out))))
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&& ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode,
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rld[i].when_needed != RELOAD_FOR_INPUT)
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&& (reg_class_size[(int) rld[i].class]
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&& (reg_class_size[(int) rld[i].rclass]
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|| SMALL_REGISTER_CLASSES)
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/* We will allow making things slightly worse by combining an
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input and an output, but no worse than that. */
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@ -1799,9 +1799,9 @@ combine_reloads (void)
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= secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
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#endif
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/* If required, minimize the register class. */
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if (reg_class_subset_p (rld[output_reload].class,
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rld[i].class))
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rld[i].class = rld[output_reload].class;
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if (reg_class_subset_p (rld[output_reload].rclass,
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rld[i].rclass))
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rld[i].rclass = rld[output_reload].rclass;
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/* Transfer all replacements from the old reload to the combined. */
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for (j = 0; j < n_replacements; j++)
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@ -1835,7 +1835,7 @@ combine_reloads (void)
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rld[output_reload].out)
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&& (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
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&& HARD_REGNO_MODE_OK (regno, rld[output_reload].outmode)
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&& TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class],
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&& TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].rclass],
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regno)
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&& (hard_regno_nregs[regno][rld[output_reload].outmode]
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<= hard_regno_nregs[regno][GET_MODE (XEXP (note, 0))])
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@ -1843,10 +1843,10 @@ combine_reloads (void)
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won't want this register. */
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&& ((secondary_out = rld[output_reload].secondary_out_reload) == -1
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|| (!(TEST_HARD_REG_BIT
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(reg_class_contents[(int) rld[secondary_out].class], regno))
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(reg_class_contents[(int) rld[secondary_out].rclass], regno))
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&& ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
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|| !(TEST_HARD_REG_BIT
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(reg_class_contents[(int) rld[secondary_out].class],
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(reg_class_contents[(int) rld[secondary_out].rclass],
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regno)))))
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&& !fixed_regs[regno]
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/* Check that a former pseudo is valid; see find_dummy_reload. */
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@ -4184,7 +4184,7 @@ find_reloads (rtx insn, int replace, int ind_levels, int live_known,
|
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&& rld[i].out == 0)
|
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{
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rld[i].reg_rtx
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= find_equiv_reg (rld[i].in, insn, rld[i].class, -1,
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= find_equiv_reg (rld[i].in, insn, rld[i].rclass, -1,
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static_reload_reg_p, 0, rld[i].inmode);
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/* Prevent generation of insn to load the value
|
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because the one we found already has the value. */
|
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@ -4453,7 +4453,7 @@ find_reloads (rtx insn, int replace, int ind_levels, int live_known,
|
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if (i != j && rld[j].in != 0 && rld[j].out == 0
|
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&& rld[j].when_needed == rld[i].when_needed
|
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&& MATCHES (rld[i].in, rld[j].in)
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&& rld[i].class == rld[j].class
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&& rld[i].rclass == rld[j].rclass
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&& !rld[i].nocombine && !rld[j].nocombine
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&& rld[i].reg_rtx == rld[j].reg_rtx)
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{
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@ -4482,7 +4482,7 @@ find_reloads (rtx insn, int replace, int ind_levels, int live_known,
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> GET_MODE_SIZE (rld[i].inmode)))
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? rld[i].outmode : rld[i].inmode;
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rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode);
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rld[i].nregs = CLASS_MAX_NREGS (rld[i].rclass, rld[i].mode);
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}
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/* Special case a simple move with an input reload and a
|
||||
@ -4499,14 +4499,14 @@ find_reloads (rtx insn, int replace, int ind_levels, int live_known,
|
||||
unsigned int regno = REGNO (dest);
|
||||
|
||||
if (regno < FIRST_PSEUDO_REGISTER
|
||||
&& TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno)
|
||||
&& TEST_HARD_REG_BIT (reg_class_contents[rld[i].rclass], regno)
|
||||
&& HARD_REGNO_MODE_OK (regno, rld[i].mode))
|
||||
{
|
||||
int nr = hard_regno_nregs[regno][rld[i].mode];
|
||||
int ok = 1, nri;
|
||||
|
||||
for (nri = 1; nri < nr; nri ++)
|
||||
if (! TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno + nri))
|
||||
if (! TEST_HARD_REG_BIT (reg_class_contents[rld[i].rclass], regno + nri))
|
||||
ok = 0;
|
||||
|
||||
if (ok)
|
||||
@ -7262,7 +7262,7 @@ debug_reload_to_stream (FILE *f)
|
||||
fprintf (f, "\n\t");
|
||||
}
|
||||
|
||||
fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]);
|
||||
fprintf (f, "%s, ", reg_class_names[(int) rld[r].rclass]);
|
||||
|
||||
fprintf (f, "%s (opnum = %d)",
|
||||
reload_when_needed_name[(int) rld[r].when_needed],
|
||||
|
||||
@ -83,7 +83,7 @@ struct reload
|
||||
rtx out;
|
||||
|
||||
/* The class of registers to reload into. */
|
||||
enum reg_class class;
|
||||
enum reg_class rclass;
|
||||
|
||||
/* The mode this operand should have when reloaded, on input. */
|
||||
enum machine_mode inmode;
|
||||
|
||||
@ -1637,8 +1637,8 @@ reload_reg_class_lower (const void *r1p, const void *r2p)
|
||||
return t;
|
||||
|
||||
/* Count all solitary classes before non-solitary ones. */
|
||||
t = ((reg_class_size[(int) rld[r2].class] == 1)
|
||||
- (reg_class_size[(int) rld[r1].class] == 1));
|
||||
t = ((reg_class_size[(int) rld[r2].rclass] == 1)
|
||||
- (reg_class_size[(int) rld[r1].rclass] == 1));
|
||||
if (t != 0)
|
||||
return t;
|
||||
|
||||
@ -1648,7 +1648,7 @@ reload_reg_class_lower (const void *r1p, const void *r2p)
|
||||
return t;
|
||||
|
||||
/* Consider reloads in order of increasing reg-class number. */
|
||||
t = (int) rld[r1].class - (int) rld[r2].class;
|
||||
t = (int) rld[r1].rclass - (int) rld[r2].rclass;
|
||||
if (t != 0)
|
||||
return t;
|
||||
|
||||
@ -1777,7 +1777,7 @@ find_reg (struct insn_chain *chain, int order)
|
||||
|
||||
COPY_HARD_REG_SET (not_usable, bad_spill_regs);
|
||||
IOR_HARD_REG_SET (not_usable, bad_spill_regs_global);
|
||||
IOR_COMPL_HARD_REG_SET (not_usable, reg_class_contents[rl->class]);
|
||||
IOR_COMPL_HARD_REG_SET (not_usable, reg_class_contents[rl->rclass]);
|
||||
|
||||
CLEAR_HARD_REG_SET (used_by_other_reload);
|
||||
for (k = 0; k < order; k++)
|
||||
@ -1918,7 +1918,7 @@ find_reload_regs (struct insn_chain *chain)
|
||||
{
|
||||
if (dump_file)
|
||||
fprintf (dump_file, "reload failure for reload %d\n", r);
|
||||
spill_failure (chain->insn, rld[r].class);
|
||||
spill_failure (chain->insn, rld[r].rclass);
|
||||
failure = 1;
|
||||
return;
|
||||
}
|
||||
@ -5474,7 +5474,7 @@ allocate_reload_reg (struct insn_chain *chain ATTRIBUTE_UNUSED, int r,
|
||||
|
||||
for (count = 0; count < n_spills; count++)
|
||||
{
|
||||
int rclass = (int) rld[r].class;
|
||||
int rclass = (int) rld[r].rclass;
|
||||
int regnum;
|
||||
|
||||
i++;
|
||||
@ -5647,7 +5647,7 @@ choose_reload_regs (struct insn_chain *chain)
|
||||
{
|
||||
max_group_size = MAX (rld[j].nregs, max_group_size);
|
||||
group_class
|
||||
= reg_class_superunion[(int) rld[j].class][(int) group_class];
|
||||
= reg_class_superunion[(int) rld[j].rclass][(int) group_class];
|
||||
}
|
||||
|
||||
save_reload_reg_rtx[j] = rld[j].reg_rtx;
|
||||
@ -5793,7 +5793,7 @@ choose_reload_regs (struct insn_chain *chain)
|
||||
#endif
|
||||
)
|
||||
{
|
||||
enum reg_class rclass = rld[r].class, last_class;
|
||||
enum reg_class rclass = rld[r].rclass, last_class;
|
||||
rtx last_reg = reg_last_reload_reg[regno];
|
||||
enum machine_mode need_mode;
|
||||
|
||||
@ -5857,7 +5857,7 @@ choose_reload_regs (struct insn_chain *chain)
|
||||
|
||||
bad_for_class = 0;
|
||||
for (k = 0; k < nr; k++)
|
||||
bad_for_class |= ! TEST_HARD_REG_BIT (reg_class_contents[(int) rld[r].class],
|
||||
bad_for_class |= ! TEST_HARD_REG_BIT (reg_class_contents[(int) rld[r].rclass],
|
||||
i+k);
|
||||
|
||||
/* We found a register that contains the
|
||||
@ -5939,7 +5939,7 @@ choose_reload_regs (struct insn_chain *chain)
|
||||
|| REG_P (rld[r].in)
|
||||
|| MEM_P (rld[r].in))
|
||||
&& (rld[r].nregs == max_group_size
|
||||
|| ! reg_classes_intersect_p (rld[r].class, group_class)))
|
||||
|| ! reg_classes_intersect_p (rld[r].rclass, group_class)))
|
||||
search_equiv = rld[r].in;
|
||||
/* If this is an output reload from a simple move insn, look
|
||||
if an equivalence for the input is available. */
|
||||
@ -5956,7 +5956,7 @@ choose_reload_regs (struct insn_chain *chain)
|
||||
if (search_equiv)
|
||||
{
|
||||
rtx equiv
|
||||
= find_equiv_reg (search_equiv, insn, rld[r].class,
|
||||
= find_equiv_reg (search_equiv, insn, rld[r].rclass,
|
||||
-1, NULL, 0, rld[r].mode);
|
||||
int regno = 0;
|
||||
|
||||
@ -5997,7 +5997,7 @@ choose_reload_regs (struct insn_chain *chain)
|
||||
{
|
||||
regs_used |= TEST_HARD_REG_BIT (reload_reg_used_at_all,
|
||||
i);
|
||||
bad_for_class |= ! TEST_HARD_REG_BIT (reg_class_contents[(int) rld[r].class],
|
||||
bad_for_class |= ! TEST_HARD_REG_BIT (reg_class_contents[(int) rld[r].rclass],
|
||||
i);
|
||||
}
|
||||
|
||||
@ -6135,9 +6135,9 @@ choose_reload_regs (struct insn_chain *chain)
|
||||
|| rld[s].optional)
|
||||
continue;
|
||||
|
||||
if ((rld[s].class != rld[r].class
|
||||
&& reg_classes_intersect_p (rld[r].class,
|
||||
rld[s].class))
|
||||
if ((rld[s].rclass != rld[r].rclass
|
||||
&& reg_classes_intersect_p (rld[r].rclass,
|
||||
rld[s].rclass))
|
||||
|| rld[s].nregs < rld[r].nregs)
|
||||
break;
|
||||
}
|
||||
@ -6818,7 +6818,7 @@ emit_input_reload_insns (struct insn_chain *chain, struct reload *rl,
|
||||
|
||||
sri.icode = CODE_FOR_nothing;
|
||||
sri.prev_sri = NULL;
|
||||
new_class = targetm.secondary_reload (1, real_oldequiv, rl->class,
|
||||
new_class = targetm.secondary_reload (1, real_oldequiv, rl->rclass,
|
||||
mode, &sri);
|
||||
|
||||
if (new_class == NO_REGS && sri.icode == CODE_FOR_nothing)
|
||||
@ -7008,7 +7008,7 @@ emit_output_reload_insns (struct insn_chain *chain, struct reload *rl,
|
||||
&& reg_equiv_mem[REGNO (old)] != 0)
|
||||
real_old = reg_equiv_mem[REGNO (old)];
|
||||
|
||||
if (secondary_reload_class (0, rl->class, mode, real_old) != NO_REGS)
|
||||
if (secondary_reload_class (0, rl->rclass, mode, real_old) != NO_REGS)
|
||||
{
|
||||
rtx second_reloadreg = reloadreg;
|
||||
reloadreg = rld[secondary_reload].reg_rtx;
|
||||
|
||||
@ -581,7 +581,7 @@ default_secondary_reload (bool in_p ATTRIBUTE_UNUSED, rtx x ATTRIBUTE_UNUSED,
|
||||
enum machine_mode reload_mode ATTRIBUTE_UNUSED,
|
||||
secondary_reload_info *sri)
|
||||
{
|
||||
enum reg_class class = NO_REGS;
|
||||
enum reg_class rclass = NO_REGS;
|
||||
|
||||
if (sri->prev_sri && sri->prev_sri->t_icode != CODE_FOR_nothing)
|
||||
{
|
||||
@ -590,13 +590,13 @@ default_secondary_reload (bool in_p ATTRIBUTE_UNUSED, rtx x ATTRIBUTE_UNUSED,
|
||||
}
|
||||
#ifdef SECONDARY_INPUT_RELOAD_CLASS
|
||||
if (in_p)
|
||||
class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
|
||||
rclass = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
|
||||
#endif
|
||||
#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
|
||||
if (! in_p)
|
||||
class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
|
||||
rclass = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
|
||||
#endif
|
||||
if (class != NO_REGS)
|
||||
if (rclass != NO_REGS)
|
||||
{
|
||||
enum insn_code icode = (in_p ? reload_in_optab[(int) reload_mode]
|
||||
: reload_out_optab[(int) reload_mode]);
|
||||
@ -648,19 +648,19 @@ default_secondary_reload (bool in_p ATTRIBUTE_UNUSED, rtx x ATTRIBUTE_UNUSED,
|
||||
|
||||
if (reg_class_subset_p (reload_class, insn_class))
|
||||
{
|
||||
gcc_assert (scratch_class == class);
|
||||
class = NO_REGS;
|
||||
gcc_assert (scratch_class == rclass);
|
||||
rclass = NO_REGS;
|
||||
}
|
||||
else
|
||||
class = insn_class;
|
||||
rclass = insn_class;
|
||||
|
||||
}
|
||||
if (class == NO_REGS)
|
||||
if (rclass == NO_REGS)
|
||||
sri->icode = icode;
|
||||
else
|
||||
sri->t_icode = icode;
|
||||
}
|
||||
return class;
|
||||
return rclass;
|
||||
}
|
||||
|
||||
bool
|
||||
|
||||
@ -470,9 +470,9 @@ static int
|
||||
section_entry_eq (const void *p1, const void *p2)
|
||||
{
|
||||
const section *old = (const section *) p1;
|
||||
const char *new = (const char *) p2;
|
||||
const char *new_name = (const char *) p2;
|
||||
|
||||
return strcmp (old->named.name, new) == 0;
|
||||
return strcmp (old->named.name, new_name) == 0;
|
||||
}
|
||||
|
||||
static hashval_t
|
||||
@ -498,9 +498,9 @@ static int
|
||||
object_block_entry_eq (const void *p1, const void *p2)
|
||||
{
|
||||
const struct object_block *old = (const struct object_block *) p1;
|
||||
const section *new = (const section *) p2;
|
||||
const section *new_section = (const section *) p2;
|
||||
|
||||
return old->sect == new;
|
||||
return old->sect == new_section;
|
||||
}
|
||||
|
||||
static hashval_t
|
||||
|
||||
Loading…
Reference in New Issue
Block a user