rs6000: Various fixes for the new fpscr builtins (PR87509)

With these fixes all testcases test clean for me, both on
powerpc64-linux {-m32,-m64} and on powerpc64le-linux, with all
relevant -mcpu= settings.


	PR target/87509
	* config/rs6000/rs6000-builtin.def (RS6000_BUILTIN_SET_FPSCR_DRN): Use
	RS6000_BTM_DFP.
	* config/rs6000/rs6000.md (rs6000_set_fpscr_rn): Require the operand
	to be DImode.  When using mffscrn, force the operand to a register.

gcc/testsuite/
	PR target/87509
	* gcc.target/powerpc/test_fpscr_drn_builtin.c: Use hard_dfp instead
	of dfp_hw.  Don't include <altivec.h>.
	* gcc.target/powerpc/test_fpscr_drn_builtin_error.c: Ditto.  Require
	lp64.
	* gcc.target/powerpc/test_fpscr_rn_builtin.c: Don't include <altivec.h>.
	* gcc.target/powerpc/test_fpscr_rn_builtin_error.c: Ditto.
	* gcc.target/powerpc/test_mffsl.c: Ditto.

From-SVN: r264863
This commit is contained in:
Segher Boessenkool 2018-10-05 12:52:33 +02:00 committed by Segher Boessenkool
parent 3665f77c7f
commit 49022a8b83
9 changed files with 26 additions and 18 deletions

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@ -1,3 +1,11 @@
2018-10-05 Segher Boessenkool <segher@kernel.crashing.org>
PR target/87509
* config/rs6000/rs6000-builtin.def (RS6000_BUILTIN_SET_FPSCR_DRN): Use
RS6000_BTM_DFP.
* config/rs6000/rs6000.md (rs6000_set_fpscr_rn): Require the operand
to be DImode. When using mffscrn, force the operand to a register.
2018-10-04 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md (*fop_<X87MODEF:mode>_2_i387): Macroize insn

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@ -2510,7 +2510,7 @@ RS6000_BUILTIN_X (RS6000_BUILTIN_SET_FPSCR_RN, "__builtin_set_fpscr_rn",
CODE_FOR_rs6000_set_fpscr_rn)
RS6000_BUILTIN_X (RS6000_BUILTIN_SET_FPSCR_DRN, "__builtin_set_fpscr_drn",
RS6000_BTM_ALWAYS,
RS6000_BTM_DFP,
RS6000_BTC_MISC | RS6000_BTM_64BIT | RS6000_BTC_UNARY
| RS6000_BTC_VOID,
CODE_FOR_rs6000_set_fpscr_drn)

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@ -5848,7 +5848,7 @@
[(set_attr "type" "fp")])
(define_expand "rs6000_set_fpscr_rn"
[(match_operand 0 "reg_or_cint_operand")]
[(match_operand:DI 0 "reg_or_cint_operand")]
"TARGET_HARD_FLOAT"
{
rtx tmp_df = gen_reg_rtx (DFmode);
@ -5857,9 +5857,8 @@
new rounding mode bits from operands[0][62:63] into FPSCR[62:63]. */
if (TARGET_P9_MISC)
{
rtx src_df = gen_reg_rtx (DImode);
src_df = simplify_gen_subreg (DFmode, operands[0], DImode, 0);
rtx src_df = force_reg (DImode, operands[0]);
src_df = simplify_gen_subreg (DFmode, src_df, DImode, 0);
emit_insn (gen_rs6000_mffscrn (tmp_df, src_df));
DONE;
}

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@ -1,3 +1,14 @@
2018-10-05 Segher Boessenkool <segher@kernel.crashing.org>
PR target/87509
* gcc.target/powerpc/test_fpscr_drn_builtin.c: Use hard_dfp instead
of dfp_hw. Don't include <altivec.h>.
* gcc.target/powerpc/test_fpscr_drn_builtin_error.c: Ditto. Require
lp64.
* gcc.target/powerpc/test_fpscr_rn_builtin.c: Don't include <altivec.h>.
* gcc.target/powerpc/test_fpscr_rn_builtin_error.c: Ditto.
* gcc.target/powerpc/test_mffsl.c: Ditto.
2018-10-04 Vinay Kumar <vinay.kumar@blackfigtech.com>
* c-c++-common/Wprio-ctor-dtor.c: New test.

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@ -1,9 +1,7 @@
/* { dg-do run { target { powerpc*-*-* && lp64 } } } */
/* { dg-require-effective-target dfp_hw } */
/* { dg-require-effective-target hard_dfp } */
/* { dg-options "-O2 -std=c99" } */
#include <altivec.h>
#ifdef DEBUG
#include <stdio.h>
#endif

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@ -1,9 +1,7 @@
/* { dg-do compile { target powerpc*-*-* } } */
/* { dg-require-effective-target dfp_hw } */
/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
/* { dg-require-effective-target hard_dfp } */
/* { dg-options "-O2 -std=c99" } */
#include <altivec.h>
int main ()
{

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@ -1,8 +1,6 @@
/* { dg-do run { target { powerpc*-*-* } } } */
/* { dg-options "-O2 -std=c99" } */
#include <altivec.h>
#ifdef DEBUG
#include <stdio.h>
#endif

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@ -1,8 +1,6 @@
/* { dg-do compile { target powerpc*-*-* } } */
/* { dg-options "-O2 -std=c99" } */
#include <altivec.h>
int main ()
{

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@ -1,8 +1,6 @@
/* { dg-do run { target { powerpc*-*-* } } } */
/* { dg-options "-O2 -std=c99" } */
#include <altivec.h>
#ifdef DEBUG
#include <stdio.h>
#endif