sh.c (push_regs, [...]): Return int.
* sh.c (push_regs, calc_live_regs): Return int. Take single HARD_REG_SET * parameter. Changed all callers. From-SVN: r65373
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490dbac747
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@ -1,3 +1,8 @@
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2003-04-08 J"orn Rennecke <joern.rennecke@superh.com>
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* sh.c (push_regs, calc_live_regs): Return int. Take single
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HARD_REG_SET * parameter. Changed all callers.
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Tue Apr 8 11:12:07 CEST 2003 Jan Hubicka <jh@suse.cz>
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* i386.c (legitimate_pic_address_disp_p): Do not accept PLUS in the
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@ -189,8 +189,8 @@ static void output_stack_adjust PARAMS ((int, rtx, int, rtx (*) (rtx)));
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static rtx frame_insn PARAMS ((rtx));
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static rtx push PARAMS ((int));
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static void pop PARAMS ((int));
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static void push_regs PARAMS ((HOST_WIDE_INT *));
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static void calc_live_regs PARAMS ((int *, HOST_WIDE_INT *));
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static void push_regs PARAMS ((HARD_REG_SET *));
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static int calc_live_regs PARAMS ((HARD_REG_SET *));
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static void mark_use PARAMS ((rtx, rtx *));
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static HOST_WIDE_INT rounded_frame_size PARAMS ((int));
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static rtx mark_constant_pool_use PARAMS ((rtx));
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@ -4659,7 +4659,7 @@ pop (rn)
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static void
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push_regs (mask)
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HOST_WIDE_INT *mask;
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HARD_REG_SET *mask;
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{
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int i;
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@ -4667,23 +4667,22 @@ push_regs (mask)
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candidates for the return delay slot when there are no general
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registers pushed. */
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for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
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if (i != PR_REG && mask[i / 32] & (1 << (i % 32)))
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if (i != PR_REG && TEST_HARD_REG_BIT (*mask, i))
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push (i);
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if (mask[PR_REG / 32] & (1 << (PR_REG % 32)))
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if (TEST_HARD_REG_BIT (*mask, PR_REG))
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push (PR_REG);
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}
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/* Work out the registers which need to be saved, both as a mask and a
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count of saved words.
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count of saved words. Return the count.
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If doing a pragma interrupt function, then push all regs used by the
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function, and if we call another function (we can tell by looking at PR),
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make sure that all the regs it clobbers are safe too. */
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static void
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calc_live_regs (count_ptr, live_regs_mask)
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int *count_ptr;
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HOST_WIDE_INT *live_regs_mask;
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static int
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calc_live_regs (live_regs_mask)
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HARD_REG_SET *live_regs_mask;
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{
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int reg;
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int count;
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@ -4693,7 +4692,7 @@ calc_live_regs (count_ptr, live_regs_mask)
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interrupt_handler = sh_cfun_interrupt_handler_p ();
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for (count = 0; 32 * count < FIRST_PSEUDO_REGISTER; count++)
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live_regs_mask[count] = 0;
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CLEAR_HARD_REG_SET (*live_regs_mask);
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/* If we can save a lot of saves by switching to double mode, do that. */
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if (TARGET_SH4 && TARGET_FMOVD && TARGET_FPU_SINGLE)
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for (count = 0, reg = FIRST_FP_REG; reg <= LAST_FP_REG; reg += 2)
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@ -4752,7 +4751,7 @@ calc_live_regs (count_ptr, live_regs_mask)
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|| reg == EH_RETURN_DATA_REGNO (2)
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|| reg == EH_RETURN_DATA_REGNO (3)))))
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{
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live_regs_mask[reg / 32] |= 1 << (reg % 32);
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SET_HARD_REG_BIT (*live_regs_mask, reg);
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count += GET_MODE_SIZE (REGISTER_NATURAL_MODE (reg));
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if ((TARGET_SH4 || TARGET_SH5) && TARGET_FMOVD
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@ -4762,7 +4761,7 @@ calc_live_regs (count_ptr, live_regs_mask)
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{
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if (! TARGET_FPU_SINGLE && ! regs_ever_live[reg ^ 1])
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{
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live_regs_mask[(reg ^ 1) / 32] |= 1 << ((reg ^ 1) % 32);
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SET_HARD_REG_BIT (*live_regs_mask, (reg ^ 1));
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count += GET_MODE_SIZE (REGISTER_NATURAL_MODE (reg ^ 1));
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}
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}
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@ -4775,7 +4774,7 @@ calc_live_regs (count_ptr, live_regs_mask)
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}
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}
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*count_ptr = count;
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return count;
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}
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/* Code to generate prologue and epilogue sequences */
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@ -4817,7 +4816,7 @@ sh_media_register_for_return ()
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void
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sh_expand_prologue ()
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{
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HOST_WIDE_INT live_regs_mask[(FIRST_PSEUDO_REGISTER + 31) / 32];
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HARD_REG_SET live_regs_mask;
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int d, i;
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int d_rounding = 0;
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int save_flags = target_flags;
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@ -4909,7 +4908,7 @@ sh_expand_prologue ()
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if (sp_switch)
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emit_insn (gen_sp_switch_1 ());
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calc_live_regs (&d, live_regs_mask);
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d = calc_live_regs (&live_regs_mask);
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/* ??? Maybe we could save some switching if we can move a mode switch
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that already happens to be at the function start into the prologue. */
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if (target_flags != save_flags)
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@ -4940,7 +4939,7 @@ sh_expand_prologue ()
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sh_expand_epilogue, but also sh_set_return_address. */
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for (align = 1; align >= 0; align--)
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for (i = FIRST_PSEUDO_REGISTER - 1; i >= 0; i--)
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if (live_regs_mask[i/32] & (1 << (i % 32)))
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if (TEST_HARD_REG_BIT (live_regs_mask, i))
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{
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enum machine_mode mode = REGISTER_NATURAL_MODE (i);
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int reg = i;
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@ -4948,7 +4947,7 @@ sh_expand_prologue ()
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if (mode == SFmode && (i % 2) == 1
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&& ! TARGET_FPU_SINGLE && FP_REGISTER_P (i)
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&& (live_regs_mask[(i ^ 1) / 32] & (1 << ((i ^ 1) % 32))))
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&& (TEST_HARD_REG_BIT (live_regs_mask, (i ^ 1))))
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{
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mode = DFmode;
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i--;
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@ -5069,7 +5068,7 @@ sh_expand_prologue ()
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abort ();
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}
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else
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push_regs (live_regs_mask);
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push_regs (&live_regs_mask);
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if (flag_pic && regs_ever_live[PIC_OFFSET_TABLE_REGNUM])
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{
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@ -5138,14 +5137,14 @@ sh_expand_prologue ()
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void
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sh_expand_epilogue ()
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{
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HOST_WIDE_INT live_regs_mask[(FIRST_PSEUDO_REGISTER + 31) / 32];
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HARD_REG_SET live_regs_mask;
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int d, i;
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int d_rounding = 0;
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int save_flags = target_flags;
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int frame_size;
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calc_live_regs (&d, live_regs_mask);
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d = calc_live_regs (&live_regs_mask);
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if (TARGET_SH5 && d % (STACK_BOUNDARY / BITS_PER_UNIT))
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d_rounding = ((STACK_BOUNDARY / BITS_PER_UNIT)
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@ -5206,7 +5205,7 @@ sh_expand_epilogue ()
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alignment. */
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for (align = 0; align <= 1; align++)
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for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
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if (live_regs_mask[i/32] & (1 << (i % 32)))
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if (TEST_HARD_REG_BIT (live_regs_mask, i))
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{
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enum machine_mode mode = REGISTER_NATURAL_MODE (i);
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int reg = i;
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@ -5214,7 +5213,7 @@ sh_expand_epilogue ()
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if (mode == SFmode && (i % 2) == 0
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&& ! TARGET_FPU_SINGLE && FP_REGISTER_P (i)
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&& (live_regs_mask[(i ^ 1) / 32] & (1 << ((i ^ 1) % 32))))
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&& (TEST_HARD_REG_BIT (live_regs_mask, (i ^ 1))))
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{
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mode = DFmode;
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i++;
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@ -5336,13 +5335,13 @@ sh_expand_epilogue ()
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}
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else
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d = 0;
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if (live_regs_mask[PR_REG / 32] & (1 << (PR_REG % 32)))
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if (TEST_HARD_REG_BIT (live_regs_mask, PR_REG))
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pop (PR_REG);
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for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
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{
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int j = (FIRST_PSEUDO_REGISTER - 1) - i;
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if (j != PR_REG && live_regs_mask[j / 32] & (1 << (j % 32)))
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if (j != PR_REG && TEST_HARD_REG_BIT (live_regs_mask, j))
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pop (j);
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}
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finish:
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/* PR_REG will never be live in SHmedia mode, and we don't need to
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USE PR_MEDIA_REG, since it will be explicitly copied to TR0_REG
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by the return pattern. */
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if (live_regs_mask[PR_REG / 32] & (1 << (PR_REG % 32)))
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if (TEST_HARD_REG_BIT (live_regs_mask, PR_REG))
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emit_insn (gen_rtx_USE (VOIDmode, gen_rtx_REG (SImode, PR_REG)));
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}
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@ -5396,17 +5395,17 @@ void
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sh_set_return_address (ra, tmp)
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rtx ra, tmp;
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{
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HOST_WIDE_INT live_regs_mask[(FIRST_PSEUDO_REGISTER + 31) / 32];
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HARD_REG_SET live_regs_mask;
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int d;
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int d_rounding = 0;
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int pr_reg = TARGET_SHMEDIA ? PR_MEDIA_REG : PR_REG;
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int pr_offset;
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calc_live_regs (&d, live_regs_mask);
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d = calc_live_regs (&live_regs_mask);
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/* If pr_reg isn't life, we can set it (or the register given in
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sh_media_register_for_return) directly. */
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if ((live_regs_mask[pr_reg / 32] & (1 << (pr_reg % 32))) == 0)
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if (! TEST_HARD_REG_BIT (live_regs_mask, pr_reg))
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{
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rtx rr;
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alignment. */
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for (align = 0; align <= 1; align++)
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for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
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if (live_regs_mask[i/32] & (1 << (i % 32)))
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if (TEST_HARD_REG_BIT (live_regs_mask, i))
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{
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enum machine_mode mode = REGISTER_NATURAL_MODE (i);
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if (mode == SFmode && (i % 2) == 0
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&& ! TARGET_FPU_SINGLE && FP_REGISTER_P (i)
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&& (live_regs_mask[(i ^ 1) / 32] & (1 << ((i ^ 1) % 32))))
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&& (TEST_HARD_REG_BIT (live_regs_mask, (i ^ 1))))
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{
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mode = DFmode;
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i++;
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int save_flags = target_flags;
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int copy_flags;
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HOST_WIDE_INT live_regs_mask[(FIRST_PSEUDO_REGISTER + 31) / 32];
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calc_live_regs (®s_saved, live_regs_mask);
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HARD_REG_SET live_regs_mask;
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regs_saved = calc_live_regs (&live_regs_mask);
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regs_saved += SHMEDIA_REGS_STACK_ADJUST ();
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if (TARGET_SH5 && regs_saved % (STACK_BOUNDARY / BITS_PER_UNIT))
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regs_saved_rounding = ((STACK_BOUNDARY / BITS_PER_UNIT)
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n += total_auto_space;
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/* If it wasn't saved, there's not much we can do. */
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if ((live_regs_mask[pr_reg / 32] & (1 << (pr_reg % 32))) == 0)
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if (! TEST_HARD_REG_BIT (live_regs_mask, pr_reg))
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return n;
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target_flags = copy_flags;
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need 8-byte alignment. */
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for (align = 1; align >= 0; align--)
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for (i = FIRST_PSEUDO_REGISTER - 1; i >= 0; i--)
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if (live_regs_mask[i/32] & (1 << (i % 32)))
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if (TEST_HARD_REG_BIT (live_regs_mask, i))
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{
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enum machine_mode mode = REGISTER_NATURAL_MODE (i);
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if (mode == SFmode && (i % 2) == 1
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&& ! TARGET_FPU_SINGLE && FP_REGISTER_P (i)
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&& (live_regs_mask[(i ^ 1) / 32]
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& (1 << ((i ^ 1) % 32))))
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&& TEST_HARD_REG_BIT (live_regs_mask, (i ^ 1)))
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{
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mode = DFmode;
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i--;
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