Mark Power10 fusion option undocumented and remove sub-options.
gcc/ * config/rs6000/rs6000.opt (mpower10-fusion): Mark Undocumented. (mpower10-fusion-ld-cmpi, mpower10-fusion-2logical, mpower10-fusion-logical-add, mpower10-fusion-add-logical, mpower10-fusion-2add, mpower10-fusion-2store): Remove. * config/rs6000/rs6000-cpus.def (ISA_3_1_MASKS_SERVER, OTHER_P9_VECTOR_MASKS): Remove Power10 fusion sub-options. * config/rs6000/rs6000.cc (rs6000_option_override_internal, power10_sched_reorder): Likewise. * config/rs6000/genfusion.pl (gen_ld_cmpi_p10, gen_logical_addsubf, gen_addadd): Likewise * config/rs6000/fusion.md: Regenerate.
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@ -118,7 +118,7 @@ sub gen_ld_cmpi_p10
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} else {
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print " (set (match_operand:${result} 0 \"gpc_reg_operand\" \"=r\") (${extend}_extend:${result} (match_dup 1)))]\n";
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}
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print " \"(TARGET_P10_FUSION && TARGET_P10_FUSION_LD_CMPI)\"\n";
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print " \"(TARGET_P10_FUSION)\"\n";
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print " \"l${ldst}${echr}%X1 %0,%1\\;cmp${cmpl}di %2,%0,%3\"\n";
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print " \"&& reload_completed\n";
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print " && (cc_reg_not_cr0_operand (operands[2], CCmode)\n";
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@ -166,8 +166,8 @@ sub gen_logical_addsubf
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$outer_op, $outer_comp, $outer_inv, $outer_rtl, $inner, @inner_ops,
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$inner_comp, $inner_inv, $inner_rtl, $inner_op, $both_commute, $c4,
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$bc, $inner_arg0, $inner_arg1, $inner_exp, $outer_arg2, $outer_exp,
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$target_flag, $ftype, $insn, $is_subf, $is_rsubf, $outer_32, $outer_42,
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$outer_name, $fuse_type);
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$ftype, $insn, $is_subf, $is_rsubf, $outer_32, $outer_42,$outer_name,
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$fuse_type);
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KIND: foreach $kind ('scalar','vector') {
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@outer_ops = @logicals;
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if ( $kind eq 'vector' ) {
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@ -199,18 +199,15 @@ sub gen_logical_addsubf
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$outer_rtl = $rtlop{$outer};
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@inner_ops = @logicals;
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$ftype = "logical-logical";
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$target_flag = "TARGET_P10_FUSION_2LOGICAL";
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if ( exists $isaddsub{$outer} ) {
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@inner_ops = sort keys %logicals_addsub;
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$ftype = "logical-add";
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$target_flag = "TARGET_P10_FUSION_LOGADD";
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} elsif ( $kind ne 'vector' && exists $logicals_addsub{$outer} ) {
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push (@inner_ops, @addsub);
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}
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INNER: foreach $inner ( @inner_ops ) {
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if ( exists $isaddsub{$inner} ) {
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$ftype = "add-logical";
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$target_flag = "TARGET_P10_FUSION_ADDLOG";
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}
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$inner_comp = $complement{$inner};
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$inner_inv = $invert{$inner};
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@ -266,7 +263,7 @@ sub gen_logical_addsubf
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[(set (match_operand:${mode} 3 "${pred}" "=&0,&1,&${constraint},${constraint}")
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${outer_exp})
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(clobber (match_scratch:${mode} 4 "=X,X,X,&${constraint}"))]
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"(TARGET_P10_FUSION && $target_flag)"
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"(TARGET_P10_FUSION)"
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"@
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${inner_op} %3,%1,%0\\;${outer_op} %3,${outer_32}
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${inner_op} %3,%1,%0\\;${outer_op} %3,${outer_32}
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@ -313,7 +310,7 @@ sub gen_addadd
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(match_operand:${mode} 1 "${pred}" "%${c4}"))
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(match_operand:${mode} 2 "${pred}" "${c4}")))
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(clobber (match_scratch:${mode} 4 "=X,X,X,&${constraint}"))]
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"(TARGET_P10_FUSION && TARGET_P10_FUSION_2ADD)"
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"(TARGET_P10_FUSION)"
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"@
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${op} %3,%1,%0\\;${op} %3,%3,%2
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${op} %3,%1,%0\\;${op} %3,%3,%2
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@ -85,13 +85,7 @@
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#define ISA_3_1_MASKS_SERVER (ISA_3_0_MASKS_SERVER \
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| OPTION_MASK_POWER10 \
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| OTHER_POWER10_MASKS \
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| OPTION_MASK_P10_FUSION \
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| OPTION_MASK_P10_FUSION_LD_CMPI \
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| OPTION_MASK_P10_FUSION_2LOGICAL \
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| OPTION_MASK_P10_FUSION_LOGADD \
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| OPTION_MASK_P10_FUSION_ADDLOG \
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| OPTION_MASK_P10_FUSION_2ADD \
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| OPTION_MASK_P10_FUSION_2STORE)
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| OPTION_MASK_P10_FUSION)
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/* Flags that need to be turned off if -mno-power9-vector. */
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#define OTHER_P9_VECTOR_MASKS (OPTION_MASK_FLOAT128_HW \
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@ -139,12 +133,6 @@
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| OPTION_MASK_FPRND \
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| OPTION_MASK_POWER10 \
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| OPTION_MASK_P10_FUSION \
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| OPTION_MASK_P10_FUSION_LD_CMPI \
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| OPTION_MASK_P10_FUSION_2LOGICAL \
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| OPTION_MASK_P10_FUSION_LOGADD \
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| OPTION_MASK_P10_FUSION_ADDLOG \
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| OPTION_MASK_P10_FUSION_2ADD \
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| OPTION_MASK_P10_FUSION_2STORE \
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| OPTION_MASK_HTM \
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| OPTION_MASK_ISEL \
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| OPTION_MASK_MFCRF \
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@ -4446,30 +4446,6 @@ rs6000_option_override_internal (bool global_init_p)
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&& (rs6000_isa_flags_explicit & OPTION_MASK_P10_FUSION) == 0)
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rs6000_isa_flags |= OPTION_MASK_P10_FUSION;
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if (TARGET_POWER10 &&
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(rs6000_isa_flags_explicit & OPTION_MASK_P10_FUSION_LD_CMPI) == 0)
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rs6000_isa_flags |= OPTION_MASK_P10_FUSION_LD_CMPI;
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if (TARGET_POWER10
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&& (rs6000_isa_flags_explicit & OPTION_MASK_P10_FUSION_2LOGICAL) == 0)
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rs6000_isa_flags |= OPTION_MASK_P10_FUSION_2LOGICAL;
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if (TARGET_POWER10
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&& (rs6000_isa_flags_explicit & OPTION_MASK_P10_FUSION_LOGADD) == 0)
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rs6000_isa_flags |= OPTION_MASK_P10_FUSION_LOGADD;
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if (TARGET_POWER10
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&& (rs6000_isa_flags_explicit & OPTION_MASK_P10_FUSION_ADDLOG) == 0)
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rs6000_isa_flags |= OPTION_MASK_P10_FUSION_ADDLOG;
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if (TARGET_POWER10
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&& (rs6000_isa_flags_explicit & OPTION_MASK_P10_FUSION_2ADD) == 0)
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rs6000_isa_flags |= OPTION_MASK_P10_FUSION_2ADD;
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if (TARGET_POWER10
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&& (rs6000_isa_flags_explicit & OPTION_MASK_P10_FUSION_2STORE) == 0)
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rs6000_isa_flags |= OPTION_MASK_P10_FUSION_2STORE;
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/* Turn off vector pair/mma options on non-power10 systems. */
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else if (!TARGET_POWER10 && TARGET_MMA)
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{
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@ -19032,8 +19008,7 @@ power10_sched_reorder (rtx_insn **ready, int lastpos)
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/* Try to pair certain store insns to adjacent memory locations
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so that the hardware will fuse them to a single operation. */
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if (TARGET_P10_FUSION && TARGET_P10_FUSION_2STORE
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&& is_fusable_store (last_scheduled_insn, &mem1))
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if (TARGET_P10_FUSION && is_fusable_store (last_scheduled_insn, &mem1))
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{
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/* A fusable store was just scheduled. Scan the ready list for another
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@ -487,33 +487,9 @@ Target Mask(P8_VECTOR) Var(rs6000_isa_flags)
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Use vector and scalar instructions added in ISA 2.07.
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mpower10-fusion
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Target Mask(P10_FUSION) Var(rs6000_isa_flags)
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Target Undocumented Mask(P10_FUSION) Var(rs6000_isa_flags)
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Fuse certain integer operations together for better performance on power10.
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mpower10-fusion-ld-cmpi
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Target Undocumented Mask(P10_FUSION_LD_CMPI) Var(rs6000_isa_flags)
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Fuse certain integer operations together for better performance on power10.
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mpower10-fusion-2logical
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Target Undocumented Mask(P10_FUSION_2LOGICAL) Var(rs6000_isa_flags)
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Fuse pairs of scalar or vector logical operations together for better performance on power10.
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mpower10-fusion-logical-add
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Target Undocumented Mask(P10_FUSION_LOGADD) Var(rs6000_isa_flags)
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Fuse scalar logical op with add/subf for better performance on power10.
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mpower10-fusion-add-logical
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Target Undocumented Mask(P10_FUSION_ADDLOG) Var(rs6000_isa_flags)
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Fuse scalar add/subf with logical op for better performance on power10.
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mpower10-fusion-2add
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Target Undocumented Mask(P10_FUSION_2ADD) Var(rs6000_isa_flags)
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Fuse dependent pairs of add or vaddudm instructions for better performance on power10.
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mpower10-fusion-2store
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Target Undocumented Mask(P10_FUSION_2STORE) Var(rs6000_isa_flags)
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Fuse certain store operations together for better performance on power10.
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mcrypto
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Target Mask(CRYPTO) Var(rs6000_isa_flags)
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Use ISA 2.07 Category:Vector.AES and Category:Vector.SHA2 instructions.
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