* config/avr/avr.md
(*dec-and-branchhi!=-1.d.clobber): New text peephole. (*dec-and-branchhi!=-1.l.clobber): New text peephole. From-SVN: r184446
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@ -1,3 +1,9 @@
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2012-01-21 Georg-Johann Lay <avr@gjlay.de>
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* config/avr/avr.md
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(*dec-and-branchhi!=-1.d.clobber): New text peephole.
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(*dec-and-branchhi!=-1.l.clobber): New text peephole.
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2012-01-21 Georg-Johann Lay <avr@gjlay.de>
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2012-01-21 Georg-Johann Lay <avr@gjlay.de>
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* config/avr/avr-protos.h (avr_accumulate_outgoing_args): Move
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* config/avr/avr-protos.h (avr_accumulate_outgoing_args): Move
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@ -4919,7 +4919,7 @@
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;; ************************* Peepholes ********************************
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;; ************************* Peepholes ********************************
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(define_peephole
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(define_peephole ; "*dec-and-branchsi!=-1.d.clobber"
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[(parallel [(set (match_operand:SI 0 "d_register_operand" "")
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[(parallel [(set (match_operand:SI 0 "d_register_operand" "")
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(plus:SI (match_dup 0)
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(plus:SI (match_dup 0)
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(const_int -1)))
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(const_int -1)))
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@ -4960,7 +4960,7 @@
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return "";
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return "";
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})
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})
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(define_peephole
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(define_peephole ; "*dec-and-branchhi!=-1"
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[(set (match_operand:HI 0 "d_register_operand" "")
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[(set (match_operand:HI 0 "d_register_operand" "")
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(plus:HI (match_dup 0)
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(plus:HI (match_dup 0)
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(const_int -1)))
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(const_int -1)))
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@ -4996,7 +4996,81 @@
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return "";
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return "";
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})
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})
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(define_peephole
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;; Same as above but with clobber flavour of addhi3
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(define_peephole ; "*dec-and-branchhi!=-1.d.clobber"
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[(parallel [(set (match_operand:HI 0 "d_register_operand" "")
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(plus:HI (match_dup 0)
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(const_int -1)))
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(clobber (scratch:QI))])
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(parallel [(set (cc0)
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(compare (match_dup 0)
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(const_int -1)))
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(clobber (match_operand:QI 1 "d_register_operand" ""))])
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(set (pc)
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(if_then_else (ne (cc0)
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(const_int 0))
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(label_ref (match_operand 2 "" ""))
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(pc)))]
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""
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{
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CC_STATUS_INIT;
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if (test_hard_reg_class (ADDW_REGS, operands[0]))
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output_asm_insn ("sbiw %0,1", operands);
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else
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output_asm_insn ("subi %A0,1" CR_TAB
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"sbc %B0,__zero_reg__", operands);
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switch (avr_jump_mode (operands[2], insn))
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{
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case 1:
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return "brcc %2";
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case 2:
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return "brcs .+2\;rjmp %2";
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case 3:
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return "brcs .+4\;jmp %2";
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}
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gcc_unreachable();
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return "";
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})
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;; Same as above but with clobber flavour of addhi3
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(define_peephole ; "*dec-and-branchhi!=-1.l.clobber"
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[(parallel [(set (match_operand:HI 0 "l_register_operand" "")
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(plus:HI (match_dup 0)
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(const_int -1)))
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(clobber (match_operand:QI 3 "d_register_operand" ""))])
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(parallel [(set (cc0)
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(compare (match_dup 0)
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(const_int -1)))
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(clobber (match_operand:QI 1 "d_register_operand" ""))])
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(set (pc)
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(if_then_else (ne (cc0)
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(const_int 0))
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(label_ref (match_operand 2 "" ""))
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(pc)))]
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""
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{
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CC_STATUS_INIT;
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output_asm_insn ("ldi %3,1" CR_TAB
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"sub %A0,%3" CR_TAB
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"sbc %B0,__zero_reg__", operands);
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switch (avr_jump_mode (operands[2], insn))
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{
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case 1:
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return "brcc %2";
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case 2:
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return "brcs .+2\;rjmp %2";
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case 3:
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return "brcs .+4\;jmp %2";
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}
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gcc_unreachable();
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return "";
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})
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(define_peephole ; "*dec-and-branchqi!=-1"
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[(set (match_operand:QI 0 "d_register_operand" "")
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[(set (match_operand:QI 0 "d_register_operand" "")
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(plus:QI (match_dup 0)
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(plus:QI (match_dup 0)
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(const_int -1)))
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(const_int -1)))
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